MIPS: Netlogic: Disable writing IRT for disabled blocks
If the device header of a block is not present, return invalid IRT
value so that we do not program an incorrect offset.
Signed-off-by: Jayachandran C <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/8882/
Signed-off-by: Ralf Baechle <[email protected]>
diff --git a/arch/mips/netlogic/xlp/nlm_hal.c b/arch/mips/netlogic/xlp/nlm_hal.c
index 7e0d224..de41fb5d 100644
--- a/arch/mips/netlogic/xlp/nlm_hal.c
+++ b/arch/mips/netlogic/xlp/nlm_hal.c
@@ -170,16 +170,23 @@
}
if (devoff != 0) {
+ uint32_t val;
+
pcibase = nlm_pcicfg_base(devoff);
- irt = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG) & 0xffff;
- /* HW weirdness, I2C IRT entry has to be fixed up */
- switch (irq) {
- case PIC_I2C_1_IRQ:
- irt = irt + 1; break;
- case PIC_I2C_2_IRQ:
- irt = irt + 2; break;
- case PIC_I2C_3_IRQ:
- irt = irt + 3; break;
+ val = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG);
+ if (val == 0xffffffff) {
+ irt = -1;
+ } else {
+ irt = val & 0xffff;
+ /* HW weirdness, I2C IRT entry has to be fixed up */
+ switch (irq) {
+ case PIC_I2C_1_IRQ:
+ irt = irt + 1; break;
+ case PIC_I2C_2_IRQ:
+ irt = irt + 2; break;
+ case PIC_I2C_3_IRQ:
+ irt = irt + 3; break;
+ }
}
} else if (irq >= PIC_PCIE_LINK_LEGACY_IRQ(0) &&
irq <= PIC_PCIE_LINK_LEGACY_IRQ(3)) {
