diff options
| author | Jim Wilson <[email protected]> | 2018-12-27 15:27:02 -0800 |
|---|---|---|
| committer | Mark Wielaard <[email protected]> | 2019-01-13 11:08:42 +0100 |
| commit | dcd3704ee5a522887d365d1a4cf77e585f1b68b4 (patch) | |
| tree | 8be226f056c471714ff08c01d1e3ac7616eb3d7f /backends/ChangeLog | |
| parent | 4f4b90c6097546205502e8ad34c001516d4e3e44 (diff) | |
RISC-V: Add untested 32-bit core file support.
Adds 32-bit support exactly the same way that the sparc backend handles
32- and 64-bit core file support. The 64-bit core file support was tested
and still works same as before.
Signed-off-by: Jim Wilson <[email protected]>
Diffstat (limited to 'backends/ChangeLog')
| -rw-r--r-- | backends/ChangeLog | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/backends/ChangeLog b/backends/ChangeLog index 637aa8c2..58a1b775 100644 --- a/backends/ChangeLog +++ b/backends/ChangeLog @@ -1,5 +1,16 @@ 2018-12-27 Jim Wilson <[email protected]> + * Makefile.am (riscv_SRCS): Add riscv64_corenote.c. + * riscv64_corenote.c: New file. + * riscv_corenote.c (BITS): New. + (BACKEND): Conditional on BITS. + (ULONG, UID_T, GID_T, ALIGN_ULONG, ALIGN_UID_T, ALIGN_GID_T): Likewise. + (TYPE_ULONG, TYPE_UID_T, TYPE_GID_T): Likewise. + (prstatus_regs): Use BITS/8 instead of 8. + (PRSTATUS_REGS_SIZE): Likewise. + * riscv_init.c (riscv64_core_note): Declare. + (riscv_init): If ELFCLASS64 then use riscv64_core_note hook. + * Makefile.am (riscv_SRCS): Add riscv_retval.c. * riscv_init.c: Include libelfP.h. (riscv_return_value_location_lp64d): Declare. |