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* aarch64: define struct user_pac_mask if neededMarkus Mayer2025-02-231-0/+21
* Replace usage of ar with stored library manifest filesMichael Pratt2025-01-211-0/+6
* backends: check_special_symbol _GLOBAL_OFFSET_TABLE_ points inside .gotMark Wielaard2024-12-301-3/+24
* Consolidate and add files to clean target variablesupstream/users/amerey/try-cleanMichael Pratt2024-11-081-1/+2
* aarch64: Add NT_ARM_PAC_* regsetKuan-Ying Lee2024-08-301-0/+9
* libdwfl, aarch64: Read PAC mask from coreSteve Capper2024-08-301-2/+15
* libdwfl, aarch64: extend dwfl_thread_state_registers to handle PACSteve Capper2024-08-301-0/+10
* aarch64: Create definitions for AARCH64_RA_SIGN_STATE registerGerman Gomez2024-08-302-1/+6
* aarch64: Add NT_ARM_TAGGED_ADDR_CTRL regsetKuan-Ying Lee2024-08-171-1/+10
* backends/riscv: Remove unused relocationsAndreas Schwab2024-08-071-7/+0
* backends: allocate enough stace for null terminatorSergei Trofimovich2024-07-182-2/+17
* backends: Add register_info, return_value_location, core_note on mipsYing Huang2024-04-055-1/+421
* stack: Fix stack unwind failure on mipsYing Huang2024-04-055-1/+219
* Hexagon: implement machine flag checkMatheus Tavares Bernardino2024-04-042-0/+8
* Add support for HexagonMatheus Tavares Bernardino2024-04-044-2/+244
* Support Mips architectureYing Huang2024-03-294-2/+212
* riscv: Partial implementation of flatten_aggregateMark Wielaard2024-03-201-11/+112
* backends: Update list of LoongArch relocationsXi Ruoyao2024-02-241-0/+17
* backends: Fix arm_machine_flag_name version string.Mark Wielaard2023-11-131-1/+1
* backends: Update list of LoongArch relocationsXi Ruoyao2023-08-291-0/+9
* backends: Update list of RISC-V relocationsAndreas Schwab2023-06-271-0/+4
* backends: Add set_initial_registers_tid callback for LoongArchYouling Tang2023-05-094-1/+96
* backends: Add core_note callback for LoongArchYouling Tang2023-05-094-1/+122
* backends: Add frame pointer unwinding for LoongArchYouling Tang2023-05-094-1/+93
* backends: Add initial return value location support for LoongArchYouling Tang2023-05-094-1/+212
* backends: Add abi_cfi and register_info callbacks for LoongArchYouling Tang2023-05-095-2/+238
* backends: Check results for NULL early in dwarf_peeled_die_typeMark Wielaard2023-04-141-3/+3
* backends: add checks for _GLOBAL_OFFSET_TABLE_ on loongarchYouling Tang2023-04-073-0/+41
* backends: Add new relocation type handling for LoongArchYouling Tang2023-04-072-0/+44
* LoongArch: implemented a basic machine flag checkAlexey Sheplyakov2023-03-202-0/+8
* backends: Handle DW_TAG_unspecified_type in dwarf_peeled_die_typeMark Wielaard2023-02-142-2/+17
* backends: Support returning lvalue and rvalue referencesIlya Leoshkevich2023-02-1414-40/+42
* Initialize reglocs for VMCOREINFOIlya Leoshkevich2023-02-081-0/+1
* backends: sparc uses NONE relocation type in ET_EXEC and ET_DYN filesMark Wielaard2023-01-192-1/+5
* Add support for Synopsys ARCv2 processorsShahab Vahedi2022-12-225-2/+240
* Add support for LoongArchHengqi Chen2022-12-195-2/+217
* backends: Handle new RISC-V specific definitionsAndreas Schwab2022-08-093-0/+58
* Arm Ehdr flag printingUlrich Drepper2022-06-064-1/+165
* backends: Use PTRACE_GETREGSET for ppc_set_initial_registers_tidMark Wielaard2022-02-162-25/+46
* RISC-V: PR27925 Add support for LP64 and LP64F ABIs return valuesWilliam Cohen2021-09-303-16/+104
* Come up with startswith function.Martin Liska2021-05-123-2/+11
* backends/ppc_initreg.c: include <asm/ptrace.h>.Érico Rolim2021-02-052-0/+5
* backends: fix spelling typos in commentsDmitry V. Levin2020-12-123-2/+8
* backends: Handle SHT_X86_64_UNWIND as valid relocation target type.Mark Wielaard2020-11-173-0/+14
* backends: Remove tilegx backend.Mark Wielaard2020-10-268-584/+14
* libebl: Remove unused ebl_syscall_abi.Mark Wielaard2020-10-269-160/+15
* backends: Implement aarch64_dynamic_tag_name and aarch64_dynamic_tag_checkMark Wielaard2020-09-073-0/+35
* backends: Make the reloc_nametable zero element an one char array.Mark Wielaard2020-06-192-3/+9
* libebl: Remove Ebl struct size check and MODVERSION string.Mark Wielaard2020-06-1018-129/+69
* Implement RISC-V disassemblerUlrich Drepper2019-09-061-0/+1
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