Hardware-in-the-loop simulation

technique used in the development and test of complex real-time embedded systems

Shapes:

URI: http://yago-knowledge.org/resource/Hardware-in-the-loop_simulation

Graph visualizationWikidata
Properties
PredicateObject
schema:alternateName
  • "Hardware-in-the-loop"@ca
  • "HiL simulation"@en
  • "HIL simulation"@en
  • "HiTL simulation"@en
  • "HITL simulation"@en
  • "Hardware in the loop"@es
  • "Hardware in the-loop"@es
  • "Hardware in-the-loop"@es
  • "Hardware in the loop"@it
  • "HIL simulatie"@nl
  • "HIL"@ca
  • "HIL"@de
  • "HiL"@de
  • "HITL"@de
  • "HitL"@de
  • "HIL"@en
  • "HiL"@en
  • "HITL"@en
  • "HitL"@en
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rdf:type
rdfs:comment
  • "Verfahren, bei dem ein eingebettetes System über seine Ein- und Ausgänge an ein angepasstes Gegenstück angeschlossen wird"@de
  • "technique used in the development and test of complex real-time embedded systems"@en
rdfs:label
  • "Hardware in the loop"@ca
  • "Hardware in the Loop"@de
  • "Hardware-in-the-loop simulation"@en
  • "Hardware-in-the-loop"@es
  • "Hardware-in-the-loop"@it
  • "HIL-simulatie"@nl
  • "Программно-аппаратное моделирование"@ru
  • "Simulacija sa hardverom u petlji"@sh
  • "HILS"@ko
  • "硬件在环"@zh
owl:sameAs

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