Xv6 traps and system calls

本文详细介绍了Xv6操作系统中RISC-V架构的陷阱机制,包括硬件陷阱处理序列、用户空间和内核空间的陷阱,以及页故障异常。重点阐述了系统调用的过程,如如何保存和恢复寄存器、切换页表以及处理不同类型的陷阱。通过阅读,读者可以深入理解Xv6中陷阱和系统调用的工作原理。

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Traps and system calls

Learning xv6-riscv-book Chapter 4 Traps and system calls

Trap: CPU transfer to speical code to handle events

  • system call: ecall into the kernel
  • exception: something illegal
  • interrupt: from device

xv6 kernel handles all traps.

code -> trap (handling in kernel) -> resume


trap handling proceeds:

  1. hardware actions by CPU
  2. vector prepares for kernel C code
  3. trap handler decides what to do
  4. do system call / device service

three cases of assembly vectors:

  • traps from user space
  • traps from kernel space
  • timer interrupts

RISC-V trap machinery

Registers

A set of registers:

  • kernel reads about a trap
  • kernel writes to tell the CPU how to handle traps.
register description write by when
stvec address of trap handler kernel
sepc saved PC when a trap occurs RISC-V when a trap occurs
scause reason of trap RISC-V
sscratch places a value that comes in handy kernel at the very start of a traphandler
sstatus SIE bit: device interrupts are enabled? (defer until set)
SPP bit: trap from user or supervisor mode?(ctrl what mode sret returns)

These registers are in supervisor mode: cannot be r/w in user mode

Machine mode has an equivalent set of these regs: only for timer interrupts

Each CPU has its own set: can handling traps at a same time

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