arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array

[ Upstream commit 875d742cf5327c93cba1f11e12b08d3cce7a88d2 ]

The loop that detects/populates cache information already has a bounds
check on the array size but does not account for cache levels with
separate data/instructions cache. Fix this by incrementing the index
for any populated leaf (instead of any populated level).

Fixes: 5d425c186537 ("arm64: kernel: add support for cpu cache information")

BUG=b/403502363
TEST=presubmit
RELEASE_NOTE=Fixed CVE-2025-21785 in the Linux kernel.

cos-patch: security-high
Change-Id: I87cff00aa1df457ba41ff05aedf4298fb143d1ba
Signed-off-by: Radu Rendec <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Will Deacon <[email protected]>
Signed-off-by: Sasha Levin <[email protected]>
Signed-off-by: Kernel CVE Triage Automation <[email protected]>
Reviewed-on: https://cos-review.googlesource.com/c/third_party/kernel/+/96095
Reviewed-by: Shuo Yang <[email protected]>
Reviewed-by: Arnav Kansal <[email protected]>
Tested-by: Cusky Presubmit Bot <[email protected]>
1 file changed