Chirag Sudarshan

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Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
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◀ ▶ joint publications with Christian Weis

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Publications

2023
[c19]
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Gia Bao Thieu, Sven Gesper, Guillermo Payá-Vayá, Christoph Riggers, Oliver Renke, Till Fiedler, Jakob Marten, Tobias Stuckenberg, Holger Blume, Christian Weis, Lukas Steiner, Chirag Sudarshan, Norbert Wehn, Lennart M. Reimann, Rainer Leupers, Michael Beyer, Daniel Köhler, Alisa Jauch, Jan Micha Borrmann, Setareh Jaberansari, Tim Berthold, Meinolf Blawat, Markus Kock, Gregor Schewior, Jens Benndorf, Frederik Kautz, Hans-Martin Blüthgen, Christian Sauer:
ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving. DATE 2023: 1-6
2022
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Chirag Sudarshan, Taha Soliman, Jan Lappas, Christian Weis, Mohammad Hassani Sadi, Matthias Jung, Andre Guntoro, Norbert Wehn:
A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 367-380 (2022)
[c17]
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Chirag Sudarshan, Mohammad Hassani Sadi, Christian Weis, Norbert Wehn:
Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training. ISCAS 2022: 1472-1476
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Chirag Sudarshan, Mohammad Hassani Sadi, Lukas Steiner, Christian Weis, Norbert Wehn:
A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions. SAMOS 2022: 362-379
[c14]
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Chirag Sudarshan, Taha Soliman, Thomas Kämpfe, Christian Weis, Norbert Wehn:
FeFET versus DRAM based PIM Architectures: A Comparative Study. VLSI-SoC 2022: 1-6
2021
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Chirag Sudarshan, Lukas Steiner, Matthias Jung, Jan Lappas, Christian Weis, Norbert Wehn:
A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation. IEEE Trans. Circuits Syst. II Express Briefs 68(5): 1615-1619 (2021)
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Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng:
Correction to: Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. 93(12): 1467 (2021)
[c13]
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Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro:
A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ASP-DAC 2021: 35-42
2020
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Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng:
Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. 92(11): 1219-1245 (2020)
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Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn:
eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. J. Signal Process. Syst. 92(11): 1323-1343 (2020)
[c12]
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Sven Müelich, Chirag Sudarshan, Christian Weis, Martin Bossert, Robert F. H. Fischer, Norbert Wehn:
Multi-Valued Physical Unclonable Functions based on Dynamic Random Access Memory. MEMSYS 2020: 126-136
[c11]
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Muhammad Mohsin Ghaffar, Chirag Sudarshan, Christian Weis, Matthias Jung, Norbert Wehn:
A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions. MEMSYS 2020: 158-168
[c10]
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Marco V. Natale, Matthias Jung, Kira Kraft, Frederik Lauer, Johannes Feldmann, Chirag Sudarshan, Christian Weis, Sven Oliver Krumke, Norbert Wehn:
Efficient Generation of Application Specific Memory Controllers. MEMSYS 2020: 233-247
2019
[c9]
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Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn:
An In-DRAM Neural Network Processing Engine. ISCAS 2019: 1-5
[c8]
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Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn:
Fast validation of DRAM protocols with timed petri nets. MEMSYS 2019: 133-147
[c7]
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Sven Müelich, Sebastian Bitzer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Martin Bossert, Robert F. H. Fischer:
Channel Models for Physical Unclonable Functions based on DRAM Retention Measurements. REDUNDANCY 2019: 149-154
[c6]
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Chirag Sudarshan, Jan Lappas, Christian Weis, Deepak M. Mathew, Matthias Jung, Norbert Wehn:
A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing. SAMOS 2019: 429-441
[i1]
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Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn:
eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. CoRR abs/1911.00889 (2019)
2018
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Deepak M. Mathew, Martin Schultheis, Carl Christian Rheinländer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Matthias Jung:
An analysis on retention error behavior and power consumption of recent DDR4 DRAMs. DATE 2018: 293-296
[c4]
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Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung:
Improving the error behavior of DRAM by exploiting its Z-channel property. DATE 2018: 1492-1495
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Christian Weis, Matthias Jung, Éder F. Zulian, Chirag Sudarshan, Deepak M. Mathew, Norbert Wehn:
The Role of Memories in Transprecision Computing. ISCAS 2018: 1-5
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Kira Kraft, Deepak M. Mathew, Chirag Sudarshan, Matthias Jung, Christian Weis, Norbert Wehn, Florian Longnos:
Efficient coding scheme for DDR4 memory subsystems. MEMSYS 2018: 148-157
[c1]
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Matthias Jung, Sally A. McKee, Chirag Sudarshan, Christoph Dropmann, Christian Weis, Norbert Wehn:
Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving. MEMSYS 2018: 377-386

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