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ORCIDZhiteng Chao
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2020 – today
- 2025
[j2]Zhiteng Chao
, Xindi Zhang, Junying Huang, Zizhen Liu, Yixuan Zhao, Jing Ye, Shaowei Cai, Huawei Li, Xiaowei Li:
A fast test compaction method using dedicated Pure MaxSAT solver embedded in DFT flow. Integr. 100: 102265 (2025)- [j1]Zhiteng Chao, Feng Gu, Junying Huang, Wenjie Li, Jing Ye, Huawei Li, Xiaowei Li:
Memory-Efficient and Adaptive Heterogeneous Framework for Gate-Level Fault Simulation. ACM Trans. Design Autom. Electr. Syst. 30(5): 80:1-80:27 (2025) - [c8]Zhiteng Chao, Xindi Zhang, Xinyu Zhang, Jianan Mu, Zizhen Liu, Shengwen Liang, Shaowei Cai, Jing Ye, Xiaowei Li, Huawei Li:
PastATPG: A Hybrid ATPG Framework for Better Test Compaction with Partial Assignment SAT. DAC 2025: 1-7 - [c7]Mingjun Wang, Bin Sun, Jianan Mu, Feng Gu, Boyu Han, Tianmeng Yang, Xinyu Zhang, Silin Liu, Yihan Wen, Hui Wang, Jun Gao, Zhiteng Chao, Husheng Han, Zizhen Liu, Shengwen Liang, Jing Ye, Bei Yu, Xiaowei Li, Huawei Li:
MOSS: Multi-Modal Representation Learning on Sequential Circuits. DAC 2025: 1-7 - [c6]Zhiteng Chao, Rengang Zhang, Feng Gu, Hongqin Lyu, Bin Sun, Wenxing Li, Zizhen Liu, Jianan Mu, Jing Ye, Xiaowei Li, Huawei Li:
TESLA: Testability Enhancement for Shift-Left Automation via Multi-LLM Collaboration. ITC 2025: 45-52 - [c5]Zhiteng Chao, Bin Sun, Hongqin Lyu, Ge Yu, Minjun Wang, Wenxing Li, Zizhen Liu, Jianan Mu, Shengwen Liang, Jing Ye, Xiaowei Li, Huawei Li:
HighTPI: A Hierarchical Graph Based Intelligent Method for Test Point Insertion. VTS 2025: 1-7 - [i5]Jiaping Tang, Jianan Mu, Zizhen Liu, Zhiteng Chao, Jing Ye, Huawei Li:
Extend IVerilog to Support Batch RTL Fault Simulation. CoRR abs/2505.06687 (2025) - [i4]Yonghao Wang, Jiaxin Zhou, Hongqin Lyu, Zhiteng Chao, Tiancheng Wang, Huawei Li:
DeepAssert: An LLM-Aided Verification Framework with Fine-Grained Assertion Generation for Modules with Extracted Module Specifications. CoRR abs/2509.14668 (2025) - [i3]Hongqin Lyu, Yonghao Wang, Yunlin Du, Mingyu Shi, Zhiteng Chao, Wenxing Li, Tiancheng Wang, Huawei Li:
AssertGen: Enhancement of LLM-aided Assertion Generation through Cross-Layer Signal Bridging. CoRR abs/2509.23674 (2025) - [i2]Hongqin Lyu, Yunlin Du, Yonghao Wang, Zhiteng Chao, Tiancheng Wang, Huawei Li:
AssertFix: Empowering Automated Assertion Fix via Large Language Models. CoRR abs/2509.23972 (2025) - [i1]Hongqin Lyu, Yonghao Wang, Jiaxin Zhou, Zhiteng Chao, Tiancheng Wang, Huawei Li:
AssertMiner: Module-Level Spec Generation and Assertion Mining using Static Analysis Guided LLMs. CoRR abs/2511.10007 (2025) - 2024
- [c4]Zhiteng Chao, Xindi Zhang, Junying Huang, Jing Ye, Shaowei Cai, Huawei Li, Xiaowei Li:
A Fast Test Compaction Method for Commercial DFT Flow Using Dedicated Pure-MaxSAT Solver. ASPDAC 2024: 503-508 - [c3]Zhiteng Chao, Qinluan Dai, Jiale Li, Zizhen Liu, Wenxing Li, Hongqin Lyu, Jing Ye, Huawei Li, Xiaowei Li:
A Static Test Compaction Method Based on GCN Assisted Fault Gate Classification. ITC-Asia 2024: 1-6 - 2023
- [c2]Zhiteng Chao, Senlin Wang, Pengyu Tian, Shuwen Yuan, Huawei Li, Jing Ye, Xiaowei Li:
A Distributed ATPG System Combining Test Compaction Based on Pure MaxSAT. ATS 2023: 1-6 - 2020
- [c1]Yixuan Zhao, Zhiteng Chao, Jing Ye, Wen Wang, Yuan Cao, Shuai Chen, Xiaowei Li, Huawei Li:
Optimization Space Exploration of Hardware Design for CRYSTALS-KYBER. ATS 2020: 1-6
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