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ORCIDGiovanni De Micheli
- > Home > Persons > Giovanni De Micheli
Publications
- 2013
[j124]Somayyeh Rahimian, Vasilis F. Pavlidis, Xifan Tang, Giovanni De Micheli
:
An Enhanced Design Methodology for Resonant Clock Trees. J. Low Power Electron. 9(2): 198-206 (2013)- [j117]Hu Xu, Vasilis F. Pavlidis, Xifan Tang, Wayne P. Burleson, Giovanni De Micheli:
Timing Uncertainty in 3-D Clock Trees Due to Process Variations and Power Supply Noise. IEEE Trans. Very Large Scale Integr. Syst. 21(12): 2226-2239 (2013) - [c238]Shashikanth Bobba, Pierre-Emmanuel Gaillardon, Ciprian Seiculescu, Vasilis F. Pavlidis, Giovanni De Micheli:
3.5-D integration: A case study. ISCAS 2013: 2087-2090 - 2012
- [j113]Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli:
Effect of process variations in 3D global clock distribution networks. ACM J. Emerg. Technol. Comput. Syst. 8(3): 20:1-20:25 (2012) - [j112]Somayyeh Rahimian, Vasilis F. Pavlidis, Giovanni De Micheli:
Inter-Plane Communication Methods for 3-D ICs. J. Low Power Electron. 8(2): 170-181 (2012) - [c220]Cheng Zhang, Vasilis F. Pavlidis, Giovanni De Micheli:
Voltage propagation method for 3-D power grid analysis. DATE 2012: 844-847 - [c218]Vasilis F. Pavlidis, Hu Xu, Giovanni De Micheli:
Enhanced wafer matching heuristics for 3-D ICs. ETS 2012: 1 - [c216]Hu Xu, Vasilis F. Pavlidis, Wayne P. Burleson, Giovanni De Micheli:
The combined effect of process variations and power supply noise on clock skew and jitter. ISQED 2012: 320-327 - 2011
- [c206]Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli:
Analytical heat transfer model for thermal through-silicon vias. DATE 2011: 395-400 - [c201]Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli:
Skew variability in 3-D ICs with multiple clock domains. ISCAS 2011: 2221-2224 - [c196]Somayyeh Rahimian, Vasilis F. Pavlidis, Giovanni De Micheli:
Design of Resonant Clock Distribution Networks for 3-D Integrated Circuits. PATMOS 2011: 267-277 - 2010
- [c193]Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Vasilis F. Pavlidis, Giovanni De Micheli:
Performance analysis of 3-D monolithic integrated circuits. 3DIC 2010: 1-4 - [c192]Vasilis F. Pavlidis, Hu Xu, Ioannis Tsioutsios, Giovanni De Micheli:
Synchronization and power integrity issues in 3-D ICs. APCCAS 2010: 536-539 - [c181]Ioannis Tsioutsios, Vasilis F. Pavlidis, Giovanni De Micheli:
Physical design tradeoffs in power distribution networks for 3-D ICs. ICECS 2010: 430-433 - [c173]Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli:
Process-induced skew variation for scaled 2-D and 3-D ICs. SLIP 2010: 17-24 - 2009
- [c159]Vasilis F. Pavlidis, Giovanni De Micheli:
Power distribution paths in 3-D ICS. ACM Great Lakes Symposium on VLSI 2009: 263-268 - [c156]Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli:
Repeater Insertion for Two-Terminal Nets in Three-Dimensional Integrated Circuits. NanoNet 2009: 141-150
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