BibTeX record journals/tie/SridharanP07

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@article{DBLP:journals/tie/SridharanP07,
  author       = {K. Sridharan and
                  T. K. Priya},
  title        = {A Hardware Accelerator and {FPGA} Realization for Reduced Visibility
                  Graph Construction Using Efficient Bit Representations},
  journal      = {{IEEE} Trans. Ind. Electron.},
  volume       = {54},
  number       = {3},
  pages        = {1800--1804},
  year         = {2007},
  url          = {https://doi.org/10.1109/TIE.2007.894726},
  doi          = {10.1109/TIE.2007.894726},
  timestamp    = {Fri, 22 May 2020 15:33:14 +0200},
  biburl       = {https://dblp.org/rec/journals/tie/SridharanP07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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