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ORCID29th ASAP 2018: Milano, Italy
- 29th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2018, Milano, Italy, July 10-12, 2018. IEEE Computer Society 2018, ISBN 978-1-5386-7479-6
- Huiren Li, Anand Ramachandran, Deming Chen:
GPU Acceleration of Advanced k-mer Counting for Computational Genomics. 1-4 - Kaoru Saso, Yuko Hara-Azumi:
Simple Instruction-Set Computer for Area and Energy-Sensitive IoT Edge Devices. 1-4 - Julian Sarcher, Christian Scheglmann, Alexander Zoellner, Tim Dolereit, Michael Schaeferling, Matthias Vahl, Gundolf Kiefer:
A Configurable Framework for Hough-Transform-Based Embedded Object Recognition Systems. 1-8 - Sasindu Wijeratne, Sandaruwan Jayaweera
, Mahesh Dananjaya, Ajith Pasqual:
Reconfigurable Co-Processor Architecture with Limited Numerical Precision to Accelerate Deep Convolutiosnal Neural Networks. 1-7 - Ruizhe Zhao, Shuanglong Liu, Ho-Cheung Ng, Erwei Wang, James J. Davis, Xinyu Niu, Xiwei Wang, Huifeng Shi, George A. Constantinides, Peter Y. K. Cheung, Wayne Luk:
Hardware Compilation of Deep Neural Networks: An Overview. 1-8 - Juan Carlos Salinas-Hilburg, Marina Zapater, José Manuel Moya, José Luis Ayala:
Fast Energy Estimation Through Partial Execution of HPC Applications. 1-8 - Subramanian Shiva Shankar, Pinxing Lin, Andreas Herkersdorf, Thomas Wild:
BiSME: A Hardware Coprocessor to Perform Signature Matching at Multi-Gigabit Rates. 1-9 - Daniel Klimeck, Hanno Gerd Meyer, Jens Hagemeyer, Mario Porrmann, Ulrich Rückert:
Resource-efficient Reconfigurable Computer-on-Module for Embedded Vision Applications. 1-4 - Tuan D. Nguyen, Son Bui, James E. Stine:
Clarifications and Optimizations on Rounding for IEEE-compliant Floating-Point Multiplication. 1-8 - Francis P. Russell, James Stanley Targett, Wayne Luk:
From Tensor Algebra to Hardware Accelerators: Generating Streaming Architectures for Solving Partial Differential Equations. 1-8 - Yang Yue, Ying Li, Kexin Yi, Zhonghai Wu:
Synthetic Data Approach for Classification and Regression. 1-8 - Dimitris Theodoropoulos, Andrea Reale, Dimitris Syrivelis, Maciej Bielski, Nikolaos Alachiotis, Dionisios N. Pnevmatikatos:
REMAP: Remote mEmory Manager for disAggregated Platforms. 1-8 - Ahmet Erdem, Cristina Silvano, Thomas Boesch, Andrea C. Ornstein, Surinder Pal Singh, Giuseppe Desoli:
Design Space Exploration for Orlando Ultra Low-Power Convolutional Neural Network SoC. 1-7 - Marco Rabozzi, Emanuele Del Sozzo, Lorenzo Di Tucci, Marco D. Santambrogio:
Five-point algorithm: An efficient cloud-based FPGA implementation. 1-8 - Achim Lösch, Marco Platzner:
A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. 1-8 - Shengjia Shao, Jason Tsai, Michal Mysior, Wayne Luk, Thomas Chau, Alexander Warren, Ben Jeppesen:
Towards Hardware Accelerated Reinforcement Learning for Application-Specific Robotic Control. 1-8 - Antoniette Mondigo, Kentaro Sano, Hiroyuki Takizawa:
Performance Estimation of Deeply Pipelined Fluid Simulation on Multiple FPGAs with High-speed Communication Subsystem. 1-4 - Eric Flamand, Davide Rossi, Francesco Conti, Igor Loi, Antonio Pullini, Florent Rotenberg, Luca Benini:
GAP-8: A RISC-V SoC for AI at the Edge of the IoT. 1-4 - Hugues de Lassus Saint-Genies, Nicolas Brunie, Guillaume Revy:
Meta-implementation of vectorized logarithm function in binary floating-point arithmetic. 1-8 - Yi-Lun Liao, Yu-Cheng Li, Nae-Chyun Chen, Yi-Chang Lu:
Adaptively Banded Smith-Waterman Algorithm for Long Reads and Its Hardware Accelerator. 1-9 - Emanuele Del Sozzo, Marco Rabozzi, Lorenzo Di Tucci, Donatella Sciuto, Marco D. Santambrogio:
A Scalable FPGA Design for Cloud N-Body Simulation. 1-8 - Julie Dumas, Eric Guthmuller, Frédéric Pétrot:
Dynamic Coherent Cluster: A Scalable Sharing Set Management Approach. 1-8 - Emanuele Del Sozzo, Riyadh Baghdadi, Saman P. Amarasinghe, Marco D. Santambrogio:
A Unified Backend for Targeting FPGAs from DSLs. 1-8 - Éricles Sousa, Michael Witterauf, Marcel Brand, Alexandru Tanase, Frank Hannig, Jürgen Teich:
Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case Study. 1-9 - Xiebing Wang, Christopher Kiwus, Canhao Wu, Biao Hu, Kai Huang, Alois C. Knoll:
Implementing and Parallelizing Real-time Lane Detection on Heterogeneous Platforms. 1-8 - Qiong Chang, Tsutomu Maruyama:
Real-Time High-Quality Stereo Matching System on a GPU. 1-8 - Jose Raul Garcia Ordaz, Dirk Koch:
A Soft Dual-Processor System with a Partially Run-Time Reconfigurable Shared 128-Bit SIMD Engine. 1-8 - Linlong Xiao, Nanzhi Wang, Guocai Yang:
A Reading Comprehension Style Question Answering Model Based On Attention Mechanism. 1-4 - George Plastiras, Maria Terzi, Christos Kyrkou, Theocharis Theocharides:
Edge Intelligence: Challenges and Opportunities of Near-Sensor Machine Learning Applications. 1-7 - Davide Sampietro, Chiara Crippa, Lorenzo Di Tucci, Emanuele Del Sozzo, Marco D. Santambrogio:
FPGA-based PairHMM Forward Algorithm for DNA Variant Calling. 1-8 - Maxime France-Pillois, Jérôme Martin, Frédéric Rousseau:
Linux synchronization barrier on MPSoC: Hardware/software accurate study and optimization. 1-4 - Daolu Zha, Xi Jin, Rui Shang, Pengfei Yang:
A Real-Time Learning-Based Super-Resolution System Using Direct Simple Functions. 1-4 - Hesam Zolfaghari, Davide Rossi, Jari Nurmi:
An Explicitly Parallel Architecture for Packet Parsing in Software Defined Networks. 1-4 - Nasrin Akbari, Mehdi Modarressi, Masoud Daneshtalab, Mohammad Loni:
A Customized Processing-in-Memory Architecture for Biological Sequence Alignment. 1-8 - Bin Zou, Yantao Li:
Touch-based Smartphone Authentication Using Import Vector Domain Description. 1-4 - Mitali Sinha, Sri Harsha Gade, Wazir Singh, Sujay Deb:
Data-flow Aware CNN Accelerator with Hybrid Wireless Interconnection. 1-4 - Ayesha Afzal, Christian Schmitt, Samer Alhaddad, Yevgen Grynko, Jürgen Teich, Jens Förstner, Frank Hannig:
Solving Maxwell's Equations with Modern C++ and SYCL: A Case Study. 1-8 - Zulun Zhu, Shaowu Yang, Huadong Dai:
Enhanced Visual Loop Closing for Laser-Based SLAM. 1-4 - Antonio De Vita, Gian Domenico Licciardo, Luigi Di Benedetto, Danilo Pau, Emanuele Plebani, Angelo Bosco:
Low-power Design of a Gravity Rotation Module for HAR Systems Based on Inertial Sensors. 1-4 - Hosein Mohammadi Makrani, Hossein Sayadi, Sai Manoj P. D., Setareh Rafatirad, Houman Homayoun:
Compressive Sensing on Storage Data: An Effective Solution to Alleviate I/0 Bottleneck in Data- Intensive Workloads. 1-8 - Zelin Rong, Peidai Xie, Jingyuan Wang, Shenglin Xu, Yongjun Wang:
Clean the Scratch Registers: A Way to Mitigate Return-Oriented Programming Attacks. 1-8
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