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ORCIDVLSI Design, Volume 2009
Volume 2009, 2009
- Faizal Arya Samman
, Thomas Hollstein, Manfred Glesner:
Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management. 941701:1-941701:15 - Ramesh Vaddi, Sudeb Dasgupta, R. P. Agarwal:
Device and Circuit Design Challenges in the Digital Subthreshold Region for Ultralow-Power Applications. 283702:1-283702:14 - Rida S. Assaad, José Silva-Martínez:
Recent Advances on the Design of High-Gain Wideband Operational Transconductance Amplifiers. 323595:1-323595:11 - Mohammad Javad Sharifi, Davoud Bahrepour:
A New XOR Structure Based on Resonant-Tunneling High Electron Mobility Transistor. 803974:1-803974:9 - Xianwu Xing, Ching-Chuen Jong:
Floorplan-Driven Multivoltage High-Level Synthesis. 156751:1-156751:10 - Logan M. Rakai, Laleh Behjat, Shawki Areibi, Tamás Terlaky:
A Multilevel Congestion-Based Global Router. 537341:1-537341:13 - Peter Nilsson:
Architectures and Arithmetic for Low Static Power Consumption in Nanoscale CMOS. 749272:1-749272:10 - Min Zhang, Oliver Chiu-sing Choy:
Low-Cost Allocator Implementations for Networks-on-Chip Routers. 415646:1-415646:10 - Khader Mohammad, Ayman Dodin, Bao Liu, Sos S. Agaian:
Reduced Voltage Scaling in Clock Distribution Networks. 679853:1-679853:7
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