GenDP: A Framework of Dynamic Programming Acceleration for Genome Sequencing Analysis. - Gu, Yufeng; Subramaniyan, Arun; Dunn, Timothy; Khadem, Alireza; Chen, Kuan-Yu; Paul, Somnath; Vasimuddin, Mohammad; Misra, Sanchit; Blaauw, David T.; Narayanasamy, Satish; Das, Reetuparna (Commun. ACM, 2025)

DAP: A 507-GMACs/J 256-Core Domain Adaptive Processor for Wireless Communication and Linear Algebra Kernels in 12-nm FINFET. - Chen, Kuan-Yu; Yang, Chi-Sheng; Sun, Yu-Hsiu; Tseng, Chien-Wei; Fayazi, Morteza; He, Xin; Feng, Siying; Yue, Yufan; Mudge, Trevor N.; Dreslinski, Ronald G.; Kim, Hun-Seok; Blaauw, David T. (IEEE J. Solid State Circuits, 2025)

Palermo: Improving the Performance of Oblivious Memory using Protocol-Hardware Co-Design. - Ye, Haojie; Xia, Yuchen; Chen, Yuhan; Chen, Kuan-Yu; Yuan, Yichao; Deng, Shuwen; Kasikci, Baris; Mudge, Trevor N.; Talati, Nishil (2025)

FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs). - Krishnakumar, Anish; Yu, Hanguang; Ajayi, Tutu; Goksoy, A. Alper; Pandey, Vishrut; Mack, Joshua; Hassan, Md Sahil; Chen, Kuan-Yu; Chakrabarti, Chaitali; Bliss, Daniel W.; Akoglu, Ali; Kim, Hun-Seok; et al. (IEEE Des. Test, 2024)

Canalis: A Throughput-Optimized Framework for Real-Time Stream Processing of Wireless Communication. - Chen, Kuan-Yu; Nelson, Thomas Mason; Khadem, Alireza; Fayazi, Morteza; Singapuram, Sanjay Sri Vallabh; Dreslinski, Ronald G.; Talati, Nishil; Kim, Hun-Seok; Blaauw, David T. (ACM Trans. Reconfigurable Technol. Syst., 2024)

HypR: A comprehensive study for ASR hypothesis revising with a reference corpus. - Wang, Yiwei; Lu, Ke-Han; Chen, Kuan-Yu (2024)

ParaBase: A Configurable Parallel Baseband Processor for Ultra-High-Speed Inter-Satellite Optical Communications. - Choi, Seungkyu; Deng, Huanshihong; Chen, Kuan-Yu; Yue, Yufan; Blaauw, David T.; Kim, Hun-Seok (2024)

Palermo: Improving the Performance of Oblivious Memory using Protocol-Hardware Co-Design. - Ye, Haojie; Xia, Yuchen; Chen, Yuhan; Chen, Kuan-Yu; Yuan, Yichao; Deng, Shuwen; Kasikci, Baris; Mudge, Trevor N.; Talati, Nishil (CoRR, 2024)

GenDP: A Framework of Dynamic Programming Acceleration for Genome Sequencing Analysis. - Gu, Yufeng; Subramaniyan, Arun; Dunn, Timothy; Khadem, Alireza; Chen, Kuan-Yu; Paul, Somnath; Vasimuddin, Md.; Misra, Sanchit; Blaauw, David T.; Narayanasamy, Satish; Das, Reetuparna (2023)

Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory. - Kim, Sung; Fayazi, Morteza; Daftardar, Alhad; Chen, Kuan-Yu; Tan, Jielun; Pal, Subhankar; Ajayi, Tutu; Xiong, Yan; Mudge, Trevor N.; Chakrabarti, Chaitali; Blaauw, David T.; Dreslinski, Ronald G.; et al. (IEEE J. Solid State Circuits, 2022)

Squaring the circle: Executing Sparse Matrix Computations on FlexTPU - A TPU-Like Processor. - He, Xin; Chen, Kuan-Yu; Feng, Siying; Kim, Hun-Seok; Blaauw, David T.; Dreslinski, Ronald G.; Mudge, Trevor N. (2022)

Locality-Aware Optimizations for Improving Remote Memory Latency in Multi-GPU Systems. - Belayneh, Leul; Ye, Haojie; Chen, Kuan-Yu; Blaauw, David T.; Mudge, Trevor N.; Dreslinski, Ronald G.; Talati, Nishil (2022)

NDMiner: accelerating graph pattern mining using near data processing. - Talati, Nishil; Ye, Haojie; Yang, Yichen; Belayneh, Leul; Chen, Kuan-Yu; Blaauw, David T.; Mudge, Trevor N.; Dreslinski, Ronald G. (2022)

MeNDA: a near-memory multi-way merge solution for sparse transposition and dataflows. - Feng, Siying; He, Xin; Chen, Kuan-Yu; Ke, Liu; Zhang, Xuan; Blaauw, David T.; Mudge, Trevor N.; Dreslinski, Ronald G. (2022)

Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor. - Bliss, Daniel W.; Ajayi, Tutu; Akoglu, Ali; Aliyev, Ilkin; Basaklar, Toygun; Belayneh, Leul; Blaauw, David T.; Brunhaver, John S.; Chakrabarti, Chaitali; Chang, Liangliang; Chen, Kuan-Yu; Chen, Ming-Hung; et al. (2022)

A Long-Range Narrowband RF Localization System with a Crystal-Less Frequency-Hopping Receiver. - Tseng, Chien-Wei; Komma, Demba; Chen, Kuan-Yu; Rothe, Rohit; Feng, Zhen; Yasuda, Makoto; Kawaminami, Masaru; Kim, Hun-Seok; Blaauw, David T. (2022)

Mint: An Accelerator For Mining Temporal Motifs. - Talati, Nishil; Ye, Haojie; Vedula, Sanketh; Chen, Kuan-Yu; Chen, Yuhan; Liu, Daniel; Yuan, Yichao; Blaauw, David T.; Bronstein, Alex M.; Mudge, Trevor N.; Dreslinski, Ronald G. (2022)

A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Processor for Wireless Communication and Linear-Algebra Kernels in 12nm FINFET. - Chen, Kuan-Yu; Yang, Chi-Sheng; Sun, Yu-Hsiu; Tseng, Chien-Wei; Fayazi, Morteza; He, Xin; Feng, Siying; Yue, Yufan; Mudge, Trevor N.; Dreslinski, Ronald G.; Kim, Hun-Seok; Blaauw, David T. (2022)

SquiggleFilter: An Accelerator for Portable Virus Detection. - Dunn, Timothy; Sadasivan, Harisankar; Wadden, Jack; Goliya, Kush; Chen, Kuan-Yu; Blaauw, David T.; Das, Reetuparna; Narayanasamy, Satish (2021)

Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm. - Kim, Sung; Fayazi, Morteza; Daftardar, Alhad; Chen, Kuan-Yu; Tan, Jielun; Pal, Subhankar; Ajayi, Tutu; Xiong, Yan; Mudge, Trevor N.; Chakrabarti, Chaitali; Blaauw, David T.; Dreslinski, Ronald G.; et al. (2021)

Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm. - Kim, Sung; Fayazi, Morteza; Daftardar, Alhad; Chen, Kuan-Yu; Tan, Jielun; Pal, Subhankar; Ajayi, Tutu; Xiong, Yan; Mudge, Trevor N.; Chakrabarti, Chaitali; Blaauw, David T.; Dreslinski, Ronald G.; et al. (CoRR, 2021)

A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator. - Park, Dong-Hyeon; Pal, Subhankar; Feng, Siying; Gao, Paul; Tan, Jielun; Rovinski, Austin; Xie, Shaolin; Zhao, Chun; Amarnath, Aporva; Wesley, Timothy; Beaumont, Jonathan; Chen, Kuan-Yu; et al. (IEEE J. Solid State Circuits, 2020)

Sparse-TPU: adapting systolic arrays for sparse matrices. - He, Xin; Pal, Subhankar; Amarnath, Aporva; Feng, Siying; Park, Dong-Hyeon; Rovinski, Austin; Ye, Haojie; Chen, Kuan-Yu; Dreslinski, Ronald G.; Mudge, Trevor N. (2020)

A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm. - Pal, Subhankar; Park, Dong-Hyeon; Feng, Siying; Gao, Paul; Tan, Jielun; Rovinski, Austin; Xie, Shaolin; Zhao, Chun; Amarnath, Aporva; Wesley, Timothy; Beaumont, Jonathan; Chen, Kuan-Yu; et al. (2019)