"Min-Sum Decoder Architectures With Reduced Word Length for LDPC Codes."

Daesun Oh, Keshab K. Parhi (2010)

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DOI: 10.1109/TCSI.2009.2016171

access: closed

type: Journal Article

metadata version: 2024-08-04

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Daesun Oh, Keshab K. Parhi:
Min-Sum Decoder Architectures With Reduced Word Length for LDPC Codes. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(1): 105-115 (2010)

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