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23rd ASYNC 2017: San Diego, CA, USA

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23rd IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2017, San Diego, CA, USA, May 21-24, 2017. IEEE Computer Society 2017, ISBN 978-1-5386-2749-5

Intra-Chip Communication

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Weiwei Jiang, Steven M. Nowick:
A High-Throughput Asynchronous Multi-resource Arbiter Using a Pipelined Assignment Approach. 1-9
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Gabriele Miorandi, Marco Balboni, Steven M. Nowick, Davide Bertozzi:
Accurate Assessment of Bundled-Data Asynchronous NoCs Enabled by a Predictable and Efficient Hierarchical Synthesis Flow. 10-17

Metastability and Arbitration

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Robert Najvirt, Thomas Polzer, Andreas Steininger:
Measuring Metastability with Free-Running Clocks. 18-24
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Ghaith Tarawneh, Matthias Függer, Christoph Lenzen:
Metastability Tolerant Computing. 25-32
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Victor Khomenko, Danil Sokolov, Andrey Mokhov, Alex Yakovlev:
WAITX: An Arbiter for Non-persistent Signals. 33-40

Asynchronous Interfaces and NoCs

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Ameer M. S. Abdelhadi, Mark R. Greenstreet:
Interleaved Architectures for High-Throughput Synthesizable Synchronization FIFOs. 41-48
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Matthias Függer, Attila Kinali, Christoph Lenzen, Thomas Polzer:
Metastability-Aware Memory-Efficient Time-to-Digital Converters. 49-56

Modelling and Design Automation

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Johnson Fernandes, Danil Sokolov, Alex Yakovlev:
Elastic Bundles: Modelling and Synthesis of Asynchronous Circuits with Granular Rigidity. 57-64
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Jean Simatic, Abdelkarim Cherkaoui, François Bertrand, Rodrigo Possamai Bastos, Laurent Fesquet:
A Practical Framework for Specification, Verification, and Design of Self-Timed Pipelines. 65-72
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Jordi Cortadella, Alberto Moreno, Danil Sokolov, Alex Yakovlev, David Lloyd:
Waveform Transition Graphs: A Designer-Friendly Formalism for Asynchronous Behaviours. 73-74

Delay Lines and Bundled Data Design

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Alberto Moreno, Jordi Cortadella:
Synthesis of All-Digital Delay Lines. 75-82
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Maxwell Waugaman, William Koven:
Sharp - A Resilient Asynchronous Template. 83-84

Theory, Analysis and Test

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Yang Zhang, Haipeng Zha, Vaishnavi Sahir, Huimei Cheng, Peter A. Beerel:
Test Margin and Yield in Bundled Data and Ring-Oscillator Based Designs. 85-93
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Chun-Hong Shih, Jie-Hong R. Jiang:
Criticality and Sensitivity Analysis for Incremental Performance Optimization of Asynchronous Pipelines. 94-101
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Rajit Manohar, Yoram Moses:
The Eventual C-Element Theorem for Delay-Insensitive Asynchronous Circuits. 102-109

Application of Asynchronous Designs

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Montek Singh, Pintian Zhang, Andrew Vitkus, Ketan Mayer-Patel, Leandra Vicci:
A Frameless Imaging Sensor with Asynchronous Pixels: An Architectural Evaluation. 110-117
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Naoya Onizawa, Masashi Imai, Takahiro Hanyu, Tomohiro Yoneda:
MTJ-based Asynchronous Circuits for Re-initialization Free Computing against Power Failures. 118-125

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