IEEE Transactions on Computers, Volume 44

Volume 44, Number 1, January 1995

Constraint Specification

• 
  Andrés Takach, Wayne H. Wolf, Miriam Leeser:
  An Automaton Model for Scheduling Constraints in Synchronous Machines. 1-12

Cryptosystems

• 
  Chu-Hsing Lin, Chin-Chen Chang, Richard C. T. Lee:
  New Public-Key Cipher System Based Upon the Diophantine Equations. 13-19

Distributed Software

• 
  C. Murray Woodside, John E. Neilson, Dorina C. Petriu, Shikharesh Majumdar:
  The Stochastic Rendezvous Network Model for Performance of Synchronous Client-Server-like Distributed Software. 20-34

Fault-Tolerant Computing

• 
  Chung-Chi Jim Li, Shyh-Kwei Chen, W. Kent Fuchs, Wen-mei W. Hwu:
  Compiler-Based Multiple Instruction Retry. 35-46

Hypercube Routing

• 
  S. Lennart Johnsson, Ching-Tien Ho:
  On the Conversion Between Binary Code and Binary-Reflected Gray Code on Binary Cubes. 47-53

Microprocessor Modeling

• 
  Phillip J. Windley:
  Formal Modeling and Verification of Microprocessors. 54-72

Real-Time Systems

• 
  Jay K. Strosnider, John P. Lehoczky, Lui Sha:
  The Deferrable Server Algorithm for Enhanced Aperiodic Responsiveness in Hard Real-Time Environments. 73-91

Vector Memory Access

• 
  Christine Fricker:
  On Memory Contention Problems in Vector Multiprocessors. 92-105

VLSI Routing

• 
  Chao Chi Tong, Chuan-lin Wu:
  Routing in a Three-Dimensional Chip. 106-117

Brief Contributions

• 
  Keiichi Iwamura, Yasunori Dohi, Hideki Imai:
  A Design of Reed-Solomon Decoder with Systolic Array Structure. 118-122
• 
  Bernard L. Menezes, Umesh Bakhru:
  New Bounds on the Reliability of Augmented Shuffle-Exchange Networks. 123-129
• 
  Shuenn-Shyang Wang, Ming-Yuan Shau:
  Single Residue Error Correction Based on K-Term m_j-Projection. 129-131
• 
  Richard Mazzaferri, Teresa M. Murray:
  The Connection Network Class for Fault Tolerant Meshes. 131-138
• 
  Irith Pomeranz, Sudhakar M. Reddy:
  Aliasing Computation Using Fault Simulation with Fault Dropping. 139-144
• 
  Paolo Montuschi, Luigi Ciminiera:
  A Remark on "Reducing Iteration Time when Result Digit is Zero for Radix-2 SRT Division and Square Root with Redundant Remainders". 144-150
• 
  Jehoshua Bruck, Robert Cypher, Ching-Tien Ho:
  Wildcard Dimensions, Coding Theory and Fault-Tolerant Meshes and Hypercubes. 150-155
• 
  Debasish Das, Krishnendu Mukhopadhyaya, Bhabani P. Sinha:
  Implementation of Four Common Functions on an LNS Co-Processor. 155-161

Comments

• 
  Anton T. Dahbura, Gerald M. Masson:
  Large Response to "Comments on 'An O(n^2.5) Fault Identification Algorithm for Diagnosable Systems"'. IEEE Trans. Computers 44(1): 162 (1995)

Volume 44, Number 2, February 1995

Architecture and Software

• 
  Nirmal R. Saxena, David Chih-Wei Chang, Kevin Dawallu, Jaspal Kohli, Pat Helland:
  Fault-Tolerant Features in the HaL Memory Management Unit. 170-180
• 
  Stefan Poledna:
  Tolerating Sensor Timing Faults in Highly Responsive Hard Real-Time Systems. 181-191
• 
  Mario Blaum, Jim Brady, Jehoshua Bruck, Jai Menon:
  EVENODD: An Efficient Scheme for Tolerating Double Disk Failures in RAID Architectures. 192-202
• 
  Richard D. Schlichting, Vicraj T. Thomas:
  Programming Language Support for Writing Fault-Tolerant Distributed Software. 203-212

Testing

• 
  Wuudiann Ke, Premachandran R. Menon:
  Synthesis of Delay-Verifiable Combinational Circuits. 213-222
• 
  Sybille Hellebrand, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, Bernard Courtois:
  Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. 223-233
• 
  Amitava Majumdar, Sarma B. K. Vrudhula:
  Fault Coverage and Test Length Estimation for Random Pattern Testing. 234-247

Fault Injection

• 
  Ghani A. Kanawati, Nasser A. Kanawati, Jacob A. Abraham:
  FERRARI: A Flexible Software-Based Fault and Error Injection System. 248-260
• 
  David Powell, Eliane Martins, Jean Arlat, Yves Crouzet:
  Estimators for Fault Tolerance Coverage Evaluation. 261-274

Analysis (Stochastic and Deterministic)

• 
  Suresh Rai:
  Evaluating FTRE's for Dependability Measures in Fault Tolerant Systems. 275-285
• 
  Gerardo Rubino, Bruno Sericola:
  Interval Availability Analysis Using Denumerable Markov Processes: Application to Multiprocessor Subject to Breakdowns and Repair. 286-291
• 
  Fuxing Wang, Krithi Ramamritham, John A. Stankovic:
  Determining Redundancy Levels for Fault Tolerant Real-Time Systems. 292-301
• 
  Daniel Boley, Gene H. Golub, Samy Makar, Nirmal R. Saxena, Edward J. McCluskey:
  Floating Point Fault Tolerance with Backward Error Assertions. 302-311

Fault Diagnosis

• 
  Sampath Rangarajan, Anton T. Dahbura, Eric A. Ziegler:
  A Distributed System-Level Diagnosis Algorithm for Arbitrary Network Topologies. 312-334

Brief Contributions

• 
  Irith Pomeranz, Sudhakar M. Reddy:
  On Fault Simulation for Synchronous Sequential Circuits. 335-340
• 
  Jie Xu, Shi-ze Huang:
  Sequentially t-Diagnosable Systems: A Characterization and Its Applications. 340-345
• 
  Hong-Yi Tzeng, Kai-Yeung Siu:
  Message-Optimal Protocols for Fault-Tolerant Broadcasts/Multicasts in Distributed Systems with Crash Failures. 346-352

Volume 44, Number 3, March 1995

Compiler Techniques

• 
  Pohua P. Chang, Daniel M. Lavery, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu:
  The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors. 353-370

Fault Tolerance

• 
  Dipanwita Roy Chowdhury, Indranil Sengupta, Parimal Pal Chaudhuri:
  CA-Based Byte Error-Correcting Code. 371-382
• 
  Mark G. Karpovsky, Tatyana D. Roziner, Claudio Moraga:
  Fault Detection in Multiprocessor Systems and Array Processors. 383-393

Memory and Storage Management

• 
  Sedat Akyürek, Kenneth Salem:
  Management of Partially Safe Buffers. 394-407
• 
  Nicholas S. Bowen, Dhiraj K. Pradhan:
  A Fault Tolerant Hybrid Memory Structure and Memory Management Algorithms. 408-418
• 
  Arif Merchant, Philip S. Yu:
  Analytic Modeling and Comparisons of Striping Strategies for Replicated Disk Arrays. 419-433

Testing Methods and Tools

• 
  Debashis Bhattacharya, Prathima Agrawal, Vishwani D. Agrawal:
  Test Generation for Path Delay Faults Using Binary Decision Diagrams. 434-447

Brief Contributions

• 
  Hasan Cam, José A. B. Fortes:
  A Fast VLSI-Efficient Self-Routing Permutation Network. 448-453
• 
  Weng-Fai Wong, Eiichi Goto:
  Fast Evaluation of the Elementary Functions in Single Precision. 453-457
• 
  Daniel C. McCrackin:
  Practical Delay Enforced Multistream (DEMUS) Control of Deeply Pipelined Processors. 458-462
• 
  Sampath Rangarajan, Yennun Huang, Satish K. Tripathi:
  Computing Reliability Intervals for k-Resilient Protocols. 462-466
• 
  Wei-Kuan Shih, Jane W.-S. Liu:
  Algorithms for Scheduling Imprecise Computations with Timing Constraints to Minimize Maximum Error. 466-471
• 
  Richard Gerber, William W. Pugh, Manas Saksena:
  Parametric Dispatching of Hard Real-Time Tasks. 471-479

Volume 44, Number 4, April 1995

Compiler Techniques

• 
  Pohua P. Chang, Nancy J. Warter, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu:
  Three Architecutral Models for Compiler-Controlled Speculative Execution. 481-494

Complexity Theory

• 
  Paul E. S. Dunne, Paul H. Leng, Gerald F. Nwana:
  On the Complexity of Boolean Functions Computed by Lazy Oracles. 495-502

Computer Architecture

• 
  Jyh-Charn Liu, Kang G. Shin:
  Efficient Implementation Techniques for Gracefully Degradable Multiprocessor Systems. 503-517
• 
  Kay A. Robbins, Steven Robbins:
  Buffered Banks in Multiprocessor Systems. 518-530
• 
  Valerie E. Taylor, Abhiram G. Ranade, David G. Messerschmitt:
  SPAR: A New Architecture for Large Finite Element Computations. 531-545

Memory and Storage Management

• 
  Christos Faloutsos, Raymond T. Ng, Timos K. Sellis:
  Flexible and Adaptable Buffer Management Techniques for Database Management Systems. 546-560

Modeling and Performance Evaluation

• 
  Paulo B. Góes, Ushio Sumita:
  Stochastic Models for Performance Analysis of Database Recovery Control. 561-576
• 
  Yao Li, C. Murray Woodside:
  Complete Decomposition of Stochastic Petri Nets Representing Generalized Service Networks. 577-592

Brief Contributions

• 
  Vincenzo Auletta, Adele Anna Rescigno, Vittorio Scarano:
  Embedding Graphs onto the Supercube. 593-597
• 
  Mario Alberto López, Ramakrishna Thurimella:
  On Computing Connected Components of Line Segments. 597-601
• 
  Yuen-Hsien Tseng, Ja-Ling Wu:
  On a Constant-Time, Low-Complexity Winner-Take-All Neural Network. 601-604
• 
  Xiaojun Shen, Mao Xu, Xiangzu Wang:
  An Optimal Algorithm for Permutation Admissibility to Multistage Interconnection Networks. 604-608

Volume 44, Number 5, May 1995

Computer Architecture

• 
  Tien-Fu Chen, Jean-Loup Baer:
  Effective Hardware Based Data Prefetching for High-Performance Processors. 609-623
• 
  Elio D. Di Claudio, Francesco Piazza, Gianni Orlandi:
  Fast Combinatorial RNS Processors for DSP Applications. 624-633
• 
  Mateo Valero, Tomás Lang, Montse Peiron, Eduard Ayguadé:
  Conflict-Free Access for Streams in Multimodule Memories. 634-646

Interconnection Networks

• 
  Paul Cull, Shawn M. Larson:
  The Möbius Cubes. 647-659
• 
  Mario Blaum, Jehoshua Bruck:
  Delay-Insensitive Pipelined Communicatioon on Parallel Buses. 660-668

Load Balancing and Processor Allocation

• 
  Kang G. Shin, Yi-Chieh Chang:
  A Coordinated Location Policy for Load Sharing in Hypercube-Connected Multicomputers. 669-682
• 
  Jong-Chuang Tsay, Pen-Yuang Chang:
  Design of Space-Optimal Regular Arrays for Algorithms with Linear Schedules. 683-694

Brief Contributions

• 
  Hasan Cam, José A. B. Fortes:
  Frames: A Simple Characterization of Permutations Realized by Frequently Used Networks. 695-697
• 
  Ravi Nair:
  Optimal 2-Bit Branch Predictors. 698-702
• 
  Jie Wu:
  Safety Levels-An Efficient Mechanism for Achieving Reliable Broadcasting in Hypercubes. 702-706
• 
  Daniel Cohen-Or, Arie E. Kaufman:
  A 3D Skewing and De-skewing Scheme for Conflict-Free Access to Rays in Volume Rendering. 707-710
• 
  Nitin H. Vaidya:
  Unidirectional Bit/Byte Error Control. 710-714
• 
  Xiaojun Shen:
  Optimal Realization of Any BPC Permutation on K-Extra-Stage Omega Networks. 714-719
• 
  Ching-Farn Eric Wu, Yarsun Hsu, Yew-Huey Liu:
  Efficient Stack Simulation for Set-Associative Virtual Address Cache with Real Tags. 719-723
• 
  Claude Thibeault, Yvon Savaria, Jean-Louis Houle:
  Equivalence Proofs of Some Yield Modeling Methods for Defect-Tolerant Integrated Circuits. 724-728
• 
  Sung-Ming Yen, Chi-Sung Laih:
  Improved Digital Signature Algorithm. 729-730
• 
  Jae Young Lee, Hee Yong Youn, Adit D. Singh:
  Adaptive Unanimous Voting (UV) Scheme for Distributed Self-Diagnosis. 730-735

Volume 44, Number 6, June 1995

Compiler Techniques

• 
  Janet Wu, Raja Das, Joel H. Saltz, Harry Berryman, Seema Hiranandani:
  Distributed Memory Compiler Design for Sparse Problems. 737-754

Logic Design

• 
  Stephen H. Unger:
  Hazards, Critical Races, and Metastability. 754-768

Neural Networks

• 
  Qutaibah M. Malluhi, Magdy A. Bayoumi, T. R. N. Rao:
  Efficient Mapping of ANNs on Hypercube Massively Parallel Machines. 769-779

Testing Algorithms, Methods and Tools

• 
  Slawomir Pilarski, Kevin James Wiebe:
  Counter-Based Compaction: Delay and Stuck-Open Faults. 780-791
• 
  Irith Pomeranz, Sudhakar M. Reddy:
  INCREDYBLE: A New Search Strategy for Design Automation Problems with Applications to Testing. 792-804
• 
  Samir Boubezari, Bozena Kaminska:
  A Deterministic Built-In-Self-Test Generator Based on Cellular Automata Structures. 805-816
• 
  Yuejian Wu, André Ivanov:
  Single-Reference Multiple Intermediate Signature (SREMIS) Analysis for BIST. 817-825

Brief Contributions

• 
  Hosahalli R. Srinivas, Keshab K. Parhi:
  A Fast Radix-4 Division Algorithm and Its Architecture. 826-831

Volume 44, Number 7, July 1995

• 
  Gregory F. Sullivan, Dwight S. Wilson, Gerald M. Masson:
  Certification of Computational Results. 833-847
• 
  Rajendra V. Boppana, Suresh Chalasani:
  Fault-Tolerant Wormhole Routing Algorithms for Mesh Networks. 848-864
• 
  Srinivasan Tridandapani, Arun K. Somani, Upender R. Sandadi:
  Low Overhead Multiprocessor Allocation Strategies Exploiting System Space Capacity for Fault Detection and Location. 865-877

Performance Evaluation

• 
  Luiz André Barroso, Michel Dubois:
  Performance Evaluation of the Slotted Ring Multiprocessor. 878-890
• 
  Yooichi Shintani, Kiyoshi Inoue, Eiki Kamada, Toru Shonai:
  A Performance and Cost Analysis of Applying Superscalar Method to Mainframe Computers. 891-902

Theory and Algorithms

• 
  Youssef Saab:
  A Fast and Robust Network Bisection Algorithm. 903-913
• 
  Mikhail J. Atallah, Danny Z. Chen:
  Optimal Parallel Hypercube Algorithms for Polygon Problems. 914-922
• 
  Priyalal Kulasinghe, Saïd Bettayeb:
  Embedding Binary Trees into Crossed Cubes. 923-929

Brief Contributions

• 
  Christopher J. Zarowski:
  Parallel Implementation of the Schur Belekamp-Massey Algorithm on a Linearly Connected Processor Array. 930-933
• 
  Neil Burgess, Ted Williams:
  Choices of Operand Truncation in the SRT Division Algorithm. 933-938
• 
  M. Anwarul Hasan, Vijay K. Bhargava:
  Architecture for a Low Complexity Rate-Adaptive Reed-Solomon Encoder. 938-942
• 
  Eskil Dekker, Len Dekker:
  Parallel Minimal Norm Method of Tridiagonal Linear Systems. 942-946
• 
  Steffen Paul, Jürgen Götze, Matthias Sauer:
  Error Analysis of CORDIC-Based Jacobi Algorithms. 947-951
• 
  Yeimkuan Chang, Laxmi N. Bhuyan:
  A Combinatorial Analysis of Subcube Reliability in Hybercubes. 952-956
• 
  Sung-Ming Yen, Chi-Sung Laih:
  Improved Digital Signature Suitable for Batch Verification. 957-959

Volume 44, Number 8, August 1995

Computer Arithmetic

• 
  Zhongde Wang, Graham A. Jullien, William C. Miller:
  A New Design Technique for Column Compression Multipliers. 962-970
• 
  Stephen E. McQuillan, John V. McCanny:
  A Systematic Methodology for the Design of High Performance Recursive Digital Filters. 971-982
• 
  Markus A. Hitz, Erich L. Kaltofen:
  Integer Division in Residue Number Systems. 983-989
• 
  Shen-Fu Hsiao, Jean-Marc Delosme:
  Householder CORDIC Algorithms. 990-1001

Logic Design

• 
  Jun-Woo Kang, Chin-Long Wey, P. David Fisher:
  Application of Bipartite Graphs for Achieving Race-Free State Assignment. 1002-1011

Multiple-Valued Logic

• 
  Zeljko Zilic, Zvonko G. Vranesic:
  A Multiple-Valued Reed-Muller Transform for Incompletely Specified Functions. 1012-1020

Theory and Algorithms

• 
  Bella Bose, Bob Broeg, Younggeun Kwon, Yaagoub Ashir:
  Lee Distance and Topological Properties of k-ary n-cubes. 1021-1030

Corrected Reprinted Paper

• 
  Yao Li, C. Murray Woodside:
  Complete Decomposition of Stochastic Petri Nets Representing Generalized Service Networks (Corrected Version). 1031-1046

Brief Contributions

• 
  Giuseppe A. De Biase, Claudia Ferrone, Annalisa Massini:
  An O(log₂ N) Depth Asymptotically Nonblocking Self-Routing Permutation Network. 1047-1051
• 
  Stephen W. Turner, Lionel M. Ni, Betty H. C. Cheng:
  Contention-Free 2D-Mesh Cluster Allocation in Hypercubes. 1051-1055
• 
  Vassilios V. Dimakopoulos, G. Sourtziotis, Antonis M. Paschalis, Dimitris Nikolos:
  On TSC Checkers for m-out-n Codes. 1055-1059
• 
  Patrick T. Gaughan, Sudhakar Yalamanchili:
  A Performance Model of Pipelined K-ary n-cubes. 1059-1063
• 
  Burton S. Kaliski Jr.:
  The Montgomery Inverse and Its Applications. 1064-1065
• 
  Ahmed El-Amawy, Yi Chang Tseng:
  Maximum Performance Pipelines With Switchable Reservation Tables. 1066-1069

Volume 44, Number 9, September 1995

Availability and Reliability

• 
  Prasant Mohapatra, Chita R. Das:
  On Dependability Evaluation of Mesh-Connected Processors. 1073-1084

Fault Tolerance

• 
  Tsang-Ling Sheu, Woei Lin, Chita R. Das:
  Distributed Fault Diagnosis in Multistage Network-Based Multiprocessors. 1085-1095
• 
  Neal J. Alewine, Shyh-Kwei Chen, W. Kent Fuchs, Wen-mei W. Hwu:
  Compiler-Assisted Multiple Instruction Rollback Recovery Using a Read Buffer. 1096-1107
• 
  Yeimkuan Chang, Laxmi N. Bhuyan:
  Subcube Fault Tolerance in Hypercube Multiprocessors. 1108-1120

Processor Architecture

• 
  Jermy C. Smith, Fred J. Taylor:
  A Fault-Tolerant GEQRNS Processing Element for Linear Systolic Array DSP Applications. 1121-1130

Security

• 
  Howard M. Heys, Stafford E. Tavares:
  Avalanche Characteristics of Substitution-Permutation Encryption Networks. 1131-1139

Brief Contributions

• 
  Daniel I. Katcher, Shirish S. Sathaye, Jay K. Strosnider:
  Fixed Priority Scheduling with Limited Priority Levels. 1140-1144
• 
  Xiaojun Shen:
  An Optimal O(NlgN) Algorithm for Permutation Admissibility to Extra-Stage Cube-Type Networks. 1144-1149
• 
  Luke O'Connor:
  A Differential Cryptananlysis of Tree-Structured Substitution-Permutation Networks. 1150-1152
• 
  Cauligi S. Raghavendra, Pei-Ji Yang, Sing-Ban Tien:
  Free Dimensions-An Effective Approach to Achieving Fault Tolerance in Hypercubes. 1152-1157
• 
  Choong Gun Oh, Hee Yong Youn, Vijay K. Raj:
  An Efficient Algorithm-Based Concurrent Error Detection for FFT Networks. 1157-1162
• 
  Jie Wu, Kejun Yao:
  A Limited-Global-Informatin-Based Multicasting Scheme for Faulty Hypercubes. 1162-1167

Volume 44, Number 10, October 1995

Interconnection Networks

• 
  Yuanyuan Yang, Gerald M. Masson:
  Broadcast Ring Sandwich Networks. 1169-1180
• 
  Wei-Kuo Liao, Chung-Ta King:
  Valved Routing: Efficient Flow Control for Adaptive Nonminimal Routing in Interconnection Networks. 1181-1193

Modeling and Performance Evaluation

• 
  Theodore Johnson:
  Characterizing the Performance of Algorithms for Lock-Free Objects. 1194-1207
• 
  Frank T. Hady, Bernard L. Menezes:
  The Performance of Crossbar-Based Binary Hypercubes. 1208-1215
• 
  Pierre Semal:
  Refinable Bounds for Large Markov Chains. 1216-1222
• 
  Rafael H. Saavedra, Alan Jay Smith:
  Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes. 1223-1235

Memory and Storage Management

• 
  Vincenzo Catania, Antonio Puliafito, Salvatore Riccobene, Lorenzo Vita:
  Design and Performance Analysis of a Disk Array System. 1236-1247

Brief Contributions

• 
  Priyalal Kulasinghe, Ahmed El-Amawy:
  On the Complexity of Optimal Bused Interconnections. 1248-1251
• 
  Mohamed Soufi, Yvon Savaria, F. Darlay, Bozena Kaminska:
  Producing Reliable Initialization and Test of Sequential Circuits with Pseudorandom Vectors. 1251-1256
• 
  Karl M. Sammut, S. R. Jones:
  Arithmetic Unit Design for Neural Accelerators: Cost Performance Issues. 1256-1260
• 
  Dipanwita Roy Chowdhury, Idranil Sen Gupta, Parimal Pal Chaudhuri:
  A Low-Cost High-Capacity Associative Memory Design Using Cellular Automata. 1260-1264

Volume 44, Number 11, November 1995

Built-In Self-Test

• 
  Shou-ping Feng, Toru Fujiwara, Tadao Kasami, Kazuhiko Iwasaki:
  On the Maximum Value of Aliasing Probabilities for Single Input Signature Registers. 1265-1274
• 
  Michal Kopec:
  Can Nonlinear Compactors Be Better than Linear Ones. 1275-1282
• 
  Mody Lempel, Sandeep K. Gupta:
  Zero Aliasing for Modeled Faults. 1283-1295

Fault Tolerance

• 
  Kaushik Roy, Sudip Nag:
  On Routability for FPGAs under Faulty Conditions. 1296-1305
• 
  Henrik Hulgaard, Steven M. Burns, Tod Amon, Gaetano Borriello:
  An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems. 1306-1317

Brief Contributions

• 
  Th. Haniotakis, Antonis M. Paschalis, Dimitris Nikolos:
  Efficient Totally Self-Checking Checkers for a Class of Borden Codes. 1318-1322
• 
  Bjørn Olstad, Fredrik Manne:
  Efficient Partitioning of Sequences. 1322-1326
• 
  David M. Mandelbaum:
  Division Using a Logarithmic-Exponential Transform to Form a Short Reciprocal. 1326-1330
• 
  Anders G. Skolleborg, Jos H. Weber:
  Construction of Systematic Codes for Unidirectional Error Control. 1331-1334
• 
  Kuo-Liang Chung, Wen-Ming Yan:
  Fast Vectorization for Calculating a Moving Sum. 1335-1337
• 
  Tsutomu Ishikawa:
  Hypercube Multiprocessors with Bus Connections for Improving Communication Performance. 1338-1344
• 
  Ching Yu Hung, Behrooz Parhami:
  Error Analysis of Approximate Chinese-Reminder-Theorem Decoding. 1344-1348
• 
  Roger A. Smith:
  A Continued-Fraction Analysis of Trigonometric Argument Reduction. 1348-1351
• 
  Bapiraju Vinnakota:
  Implementing Multiplication with Split Read-Only Memory. 1352-1356

Comment

• 
  Gihyun Jung:
  Comments on "Some Additions to Solution of Switching Equations Based on a Tabular Algebra". 1357-1358

Volume 44, Number 12, December 1995

Formal Methods and Specification

• 
  Riccardo Sisto, Adriano Valenzano:
  Mapping Petri Nets with Inhibitor Arcs onto Basic LOTOS Behavior Expressions. 1361-1370

Modeling and Performance Evaluation

• 
  John C. S. Lui, Richard R. Muntz, Donald F. Towsley:
  Bounding the Mean Response Time of the Minimum Expected Delay Routing Policy: An Algorithmic Approach. 1371-1382
• 
  Barry S. Fagin, Amit Mital:
  The Performance of Counter- and Correlation-Based Schemes for Branch Target Buffers. 1383-1393
• 
  Weibo Gong, Hong Yang:
  Rational Approximants for Some Performance Analysis Problems. 1394-1404

Real-Time Systems

• 
  Kang G. Shin, Yi-Chieh Chang:
  A Reservation-Based Algorithm for Scheduling Both Periodic and Aperiodic Real-Time Tasks. 1405-1419
• 
  Moncef Hamdaoui, Parameswaran Ramanathan:
  Deferring Real-Time Traffic for Improved Non-Real-Time Communication in FDDI Networks. 1420-1428
• 
  Almut Burchard, Jörg Liebeherr, Yingfeng Oh, Sang Hyuk Son:
  New Strategies for Assigning Real-Time Tasks to Multiprocessor Systems. 1429-1442
• 
  Moncef Hamdaoui, Parameswaran Ramanathan:
  A Dynamic Priority Assignement Technique for Streams with (m, k)-Firm Deadlines. 1443-1451

Brief Contribution

• 
  Krishnendu Mukhopadhyaya, Bhabani P. Sinha:
  Fault-Tolerant Routing in Distributed Loop Networks. 1452-1456
• 
  Manuel Valencia-Barrero, Manuel J. Bellido, José L. Huertas, Antonio J. Acosta, Santiago Sánchez-Solano:
  Modular Asynchronous Arbiter Insensitive to Metastability. 1456-1461
• 
  K. Wendy Tang, Bruce W. Arden:
  Class-Congruence Property and Two-Phase Routing of Borel Cayley Graphs. 1462-1468
• 
  Frank K. Hwang, Paul E. Wright:
  Survival Reliability of Some Double-Loop Networks and Chordal Rings. 1468-1471

Comment

• 
  Rajendra S. Katti:
  Comments on "A Systematic (16, 8) Code for Correcting Double Errors and Detecting Triple-Adjacent Errors". 1472-1473
• 
  T. Aaron Gulliver, Vijay K. Bhargava:
  Authors' Reply. IEEE Trans. Computers 44(12): 1473-1474 (1995)