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Handbook of Algorithms for Physical Design Automation 2008

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Charles J. Alpert, Dinesh P. Mehta, Sachin S. Sapatnekar:
Handbook of Algorithms for Physical Design Automation. Auerbach Publications 2008, ISBN 978-0-8493-7242-1
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Charles J. Alpert, Dinesh P. Mehta, Sachin S. Sapatnekar:
Introduction to Physical Design.
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Ralph H. J. M. Otten:
Layout Synthesis.
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Frank Liu, Sachin S. Sapatnekar:
Metrics Used in Physical Design.
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Dinesh P. Mehta, Hai Zhou:
Basic Data Structures.
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Vishal Khandelwal, Ankur Srivastava:
Basic Algorithmic Techniques.
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Zhi-Quan Luo:
Optimization Techniques for Circuit Design Applications.
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Dorothy Kucar:
Partitioning and Clustering.
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Susmita Sur-Kolay:
Floorplanning.
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Ting-Chi Wang, Martin D. F. Wong:
Slicing Floorplans.
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Evangeline F. Y. Young:
Floorplan Representations.
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Tung-Chieh Chen, Yao-Wen Chang:
Packing Floorplan Representations.
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Dinesh P. Mehta, Yan Feng:
Recent Advancesin Floorplanning.
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Louis K. Scheffer:
Industrial Floorplanning and Prototyping.
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Gi-Joon Nam, Paul G. Villarrubia:
Placement.
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Jarrod A. Roy, Igor L. Markov:
Partitioning-Based Methods.
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William Swartz:
Placement Using Simulated Annealing.
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Ulrich Brenner, Jens Vygen:
Analytical Methods in Placement.
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Andrew A. Kennings, Kristofer Vorwerk:
Force-Directed and Other Continuous Placement Methods.
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Jason Cong, Joseph R. Shinnerl:
Enhancing Placement with Multilevel Techniques.
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Ameya R. Agnihotri, Patrick H. Madden:
Legalization and Detailed Placement.
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David Z. Pan, Bill Halpin, Haoxing Ren:
Timing-Driven Placement.
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Saurabh N. Adya, Xiaojian Yang:
Congestion-Driven Physical Design.
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Muhammet Mustafa Ozdal, Martin D. F. Wong:
Global Routing Formulation and Maze Routing.
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Gabriel Robins, Alexander Zelikovsky:
Minimum Steiner Tree Construction.
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Jiang Hu, Gabriel Robins, Cliff C. N. Sze:
Timing-Driven Interconnect Synthesis.
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Jiang Hu, Zhuo Li, Shiyan Hu:
Buffer Insertion Basics.
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Milos Hrkic, John Lillis:
Generalized Buffer Insertion.
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Jiang Hu, Cliff C. N. Sze:
Buffering in the Layout Environment.
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Sanghamitra Roy, Charlie Chung-Ping Chen:
Wire Sizing.
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Rupesh S. Shelar, Prashant Saxena:
Estimation of Routing Congestion.
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Jeffrey S. Salowe:
Rip-Up and Reroute.
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Christoph Albrecht:
Optimization Techniquesin Routing.
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Cheng-Kok Koh, Evangeline F. Y. Young, Yao-Wen Chang:
Global Interconnect Planning.
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Rajendran Panda, Vladimir Zolotov, Murat R. Becer:
Coupling Noise.
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Franklin M. Schellenberg:
Modeling and Computational Lithography.
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Andrew B. Kahng, Kambiz Samadi:
CMP Fill Synthesis.
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Puneet Gupta, Evanthia Papadopoulou:
Yield Analysis and Optimization.
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Minsik Cho, Joydeep Mitra, David Z. Pan:
Manufacturability-Aware Routing.
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Charles J. Alpert, Nathaniel Hieter, Arjen Mets, Ruchir Puri, Lakshmi N. Reddy, Haoxing Ren, Louise Trevillyan:
Placement-Driven Synthesis Design Closure Tool.
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Steve Teig, Asmus Hetzel, Joseph L. Ganley, Jon Frankle, Aki Fujimura:
X Architecture Place and Route.
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Yehea I. Ismail:
Inductance Effects in Global Nets.
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Chris C. N. Chu, Min Pan:
Clock Network Design.
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Chris C. N. Chu, Min Pan:
Practical Issues in Clock Network Design.
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Haihua Su, Sani R. Nassif:
Power Grid Design.
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Steven J. E. Wilton, Nathalie Chan King Choy, Scott Y. L. Chin, Kara K. W. Poon:
Field-Programmable Gate Array Architectures.
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Kia Bazargan:
FPGA Technology Mapping, Placement, and Routing.
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Kia Bazargan, Sachin S. Sapatnekar:
Physical Design for Three-Dimensional Circuits.

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