Kwang-Ting Cheng

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Cheng-Wen Wu

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Publications

2013
[j95]
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Hsiu-Ming Chang, Jiun-Lang Huang, Ding-Ming Kwai, Kwang-Ting Cheng, Cheng-Wen Wu:
Low-Cost Error Tolerance Scheme for 3-D CMOS Imagers. IEEE Trans. Very Large Scale Integr. Syst. 21(3): 465-474 (2013)
2010
[c228]
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  - conf/dac/ChangHKCW10
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Hsiu-Ming Chang, Jiun-Lang Huang, Ding-Ming Kwai, Kwang-Ting (Tim) Cheng, Cheng-Wen Wu:
An error tolerance scheme for 3D CMOS imagers. DAC 2010: 917-922
2004
[c153]
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  - conf/ats/HongWC04
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Hao-Chiao Hong, Cheng-Wen Wu, Kwang-Ting Cheng:
A Signa-Delta Modulation Based Analog BIST System with a Wide Bandwidth Fifth-Order Analog Response Extractor for Diagnosis Purpose. Asian Test Symposium 2004: 62-67
2003
[j46]
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Hao-Chiao Hong, Jiun-Lang Huang, Kwang-Ting Cheng, Cheng-Wen Wu, Ding-Ming Kwai:
Practical considerations in applying Σ-Δ modulation-based analog BIST to sampled-data systems. IEEE Trans. Circuits Syst. II Express Briefs 50(9): 553-566 (2003)
2002
[c123]
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Hao-Chiao Hong, Jiun-Lang Huang, Kwang-Ting Cheng, Cheng-Wen Wu:
On-chip Analog Response Extraction with 1-Bit ? - Modulators. Asian Test Symposium 2002: 49-
2000
[c90]
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  - conf/ats/HuangOCW00
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Jing-Reng Huang, Chee-Kian Ong, Kwang-Ting Cheng, Cheng-Wen Wu:
An FPGA-based re-configurable functional tester for memory chips. Asian Test Symposium 2000: 51-57

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