Boot Architecture
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Device Configuration Interface
The Device Configuration Interface contains the direct memory access controller DMAC used in
boot. The DMAC transfers partitions from one memory, usually NVM, to another memory,
usually DDR, at a high transfer rate. The DMAC interfaces to the PS using the AXI bus, and to the
PL using the PCAP interface.
Secure Storage
Secure storage is on-chip memory which is inaccessible to an adversary. The memory resides
within the security perimeter of Zynq devices. At build time, the designer controls input/outputs
(I/Os) and internal switches to restrict access to Zynq device internal components. The OCM, L1
and L2 cache, AXI block RAM, PL configuration memory, BBRAM, and eFUSE array are secure
storage in Zynq devices.
Nonvolatile Memory
The types of NVM used to boot Zynq devices ar
e Secure Digital (SD), Quad Serial Peripheral
Interface (QSPI), NAND, and NOR. The ZC702 and ZC706 Evaluation Boards support SD and
QSPI, but not NAND and NOR NVM.
BootROM
The BootROM is 128K mask programmed boot Read Only Memory (BootROM) which contains
the BootROM code. The BootROM is not visible to the user or writable. The BootROM code
reads the Boot Mode Register, and initializes essential clocks and NVM at startup or power on
reset. For all boot modes except JTAG, the BootROM code uses the memory controller to copy
the FSBL partition from the specified NVM to the OCM.
On-chip Memory
The OCM is 256K random access memory (RAM). Th
e initial function of the OCM is to store the
first stage boot loader (FSBL) when the Zynq device is booted. The maximum allowable size of
the FSBL is 192K. Since the OCM has no address or data lines at Zynq device pins, OCM is secure
storage. The OCM can be used as secure storage for sensitive software after boot. OCM is very
fast memory. After boot, the full 256K OCM is available.
AXI Block RAM
The AXI block RAM is PL RAM. It is not used in boot. It provides secure storage for sensitive
software or data. AXI block RAM is used by both the Arm and MicroBlaze™ CPUs.
eFUSE Array
The PL eFUSE array is on-chip one-time programmable (OTP) NVM. The eFUSE array stores the
256-bit AES key. It is also used to control security functions, including enabling/disabling the
JTAG port. The PS eFUSEs store the RSA_Enable bit and the hash of the Primary Public Key (PPK)
used in RSA authentication.
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Nonvolatile Memory
BootROM
On-chip Memory
eFUSE Array
引导架构
设备配置接口
设备配置接口(DMAC)包含启动时使用的直接内存访问控制器(DMAC)。DMAC以高传输速率将分区
从一个内存(通常是NVM)传输到另一个内存(通常是DDR)。DMAC使用AXI总线与PS接口,并
使用PCAP接口与PL接口。
安全存储
安全存储是片上存储器,攻击者无法访问。该存储器位于Zynq器件的安全边界内。在构建时,设计
人员控制输入/输出(I/O)和内部开关,以限制对Zynq器件内部组件的访问。OCM、L1和L2缓存、A
XI块RAM、PL配置存储器、BBRAM和eFUSE阵列都是Zynq器件中的安全存储器。
用于启动Zynq设备的NVM类型包括安全数字(SD)、四路串行外设接口(QSPI)、NAND和NOR。Z
C702和ZC706评估板支持SD和
QSPI,但不是NAND和NORNVM。
BootROM是一个128K掩膜编程的启动只读存储器(BootROM),其中包含BootROM代码。BootRO
M对用户不可见且不可写入。BootROM代码会读取启动模式寄存器,并在启动或上电复位时初始化
必要的时钟和NVM。对于除JTAG之外的所有启动模式,BootROM代码都会使用内存控制器将FSBL
分区从指定的NVM复制到OCM。
OCM是256K的随机存取存储器(RAM)。OCM的初始功能是在Zynq器件启动时存储第一阶段引导
加载程序(FSBL)。FSBL的最大允许大小为192K。由于OCM在Zynq器件引脚上没有地址线或数据线
,因此OCM是一种安全存储器。启动后,OCM可用作敏感软件的安全存储器。OCM是一种非常快
速的存储器。启动后,完整的256KOCM可用。
AXI块RAM
AXI块RAM是PLRAM。它不用于启动。它为敏感软件或数据提供安全存储。Arm和MicroBlaze™
CPU均使用AXI块RAM。
PLeFUSE阵列是片上一次性可编程(OTP)NVM。该eFUSE阵列存储256位AES密钥。它还用于控制
安全功能,包括启用/禁用JTAG端口。PSeFUSE存储RSA_Enable位以及用于RSA身份验证的主公
钥(PPK)的哈希值。
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