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Low Drift

Oscillator

Reference

Mux

Precision

Temp Sensor

AIN0/REFP1

AIN1

AIN2

AIN3/REFN1

SCLK

AVDD

AVSS

DOUT/DRDY

DIN

Device

DRDY

DGND

REFP0 REFN0

Internal

Reference

CLK

10 A to

1.5 mA

Mux

DVDD

PGA

24-bit

ûADC

Digital Filter

and

SPI

Interface

Product

Folder

Sample &

Buy

Technical

Documents

Tools &

Software

Support &

Community

ADS1220

www.ti.com

SBAS501A –MAY 2013–REVISED JULY 2013

Low-Power, Low-Noise, 24-Bit, Analog-to-Digital Converter for Small-Signal Sensors

FEATURES

DESCRIPTION

The ADS1220 is a precision, 24-bit, analog-to-digital

• Low Current Consumption:

converter (ADC) offered in a leadless QFN-16 or a

– Duty-Cycle Mode: 120 μA

TSSOP-16 package. The device features two

– Normal Mode: 415 μA

differential or four single-ended inputs through a very

flexible input multiplexer (mux), a low-noise,

• Wide Supply Range: 2.3 V to 5.5 V

programmable gain amplifier (PGA), two

• Programmable Gain: 1 V/V to 128 V/V

programmable excitation current sources, an internal

• Programmable Data Rates: Up to 2 kSPS

reference, an oscillator, a low-side bridge switch, and

a precision temperature sensor. The many integrated

• 50-Hz and 60-Hz Rejection at 20 SPS

features and the simple control of the ADS1220

• Low-Noise PGA: 90 nV

RMS

at 20 SPS

through an SPI-compatible interface ease precision

• Dual Matched Programmable Current Sources:

measurements of the most common sensor signals.

10 μA to 1500 μA

The device can perform conversions at data rates of

• Internal Temperature Sensor:

up to 2000 samples-per-second (SPS) with single-

0.5°C Error (max)

cycle settling. The internal PGA offers gains of up to

• Low-Drift Internal Reference

128 V/V. This PGA makes the ADS1220 ideally-

suited for applications measuring small signals, such

• Low-Drift Internal Oscillator

as thermocouples, resistance temperature detectors

• Two Differential or Four Single-Ended Inputs

(RTDs), thermistors, and bridge sensors. The device

• SPI™-Compatible Interface

supports true bipolar analog supplies in the event that

single-ended signals referenced to ground must be

• 3,5 mm × 3,5 mm × 0,9 mm QFN Package

measured using the PGA. Alternatively, the device

can be configured to bypass the internal PGA while

APPLICATIONS

still providing gains of up to 4 V/V, allowing for rail-to-

• Temperature Sensors:

rail input signals with no loss of signal integrity when

running from a single analog supply.

– Thermocouples

– Resistance Temperature Detectors (RTDs)

The device operates in either duty-cycle mode

(consuming 120 µA of current), normal mode

– 2-, 3-, and 4-Wire RTD Excitation

(consuming 415 µA of current), or turbo mode (for

• Bridge Sensors

highest data rates). The ADS1220 operates over a

• Portable Instrumentation

temperature range of –40°C to +125°C.

• Factory Automation and Process Control

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2SPI is a trademark of Motorola, Inc.

3All other trademarks are the property of their respective owners.

UNLESS OTHERWISE NOTED this document contains

PRODUCTION DATA information current as of publication date.

Products conform to specifications per the terms of Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

ADS1220

SBAS501A –MAY 2013–REVISED JULY 2013

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERING INFORMATION

For the most current package and ordering information, see the Package Option Addendum at the end of this

document, or visit the device product folder at www.ti.com.

PRODUCT FAMILY

MAXIMUM SAMPLE PACKAGE

DEVICE RESOLUTION (Bits) MAXIMUM GAIN

RATE (SPS) DESIGNATOR

QFN-16

ADS1120 16 128 2000

TSSOP-16

QFN-16

ADS1220 24 128 2000

TSSOP-16

ABSOLUTE MAXIMUM RATINGS

(1)

VALUE

UNIT

MIN MAX

AVDD to AVSS –0.3 +7 V

DVDD to DGND –0.3 +7 V

AVSS to DGND –2.8 +0.3 V

Analog input voltage AIN0/REFP1, AIN1, AIN2, AIN3/REFN1, REFP0, REFN0 AVSS – 0.3 AVDD + 0.3 V

Digital input voltage CS, SCLK, DIN, DOUT/DRDY, DRDY, CLK DGND – 0.3 DVDD + 0.3 V

Momentary –100 +100 mA

Analog input current

Continuous –10 +10 mA

Maximum junction, T

JMax

+150 °C

Temperature

Storage, T

stg

–60 +150 °C

Human body model (HBM)

–2000 +2000 V

JEDEC standard 22, test method A114-C.01, all pins

Electrostatic discharge (ESD)

ratings

Charged device model (CDM)

–500 +500 V

JEDEC standard 22, test method C101, all pins

(1) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to absolute

maximum conditions for extended periods may affect device reliability.

THERMAL INFORMATION

ADS1220

THERMAL METRIC

(1)

QFN (RVA) TSSOP (PW) UNITS

16 PINS 16 PINS

Junction-to-ambient thermal resistance 43.4 99.5

JCtop

Junction-to-case (top) thermal resistance 47.3 35.2

Junction-to-board thermal resistance 18.4 44.3

°C/W

Junction-to-top characterization parameter 0.6 2.4

Junction-to-board characterization parameter 18.4 43.8

JCbot

Junction-to-case (bottom) thermal resistance 2.0 n/a

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

Product Folder Links: ADS1220

ADS1220

www.ti.com

SBAS501A –MAY 2013–REVISED JULY 2013

ELECTRICAL CHARACTERISTICS

Minimum and maximum specifications are at T

= –40°C to +125°C. Typical specifications are at T

= +25°C.

All specifications are at AVDD = 3.3 V, AVSS = 0 V, DVDD = 3.3 V, and DR = 20 SPS using external V

REF

= 2.5 V, unless

otherwise noted.

(1)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

ANALOG INPUTS

Full-scale differential input voltage

= (AIN

– AIN

) ±V

REF

/ PGA

(2)

range

Absolute input voltage AIN

or AIN

, PGA disabled

(3)

AVSS – 0.1 AVDD + 0.1 V

PGA disabled

(3)

AVSS – 0.1 AVDD + 0.1 V

Common-mode input voltage range

= (AIN

+ AIN

) / 2]

PGA = 1...128 See the Low-Noise PGA section

Absolute input current See the Typical Characteristics

Differential input current See the Typical Characteristics

SYSTEM PERFORMANCE

Resolution No missing codes 24 Bits

Normal mode 20, 45, 90, 175, 330, 600, 1000 SPS

DR Data rate Duty-cycle mode 5, 11.25, 22.5, 44, 82.5, 150, 250 SPS

Turbo mode 40, 90, 180, 350, 660, 1200, 2000 SPS

Noise (input-referred) See the Noise Performance section

PGA = 1…128, V

= 0.5 AVDD,

INL Integral nonlinearity -15 ±6 15 ppm

external reference, best fit

PGA disabled, T

= +25°C,

±4 µV

differential inputs

Offset voltage (input-referred) PGA = 1, T

= +25°C, differential inputs –30 ±4 30 µV

PGA = 2…128, T

= +25°C,

±4 µV

differential inputs

PGA = 1…128, T

= –40°C to +85°C

(4)

0.08 0.3 µV/°C

Offset drift

PGA = 1…128, T

= –40°C to +125°C 0.25 µV/°C

Offset match Match between any two inputs ±20 µV

GE Gain error PGA = 1…128, T

= +25°C -0.1% ±0.015% 0.1%

Gain drift PGA = 1…128, T

= –40°C to +125°C

(4)

1 4 ppm/°C

50 Hz ±3%, DR = 20 SPS, external CLK,

105 dB

bit 50/60 = 10

60 Hz ±3%, DR = 20 SPS, external CLK,

NMRR Normal-mode rejection ratio

(5)

105 dB

bit 50/60 = 11

50 Hz or 60 Hz ±3%, DR = 20 SPS,

90 dB

external CLK, Bit 50/60 = '01'

At dc and PGA = 1 90 105 dB

CMRR Common-mode rejection ratio f

= 50 Hz, DR = 2000 SPS

(4)

95 115 dB

= 60 Hz, DR = 2000 SPS

(4)

95 115 dB

AVDD at dc, V

= 0.5 AVDD, PGA = 1 80 105 dB

PSRR Power-supply rejection ratio

DVDD at dc, V

= 0.5 AVDD, PGA = 1

(4)

100 115 dB

INTERNAL VOLTAGE REFERENCE

Initial accuracy T

= +25°C 2.045 2.048 2.051 V

Reference drift T

= –40°C to +125°C

(4)

5 40 ppm/°C

VOLTAGE REFERENCE INPUT

REF

Reference input range V

REF

= (REFPx – REFNx) 0.75 2.5 AVDD V

Negative reference absolute input REFNx to AVSS AVSS – 0.1 REFPx – 0.75 V

Positive reference absolute input REFPx to AVSS REFNx + 0.75 AVDD + 0.1 V

Reference input current REFN0 = AVSS, REFP0 = V

REF

±10 nA

(1) PGA disabled means the low-noise PGA is bypassed. Only gains of 1, 2, and 4 are possible in this case with the switched-capacitor

input structure. PGA = 1…128 denotes that the low-noise PGA is enabled and set to the respective gain setting.

(2) Limited to [(AVDD – AVSS) – 0.4 V] / PGA, when the PGA is enabled.

(3) See the Bypassing the PGA section for more information.

(4) Minimum and maximum values are ensured by design and characterization data.

(5) Minimum values are ensured by design.

Product Folder Links: ADS1220

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