Sim 卡驱动

/* FILE_NAME: sim_dirver.c TARGET: ARM OWENER: Wen Donghan COMPLETE TIME: 2009-01-18 */ /*******************************************************************************************************/ //#include <cyg/hal/sim_driver.h> //Interfacese, commmands #include "sim_driver.h" //Interfacese, commmands cyg_thread thread_data; cyg_handle_t thread_handle; cyg_thread thread_data_b; cyg_handle_t thread_handle_b; unsigned char stack[CYGNUM_HAL_STACK_SIZE_TYPICAL]; unsigned char stack_b[CYGNUM_HAL_STACK_SIZE_TYPICAL]; cyg_io_handle_t handle; static unsigned char sim_atr_TS; static unsigned char sim_rx_buf[ SIM_RX_BUFSIZE ]; // rx ring buffer int sim_rx_head, sim_rx_tail; static unsigned char sim_rx_data; static unsigned char sim_rx_status = SIM_STATUS_OK; static const unsigned char sim_interface_char_len[] = { 0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4 }; static bool sim_vaild_flag = false; static cyg_uint8 resp2[1000]; bool SIM_OpenDriver(void) ; cyg_uint8 SIM_ByteReverse(cyg_uint8 b); static bool sim_get_state(void); static void sim_set_state(bool state); int diag_null(const char* fmt,...) { return 0; } static void OSK5912_waitusec( unsigned long int usec ) { struct timespec timeSleep; timeSleep.tv_sec = usec / 1000000; timeSleep.tv_nsec= (usec % 1000000)*1000; nanosleep( &timeSleep, NULL ); } void init_simcard(void) { unsigned long int na1; static int flag = 0; #ifndef WITONE // if (flag == 0) { flag = 1; //SIM CARD TEST //配置加电控制和复位引脚为输出 *GPIO2_DIRECTION&=0x0fbdf; *ULPD_SDW_CLK_DIV_CTRL_SEL&=0x0fffd; na1=*GPIO2_DATAIN; *GPIO2_DATAOUT=(na1 & 0x0fbdf); //加电 na1=*GPIO2_DATAIN; *GPIO2_DATAOUT=(na1|0x0020); //配置BCLK *ULPD_SDW_CLK_DIV_CTRL_SEL&=0x0fd; OSK5912_waitusec( 200 ); *ULPD_SDW_CLK_DIV_CTRL_SEL&=0x03; OSK5912_waitusec( 200 ); //clk-----3MHz //*ULPD_SDW_CLK_DIV_CTRL_SEL|=0x48; //clk----- *ULPD_SDW_CLK_DIV_CTRL_SEL|=0x24; OSK5912_waitusec( 200 ); *ULPD_SDW_CLK_DIV_CTRL_SEL&=0x0fe; OSK5912_waitusec( 200 ); //使能BCLK *ULPD_SDW_CLK_DIV_CTRL_SEL|=0x02; OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); //脱离复位 na1=*GPIO2_DATAIN; *GPIO2_DATAOUT=(na1|0x0400); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); } #else // if (flag == 0) { flag = 1; //SIM CARD TEST //配置加电控制和复位引脚为输出 //*GPIO2_DIRECTION&=0x0fbdf; *GPIO2_DIRECTION&=0x0f9ff;//gpio25 sim contrl gpio26 sim reset *ULPD_SDW_CLK_DIV_CTRL_SEL&=0x0fffd; na1=*GPIO2_DATAIN; //*GPIO2_DATAOUT=(na1 & 0x0fbdf); *GPIO2_DATAOUT=(na1 & 0x0f9ff); //加电 na1=*GPIO2_DATAIN; //*GPIO2_DATAOUT=(na1|0x0020); *GPIO2_DATAOUT=(na1|0x0200); //配置BCLK *ULPD_SDW_CLK_DIV_CTRL_SEL&=0x0fd; OSK5912_waitusec( 200 ); *ULPD_SDW_CLK_DIV_CTRL_SEL&=0x03; OSK5912_waitusec( 200 ); //clk-----3MHz //*ULPD_SDW_CLK_DIV_CTRL_SEL|=0x48; //clk----- *ULPD_SDW_CLK_DIV_CTRL_SEL|=0x48; OSK5912_waitusec( 200 ); *ULPD_SDW_CLK_DIV_CTRL_SEL&=0x0fe; OSK5912_waitusec( 200 ); //使能BCLK *ULPD_SDW_CLK_DIV_CTRL_SEL|=0x02; OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); //脱离复位 na1=*GPIO2_DATAIN; *GPIO2_DATAOUT=(na1|0x0400); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); OSK5912_waitusec( 200000 ); } #endif } // clear the sim_rx_buf for the next reception static void clear_reception_buffer(void) { memset(sim_rx_buf,0x00,SIM_RX_BUFSIZE); sim_rx_head =sim_rx_tail= 0; } void read_reception( void) { Cyg_ErrNo err; cyg_uint32 len = 1; cyg_serial_info_t serial_info; cyg_uint32 length; length = sizeof(serial_info); memset(sim_rx_buf,0x00,SIM_RX_BUFSIZE); err = cyg_io_lookup("/dev/ser1",&handle); cyg_io_get_config(handle, CYG_IO_GET_CONFIG_SERIAL_INFO, &serial_info, &length); serial_info.stop = CYGNUM_SERIAL_STOP_1; serial_info.baud = CYGNUM_SERIAL_BAUD_3600; serial_info.parity =CYGNUM_SERIAL_PARITY_EVEN; serial_info.word_length = CYGNUM_SERIAL_WORD_LENGTH_8; cyg_io_set_config(handle, CYG_IO_SET_CONFIG_SERIAL_INFO, &serial_info, &length); cyg_uint32 blocking; cyg_uint32 blen; blocking = 0; blen = sizeof(blocking); cyg_io_set_config(handle, CYG_IO_SET_CONFIG_READ_BLOCKING ,&blocking, &blen); while(1) { len = 1; cyg_uint32 which = CYG_FREAD; CYG_ADDRWORD info=0; if(true==cyg_io_select( handle, which, info)) { sim_print("data is coming \n"); err=cyg_io_read(handle,&sim_rx_buf[sim_rx_tail],&len); if(ENOERR!= err || len==0 ) { sim_print("read string error \n"); //break; } else { sim_print(" *****sim_rx_tail is%0x ******\n",sim_rx_tail); sim_print(" ***** err is %0x ******\n",err); sim_print(" recieve data %0x \n",sim_rx_buf[sim_rx_tail]); sim_print(" recieve lenth %0x \n",len); //if(sim_rx_tail%5 == 0) //{ // sim_print("\n"); //} sim_rx_tail++; sim_rx_tail = sim_rx_tail & SIM_RX_BUFMASK; } } else { sim_print(" *****done!!!! ******\n"); } OSK5912_waitusec( 200000 ); } } //because uart in and out endpoint is gathered //that makes up a self-cycle //write msg to sim and read back the redundancy msg cyg_uint16 sim_send_buffer(cyg_uint8 *buf , cyg_uint32 buf_len) { #if 1 Cyg_ErrNo err_no = ENOERR; int i=0; cyg_uint32 byte =1; cyg_uint32 which ; CYG_ADDRWORD info =0; cyg_uint8 recycle; int times=10 ; sim_print("start send buffer\n"); which = CYG_FWRITE; while(i<buf_len) { if(true==cyg_io_select( handle, which, info)) { if(err_no !=cyg_io_write(handle,buf+i, &byte)) return SIM_STATUS_TX_ERROR; OSK5912_waitusec( 1000 ); i++; } else { sim_print("uart1 write error happens!\n"); return SIM_STATUS_TX_ERROR; } } which = CYG_FREAD; i=0; while(i < buf_len) { if(true ==cyg_io_select( handle, which, info)) { if(err_no != cyg_io_read(handle,&recycle,&byte)) return SIM_STATUS_RX_ERROR; //sim_print("i is %0x !\n",i); sim_print("the circle data is %0x !\n",recycle); i++; times = 10; } else { if(times--) { sim_print("the data is not ready!\n"); OSK5912_waitusec( 10 ); continue; } sim_print("uart1 read error happens!\n"); return SIM_STATUS_RX_ERROR; } } sim_print("stop send buffer \n"); return SIM_STATUS_OK; #if 0 sim_rx_head = (sim_rx_head + buf_len) & SIM_RX_BUFMASK; which = CYG_FREAD; if(sim_rx_tail+buf_len >= SIM_RX_BUFSIZE) { while(true) { cyg_uint32 accept_lenth,spare_lenth; accept_lenth = SIM_RX_BUFSIZE -sim_rx_tail; spare_lenth = buf_len -accept_lenth; if(true==cyg_io_select( handle, which, info)) { if(err_no !=cyg_io_read(handle,&sim_rx_buf[sim_rx_tail],&accept_lenth)) return SIM_STATUS_RX_ERROR; if(err_no !=cyg_io_read(handle,&sim_rx_buf[0],&spare_lenth)) return SIM_STATUS_RX_ERROR;