New inline strategy (#432) + Support for register power up values (#494) #498
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Except those marked with NOINLINE, or topEntities
The previous declaration primitive prevented registers to have a `Bit` as a reset value. The downside is that it now only works when the "definedness" is known at compile-time.
Now that we eleminate unreachable alternatives in GADT-matches,
we sometimes end up with code such as:
```
case ds of Cons y ys -> y
```
, i.e., where the Nil case is elimininated.
ANF then transforms that to:
```
let x = case ds of Cons sel _wild -> sel
xs = case ds of Cons _wild sel -> sel
in case ds of Cons y ys -> x
```
where the case-expression in the body of the let-expression is
neither a projection of ds nor a selection on ds.
CaseCon will eliminate such case-expression, and so a traversal
with caseCon will ultimately transform the above expression to:
```
let x = case ds of Cons sel _wild -> sel
xs = case ds of Cons _wild sel -> sel
in x
```
The compiler can take way too long when it tries to aggressively inline large designs.
New constructor names more closely match blackbox templating language, are easier to look for in the code base, and are describe their purpose more clearly.
Clash now unrolls definitions such as map/zipWith/.. if the BlackBox requests it to do so. This is especially useful in blackboxes that need a "constant" value in their HDL. For example, register's default value need to be "simple enough" in order to be synthesized. ~CONST will use "normal" rendering path, but otherwise behaves the same as ~LIT.
This was referenced Feb 13, 2019
Closed
christiaanb
approved these changes
Feb 14, 2019
Verilog does not support truncating on arbitrary expressions. Instead,
users need to use assign a value to a variable with the desired width.
This has the unfortunate side-effect that every construction of a
WordX looks like:
assign x = $unsigned(y);
In case of literals, this looks like:
assign x = $unsigned(64'd5);
We will therefore never be able to use words as powerup values for
registers as HDL tools require a powerup value to not mention any
variables. The new blackbox function intercepts literals and will
generate appropriate literals as an expression:
$unsigned(8'd5)
Thus adding the ability to use them as powerup values. A similar
approach will need to be added for other data constructors dealing
with literals.
We should reenable this test once we have better error reporting. We should then test for the error message.
.. and make sure `verifyBlackBoxContext` checks all elements in a given BlackBoxTemplate.
ec86a35 to
3cffe90
Compare
This was referenced Feb 15, 2019
Closed
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
This is a super-PR of #432 and #494.