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RISC-V Summit North America 2025 · Santa Clara, California - Oct 22-23 · Register Now

RISC-V & Security

Exponential growth in online data and connected devices, including those deployed in critical safety and privacy applications, has increased the potential for consequential security breaches. Security is ranked as a primary concern in diverse segments such as embedded systems, automotive, HPC, and data centers. There is a common need for secure processors that can scale across use-cases and are supported by a broad partner ecosystem that ensures robust implementation and verification

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Drawing on years of established expertise, the RISC-V ISA has been designed from the bottom up with a security minded feature set.

The customizable nature of RISC-V permits the use of optional extensions to enable robust security that scales across a full spectrum of use cases and market segments, from microcontrollers to HPC.

Video: RISC-V Security – Current Initiatives and Future Trends – by Helena Handschuh at RISC-V Summit North America

Helena Handschuh, Technical Board Advisor, delivers her Keynote presentation on security at the RISC-V Summit North America.
In this video she outlines:

  • Why security is important and where new and existing threats are coming from
  • A list of must-have ingredients for a secure computation environment
  • The current and ongoing RISC-V security initiatives and projects.
  • Latest RISC-V security news from Industry, Academia and Standards groups
  • Future security trends and where RISC-V can help

The RISC-V ISA is flexible and customizable to provide robust scalable security across a wide variety of use cases

Customizable Security Features

The RISC-V ISA is uniquely customizable via extensions allowing a composable approach to security where features and attributes can be added or omitted as applicable to the use case. This permits right-sized security avoiding waste and enabling resource sharing and reuse, where appropriate.

Scalable Across Use Cases

Scales across processor use cases, from simple microcontrollers to data centers and HPC.  Allows reuse, speeds time to deployment and reduces resource demand for developers of a range of solutions across segments.

Bespoke Security

The extensibility of RISC-V enables users to create bespoke security solutions for niche or special use cases that other architectures do not allow.

Community Resourced

A strong contributory RISC-V  ecosystem of security experts enables the pooling of community resources, reducing the individual development resource burden, allowing focus on specific competencies and improving overall performance.     

RISC-V is secure by design, built with security front of mind to avoid legacy issues and prepared for emerging threats

Secure By Design

The RISC-V ISA is specifically designed with security first features including multiple privilege levels, PMPs (physical memory protection), secure interprocessing and isolation through TEEs (trusted execution environments)

Future Proofed

Ability to adapt the ISA through extensions to modify security features to future proof against new and emerging threats (e.g, Post Quantum Cryptography).

Built on Experience

As a relatively new ISA, RISC-V draws upon decades of experience to build a secure architecture from the ground up, avoiding known security vulnerabilities and prepared for emerging ones.

Comprehensive

The RISC-V ISA comprehensively addresses both the operational security requirements of the application layer and data plus the need to secure specific hardware components. It ensures that assets are protected from unauthorized reading and modification and maintains legitimate access to resources.

The RISC-V security ecosystem is evolving and growing to reflect market demand and address requirements

End-to-End Ecosystem

As RISC-V adoption gains traction across multiple segments, the ecosystem is expanding to offer end-to-end security solutions that meet market demand and requirements. These include security specific solutions such as implementation and verification tools.

Heterogeneous and Secure 

Vendors frequently develop SOCs that deploy a heterogeneous mix of processor ISAs. Security ecosystem partners are delivering RISC-V focused solutions that ensure integrity across mixed architectures. 

3rd Party Initiatives

Developers are increasingly actively engaged in 3rd Party industry initiatives to ensure that their RISC-V-based solutions are ahead in addressing newly emerging security approaches (e.g. CHERI).

Hear from our Members About RISC-V and HPC

Explore the Latest RISC-V Security Content

Jun 24, 2025

TYRCA: A RISC-V Tightly-Coupled Accelerator For Code-Based Cryptography

Project Snapshot Post-quantum cryptography (PQC) has garnered significant attention across various communities, particularly with the National Institute of Standards and Technology (NIST) advancing to the fourth round of PQC standardization. One of the leading candidates…

Mar 21, 2025

Security digital twin for RISC-V space chip

UK defence contractor BAE Systems is using a security digital twin of a RISC-V processor from SiFive for a radiation hardened chip for space applications. Cycuity in the US has developed the digital twin technology…

Mar 6, 2025

LDRA Joins Microchip’s Mi-V Ecosystem, Expanding Functional Safety and Security Support for the RISC-V® Architecture

WIRRAL, England--(BUSINESS WIRE)--LDRA, a leader in automated software verification, traceability and standards compliance for 50 years, today announced it has joined Microchip’s Mi-V ecosystem by adding support for PolarFire® SoC FPGAs and PIC64 MPUs to the LDRA tool…

Mar 4, 2025

Building on a Legacy of Security: Introducing Polar-VPX

SundanceDSP, a leading provider of high-performance FPGA-based solutions, is proud to announce the latest addition to its product lineup: Polar-VPX. This cutting-edge 3U VPX form-factor SOSA-aligned device uses the power of Microchip’s PolarFire® System-on-Chip Field-Programmable…

Feb 26, 2025

Memory Safety Will Be Key to Tackle Fundamental Cyber Security

Earlier this month, a U.K. government initiative called Digital Security by Design (DSbD) held a showcase in London to enable companies with pioneering technologies to demonstrate their products, technologies and solutions that could tackle a…

Jan 22, 2025

Support added in RISC-V IP for automotive high safety and security applications

HighTec EDV-Systeme GmbH has added support for Nuclei System Technology's RISC-V CPU IP. Its automotive-grade LLVM open-source-based C/C++ compiler tools are safety-qualified according to ISO 26262 up to ASIL D. Automotive software developers working on…