Integrated circuit design advances into the nanoscale era towards more compact, higher
performance and lower power devices. However, the large number of transistors per die has
entailed an increase of device variability due to subwavelength lithography and layout
complexity impacting manufacturability. Therefore, regular designs has emerged as an
alternative cell design style towards more litho-friendly designs aiming to combat the
increase number of process variations in current nanoscale technologies and beyond …