Low power and thermal design techniques are more advantageous for high-performance memory cells. Body bias is an adaptive technique used for power and thermal management in memory systems. It offers an efficient solution for the memory’s power and thermal problems. In this study, a thermal management controller is presented as a complete hardware tuning loop. The controller is applied on both Static Random Access Memory (SRAM) and Dynamic Random Access Memory (DRAM) units that actively monitors and controls the temperature via the power dissipation control in both memory types. The proposed combined circuits within the tuning loop are able to reduce the high power and temperatures, and dragging it around safe limits to avoid chip hardware damages. Results confirm that, the power dissipation of 6T SRAM cell is reduced by 9.77%, while the power of 1T1C DRAM cell is reduced by 8.50%. Thermal reduction was in the range of (5 C–10 C) per each body bias step voltage.