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tion posed a challenge, because, at design finalization, the NPSL included no appropriate, flight-qualified, 16-bit DACs, and the budget included no funds for certification of new devices. I escaped from this impasse by exploiting two fortuitous facts: The update rate of the two DACs was only tens of hertz, and the 69RH051A had a number of uncommitted, 8bit, 14.5-kHz PWM outputs. These outputs made one 16-bit DAC; a second pair of PWM bits and an identical circuit made the other (Figure 1). Hex inverter IC1s VCC rail connects to a precision 5V reference. The inverters
IC2 C4 27 pF 14.756 MHz 69RH051 A 18
Y1 VDD2
Combine two 8-bit outputs to make one 16-bit DAC ..................................85 LED driver provides software-controlled intensity ..........................86 Improve roll-off of Sallen-Key filter ................88 AC-coupling instrumentation amplifier improves rejection range of differential dc input voltage..................................................88 Simplify computer-aided engineering with scientific-to-engineering conversion ....94 1.5V battery powers white-LED driver ..........96 Simple VCOM adjustment uses any logic-supply voltage ..................................96
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5V 40 0.1 F VSS 20 31
XTAL1
XTAL2 RST
11 10 3
TX0 RX0
4 HC04 10 HC04
IC1
28 27 26 25 24 23 22 21 16 17
IC1
11
R5 200k C9 0.01 F
2 HC04
IC1 1
PWM1 PWM0
8 R 6 V3 1M HC04
IC1 9 12 R7 1M
INTO PSEN
6 HC04
IC1 5
5V (REFERENCE)
Figure 1
Two PWM outputs from a microcontroller combine to form a monotonic 16-bit DAC. www.edn.com
C1B 0.1 F
outputs are accurate analog square waves. The low-order PWM-signal output, PWM0, of the 8051 controls the V3 square wave, and the high-order PWM output, PWM1, controls the V1 square wave. R2 and R6 passively sum the two square waves in the ratio R2/R6 3290/1 million 1/255 to produce V4, duplicating the 28 ratio of the 16-bit sum. This action makes the dc component of V4 equal to 5V(REF)(PWM0 255PWM1)/256. Thus, if you write the 0 to 255, high-order byte of a 0 to 65,535, 16-bit DAC setting to the CEX1 register of the 8051 and write the 0 to 255, low-order byte to CEX0, a corresponding 16-bit analog representation appears in the dc component of V4. The accuracy of the R2-to-R6 ratio is the only limit on the monotonicity and accuracy of this circuit. For example, one part in 25,500 14.5 bits for 1%-tolerance R2 and R6 and a full 16 bits for 0.3% tolerance or better. But the story doesnt end there. Two problems remain. The first problem is the extraction of V4s desired dc component from allor
September 30, 2004 | edn 85
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tively nulls out approximately 99% of the ripple. This nullifying action leaves such a small residue that an approximately 2msec and, therefore, approximately 25msec-settling-time R3C9 product easily erases it. The other problem is compensation for the low, but still nonzero, on-resistance of the HC14 internal CMOS switches, so that the resistance doesnt perturb the critical R2-to-R6 ratio. This issue is of no particular concern for R6, because the R6to-on-resistance ratio is greater than 10,000-to-1, making any associated error negligible. This situation is not the case for R2, however, in which, despite the triple-parallel gates, the R2-to-on-resistance ratio is approximately 300-to-1, which is small enough to merit attention. Load-cancellation resistor R1 provides such attention. R1 sums a current into the R2 driving node that, because it is equal in magnitude but opposite in phase to the current through R6, effectively cancels the load on the R2 drivers. This process makes the combined on-resistance approximately 100 times less important than it otherwise would be. The result is a simple, highly linear and accurate voltageoutput DAC with a respectable, if not blazingly fast, settling time of approximately 25 msec. And the most important result, in this case, was a parts list with an impeccable NPSL-compliant pedigree.
at least 15 or 16 bits 99.995%of the undesired square-wave ac ripple. The R3C9 lowpass filter does some of this work. If you make C9 large enough, in principle, the filter could do the whole job. The reason this simple approach wouldnt work is that, to get such a large ripple attenuation of approximately 90 dB with a single-stage RC filter would require an approximately 300-msec time constant and a resultant 3-sec, 16-bit settling time. This glacial response time would be too slow even for this undemanding application. To speed things, the R4, R5, R7, C8 network synthesizes and then sums V2: an inverse-polarity duplicate of V4s 14.5kHz ac component. This summation ac-
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R3 10k
C1 0.1 F R1 10k
R4 3600
R5 3600 C6 0.02 F
R2 10k
+
C1 0.1 F R1 10k
R2 10k
+
C3 0.015 F (a)
C2 470 pF
C4 0.01 F (b)
C5 R6 1800 0.01 F
C2 470 pF
Figure 1
The addition of a twin-tee network (b) considerably improves the roll-off rate of the circuit (a).
proach to removing the differential dc content. But this technique requires adding a pair of capacitors and resistors to ac-couple the inputs of the difference amplifier. The manufacturing tolerances of these components severely degrade the CMRR (common-mode-rejection ratio) of the amplifier. If cost is not an issue, you could perform an initial trim, but this operation is useless for biological applications plagued by wide variations in electrodes and tissue impedances. The differential topology in Figure 1 addresses these problems (Reference 1). The principle of this ac-coupled in-
strumentation amplifier is to maintain the mean output voltage at 0V. To do so, you insert an autozero feedback loop, comprising IC4, RFB, and CFB, in a classic three-op-amp instrumentation amplifier. This feedback loop produces a frequency-dependent transfer function:
Consequently, the ac-coupled instrumentation amplifier behaves as a highpass filter with a 3-dB cutoff frequen(continued on pg 92) www.edn.com
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VIN1
+
R R cy from the equation f 1/2 RFBCFB. At IC1 first glance, you might think that the out_ put-autozeroing behavior of the ac-couR2 pled instrumentation amplifier is per_ fect. Unfortunately, the output R1 autozeroing capability of this circuit is IC3 VOUT R2 + CFB strongly limited. You can determine this limitation by expressing the output voltRFB age as a function of the input signals and _ _ R R the integrators output voltage, VZ: IC4 IC2 VOUT (1 2R2/R1)(VIN1 VIN2) VZ AD VIN2 + + VZ (VIN1 VIN2) VZ, where VOUT is the output voltage. In this expression, AD Figure 1 1 2R2/R1 is the differential gain in the passband. At dc, the output voltage is This ac-coupled instrumentation amplifier accommodates only 5-mV maximum input. 0V as long as the integrators output does not reach its saturation voltage, VZ(MAX). as a function of the input signal and the Therefore, setting the output voltage at integrators output voltage, VZ, becomes: 0V in the above expression yields the maximum differential-input dc voltage that this circuit can handle:
Consider, for instance, the typical performance and constraints of a portable biotelemetry system: differential gain of 1000, 5V split power supplies, and op amps with rail-to-rail output-voltage swing. In this system, the application of the formula for VIN yields a maximum differential-input dc voltage of only 5 mV. This limited performance is unacceptable for biological applications, in which you encounter differential-input dc voltages of 0.15V. The ac-coupled instrumentation amplifier in Figure 2 overcomes this limitation, thanks to the addition of active feedback, which includes voltage divider R3-R4 and the associated buffer amplifier, IC5. With this arrangement, the following equations give the new transfer function and highpass cutoff frequency, respectively.
In this expression, AD (1 2R2/R1) (1 R4/R3) is the new differential gain in the passband. At dc, the output voltage remains 0V as long as the integrators output does not reach its saturation voltage, VZ(MAX). Therefore, setting the output voltage at 0V in the new expression for output voltage yields the new maximum differentialinput dc voltage and differential gain. They are, respectively:
1/2 LT1464 VIN1
+
In the above equations, the additional term, 1 R4/R3, is the gain of the activefeedback stage. The new expressions for VIN(MAX) and AD(MAX) clearly show the advantages of Figure 2s ac-coupled instrumentation amplifier with active feedback: For an identical differential gain, you can extend the polarization-voltage range, VIN(MAX), by a factor equal to the gain of the activefeedback stage. Conversely, for a given polarization-voltage range, VIN (MAX), you can increase the differential gain by the gain of the active-feedback stage.
R4 100k R3 1.5k
R 100k
IC1
_
R2 3.3k R1 470
_
R2 3.3k
CMRR TRIM T
CFB 1 F
_
R 100k IC2
VIN2
1/2 LT1464
5%
Figure 2
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and it can handle a differential-input dcvoltage range of 0.34V. To obtain this performance, you set the active-feedback stage gain and the differential-amplifier gain, respectively, to 67.6 and 15. With these gain values, the noise performance of the ac-coupled instrumentation amplifier of Figure 2 is similar to that of a classic instrumentation amplifier. This situation occurs because the autozeroing and active-feedback stages, IC4 and IC5, are after the input differential stage, IC1 and IC2. Consequently, the gain of the differential stage roughly divides their respective noise contributions, which are therefore negligible. You can use several low-noise op-amps for IC1 and IC2. For portable biotelemetry applications, the LT1464 is a good compromise for input-noise density, noise-corner frequency, input-bias current and current drain. (Respectively: VNOISE 26 nV/ Hz, fC 9 Hz, IBIAS 0.4 pA, and ICC 230 A.) A theoretical analysis using the LT 1464s noise parameters shows that under worst-case conditions, the inputnoise voltage should not exceed 11 V rms. Tests on prototypes confirm this prediction; the tests effectively measure input-noise voltages of 3 to 6 V rms. To sum up, an ac-coupled instrumentation amplifier with active feedback is wellsuited for applications requiring high differential gain, a capability for handling large differential-input dc voltages, and low-noise performance. Reference 1. Stitt, Mark, AC-Coupled Instrumentation and Difference Amplifier, Burr-Brown, AB-008, May 1990.
The only drawback of this topology is apparent in the expression for fC, the highpass cutoff frequency.You multiply this frequency by the gain of the activefeedback stage. Therefore, to maintain a given cutoff frequency, you must multiply the time constant by a factor equal to the active-feedback stage gain. This factor can be an issue in processing signals whose spectrum includes low-frequency components. In such applications, RFB and CFB can reach prohibitive values. Consequently, you must make a trade-off between the time constant and the activefeedback stage gain. The component values in Figure 2 are a typical example of such a trade-off: The values are for an EEG (electroencephalogram) amplifier with 5V split power supplies. The amplifier has a differential gain of 1000 and a highpass cutoff frequency of 2.3 Hz,
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the assembly line usually perform. This adjustment is not only time-consuming, but also prone to field failures arising from human error or mechanical vibration. A simple alternative to achieving the increasing adjustment resolution for optimal panel-image fidelity is to replace the mechanical potentiometer with a digital potentiometer. Using digital potentiometers, panel makers can automate the
VCOM-adjustment process, resulting in lower manufacturing cost and higher product quality. Unfortunately, many panels operate at higher voltages, and the choice of available supply voltages is limited. The system implementation for a 5V supply is straightforward (Figure 1). Without a 5V supply, the circuit can become more complex. This Design Idea shows a simple way
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stores the desired potentiometer setting into the EEPROM. The AD5259 uses a 5V, submicron CMOS process for low power dissipation. It comes in a spacesaving 10-pin MSOP, an important feature in low-cost, space-constrained ap3.3V
that you can use any available logic supply to power the potentiometer providing the VCOM adjustment. The 6- or 8-bit AD5258/59 nonvolatile digital potentiometer demonstrates this approach. An I2C serial interface provides control and
VCC 3.3V 5V C1 1 F R6 10k R5 10k R1 70k AD5259 VDD VLOGIC CONTROLLER SCL SDA GND R3 25k R2 10k 14.4V
plications. For systems that have no 5V supply, many designers would be tempted to simply tap off the potentiometers series-resistor string at the 5V location. This approach is not viable, because, during programming (writing to the
14.4V R1 70k 5V AD5259
SUPPLIES POWER TO BOTH THE MICROCONTROLLER AND THE LOGIC SUPPLIES OF THE DIGITAL POTENTIOMETER
C1 1 F
_
IC1 AD8565
R6 10k
R5 10k
VDD VLOGIC
_
IC1 AD8565 R2 10k
3.5V<VCOM<4.5V
CONTROLLER
3.5V<VCOM<4.5V
R3 25k
Figure 1
A digital potentiometer makes it easy to adjust VCOM to the desired value.
Figure 2
A separate VLOGIC pin makes it possible to derive the VDD supply from the potentiometers resistor string.
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VDD VLOGIC DGND RDAC EEPROM RDAC1 REGISTER RDAC1 A1 W1 B1 SCL SDA I2 C SERIAL INTERFACE DATA
EEPROM), the AD5259s VLOGIC pin typically draws 35 mA. It cannot draw this current level through R1 because the voltage drop would be too large. For this reason, the AD5259 has a separate VLOGIC pin that can connect to any available logic supply. In Figure 2, VLOGIC uses the supply voltage from the microcontroller that is controlling the digital potentiometer. Now, VLOGIC draws the 35-mA programming current, and VDD draws only microamps of supply current to bias the internal switches in the digital potentiometers internal resistor string. If the panel requires a higher VCOM voltage, you can add two resistors to place the op amp in a noninverting gain configuration. The digital potentiometer has 30% end-to-end resistance tolerance. Assuming that the tolerances of R1, R3, and VDD are negligible compared with those of the potentiometer, you can achieve the range of output values that Table 1 shows. Assume that the desired value of VCOM is
8 8
CONTROL
ADDRESS-DECODE LOGIC
CONTROL LOGIC
Figure 3
4V 0.5V, with a maximum step size of 10 mV. As Table 1 shows, the circuit in Figure 2 guarantees an output range of 3.5 to 5.4V with a step size within 10 mV. And, despite the 30% tolerance of R2, the midscale VCOM output meets the
target specification. Also, because the digital potentiometers logic supply matches the microcontrollers logic levels, the microcontroller can read data back if desired. Figure 3 shows a block diagram of the digital potentiometer.
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