Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

Rf
1. This is an inverting amplifier, therefore, Vout = − Vin
R1
So:

100
a) Vout = − × 3 = −30V
10
1M
b) Vout =− × 2.5 = −2.5V
1M
4.7
c) Vout =− × −1 = 1.42V
3.3

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

2. This is also an inverting amplifier. The loading resistance Rs only affects the output
current drawn from the op-amp. Therefore,

47
a) Vout = − × 1.5 = −7.05V
10
b) Vout = 9V
c) Vout = −680mV

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

10k
3. For this inverting amplifier, vout = − × vin = −10vin . Therefore,
1k
a) vout = −10vin = −20 sin 5t

2π / 5 4π /5 6π / 5 8π / 5 2π
25

20

15

10

-5

-10

-15

-20

-25

b) vout = −10vin = −10 − 5 sin 5t

-2

-4

-5 V
-6

-8

-10
-10 V

-12

-14
-15 V
-16
2π / 5 4π /5 6π / 5 8π / 5 2π

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

Rf
4. For this inverting amplifier, v out = − vin = −0.1vin , hence,
R1
a) vout = −0.1vin = − cos 4t

π/2 π 3π / 2 2π
1.5

0.5

-0.5

-1

-1.5

b) vout = −0.1vin = −1.5 − 0.4 cos 4t

-0.2

-0.4

-0.6

-0.8

-1
-1.1 V
-1.2

-1.4
-1.5 V
-1.6

-1.8
-1.9 V
-2

π/2 π 3π / 2 2π

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

5. One possible solution is by using an inverting amplifier design, we have

Rf
V out = − V in
R in
Rf V out 9
⇔ =− =
R in V in 5

Using standard resistor values, we can have Rf=9.1kΩ and Rin=5.1kΩ

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

6. One possible solution is by using an inverting amplifier design, and a -5V input to
give a positive output voltage:

The resistance values are given by:

R f 20
=
Rin 5

Giving possible resistor values Rf = 20 kΩ and Rin = 5.1 kΩ

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

7. To get a positive output that is smaller than the input, the easiest way is to use
inverting amplifier with an inverted voltage supply to give a negative voltage:

The resistances are given by:

R f 1 .5
=
Rin 5

Giving possible resistor values Rf = 1.5 kΩ and Rin = 5.1 kΩ

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

8. Similar to question 7, the following is proposed:

The resistances are given by:

Rf 3
=
Rin 9

Giving possible resistor values Rf = 3.0kΩ and Rin = 9.1 kΩ

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

Rf
9. This circuit is a non-inverting amplifier, therefore, Vout = (1 + )Vin
R1
So:

47
a) Vout = (1 + ) × 300m = 1.71 V
10
1M
b) Vout = (1 + ) × 1.5 = 3 V
1M
4.7
c) Vout = (1 + ) × −1 = −2.42 V
3.3

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

10. This is again a non-inverting amplifier. Similar to question 9, we have:

a) Vout = 200m × (1 + 4.7) = 1.14 V

b) Vout = (1 + 1) × 9 = −18 V
c) Vout = 7.8 × 100m = 0.78 V

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

1
11. vout = (1 + )vin = 2vin for this non inverting amplifier circuit, therefore:
1
a) vout = 2vin = 8 sin 10t

2π / 5 4π /5 6π / 5 8π / 5 2π
10

-2

-4

-6

-8

-10

b) vout = 2vin = 2 + 0.5 sin 10t

2.6
2.5 V
2.4

2.2

2 2V

1.8

1.6
1.5 V
1.4

1.2

2π / 5 4π /5 6π / 5 8π / 5 2π

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

Rf
12. vout = (1 + )vin = 1.5vin for this non inverting op-amp circuit. Hence,
Rin

a) vout = 1.5vin = 3 cos 2t

4

-1

-2

-3
π/2 2π
-4

b) vout = 1.5vin = 6 + 1.5 cos 2t

8
7.5 V
7

6 6V

5.5 V
4

π/2 2π

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

13. The first step is to perform a simple source transformation, so that a 0.15-V source in
series with a 150-Ω resistor is connected to the inverting pin of the ideal op amp.

2200
Then, vout = − (0.15) = - 2.2 V
150

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

14. In order to deliver 150 mW to the 10-kΩ resistor, we need vout =

(0.15)(10 × 103 ) = 38.73 V. Writing a nodal equation at the inverting input,
we find
5 5 − vout
0 = +
R 1000
Using vout = 38.73, we find that R = 148.2 Ω.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

15. Since the 670-Ω switch requires 100 mA to activate, the voltage delivered to it by our
op amp circuit must be (670)(0.1) = 67 V. The microphone acts as the input to the
circuit, and provides 0.5 V. Thus, an amplifier circuit having a gain = 67/0.5 = 134 is
required.

One possible solution of many: a non-inverting op amp circuit with the microphone
connected to the non-inverting input terminal, the switch connected between the op
amp output pin and ground, a feedback resistor Rf = 133 Ω, and a resistor R1 = 1 Ω.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

16. We begin by labeling the nodal voltages v- and v+ at the inverting and non-inverting
input terminals, respectively. Since no current can flow into the non-inverting input,
no current flows through the 40-kΩ resistor; hence, v+ = 0. Therefore, we know that
v- = 0 as well.
Writing a single nodal equation at the non-inverting input then leads to
(v- - vS ) (v - v )
0 = + - out
100 22000
or
- vS - vout
0 = +
100 22000
Solving,
vout = -220 vS

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

17. We first label the nodal voltage at the output pin Vo. Then, writing a single nodal
equation at the inverting input terminal of the op amp,
4 - 3 4 - Vo
0 = +
1000 17000
Solving, we find that Vo = 21 V. Since no current can flow through the 300-kΩ
resistor, V1 = 21 as well.

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18. A source transformation and some series combinations are well worthwhile prior to
launching into the analysis. With 5 kΩ || 3 kΩ = 1.875 kΩ and (1 mA)(1.875 kΩ) =
1.875 V, we may redraw the circuit as

Ω
V2

This is now a simple inverting amplifier with gain – Rf/ R1 = -75.33/ 1.975 = -38.14.
Thus, V2 = -38.14(3.975) = -151.6 V.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

19. This is a simple inverting amplifier, so we may write

- 2000
vout = (2 + 2 sin 3t ) = - 4(1 + sin 3t ) V
1000
vout(t = 3 s) = -5.648 V.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

20. We first combine the 2 MΩ and 700 kΩ resistors into a 518.5 kΩ resistor.
We are left with a simple non-inverting amplifier having a gain of
1 + 518.5/ 250 = 3.074. Thus,
vout = (3.074) vin = 18 so vin = 5.856 V.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

21. This is a simple non-inverting amplifier circuit, and so it has a gain of 1 + Rf/ R1.
We want vout = 23.7 cos 500t V when the input is 0.1 cos 500t V, so a gain of 23.7/0.1
= 237 is required.
One possible solution of many: Rf = 236 kΩ and R1 = 1 kΩ.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

22. Define a nodal voltage V- at the inverting input, and a nodal voltage V+ at the non-
inverting input. Then,
V+
At the non-inverting input: -3×10-6 = [1]
1.5 × 106
Thus, V+ = -4.5 V, and we therefore also know that V- = -4.5 V.
V- V -V
At the inverting input: 0 = + - out [2]
R6 R7

Solving and making use of the fact that V- = -4.5 V,

R7 ⎛ ⎞
vout = − (4.5) - 4.5 = - 4.5 ⎜⎜ R 7 + 1⎟⎟ V
R6 ⎝ R6 ⎠

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23. (a) B must be the non-inverting input: that yields a gain of 1 + 70/10 = 8 and an
output of 8 V for a 1-V input.

(b) R1 = ∞, RA = 0. We need a gain of 20/10 = 2, so choose R2 = RB = 1 Ω.

(c) A is the inverting input since it has the feedback connection to the output pin.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

24. It is probably best to first perform a simple source transformation:

(1 mA)(2 kΩ) = 2 V.

13 kΩ
1 kΩ V-

vout
2 kΩ V+
3V

2V

Since no current can flow into the non-inverting input pin, we know that V+ = 2 V,
and therefore also that V- = 2 V. A single nodal equation at the inverting input yields:
2 - 3 2 - vout
0 = +
1000 13000
which yields vout = -11 V.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

25. We begin by find the Thévenin equivalent to the left of the op amp:
1000 vS
Vth = -3.3(3) vπ = -9.9 vπ = − 9.9 = -9 vS
1100
Rth = 3.3 kΩ, so we can redraw the circuit as:

100 kΩ

3.3 kΩ vout
-9 vS

which is simply a classic inverting op amp circuit with gain of -100/3.3 = -30.3.
Thus, vout = (-30.3)( -9 vS) = 272.7 vS
For vS = 5 sin 3t mV, vout = 1.364 sin 3t V, and vout(0.25 s) = 0.9298 V.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

26. We first combine the 4.7 MΩ and 1.3 kΩ resistors: 4.7 MΩ || 1.3 kΩ = 1.30 kΩ.
Next, a source transformation yields (3×10-6)(1300) = 3.899 mV which appears in
series with the 20 mV source and the 500-Ω resistor. Thus, we may redraw the circuit
as
37.7 kΩ

500 Ω
vout

1.8 kΩ 370 Ω

23.899 mV
-6 V

Since no current flows through the 1.8 kΩ resistor, V+ = 23.899 mV and hence
V- = 23.899 mV as well. A single nodal equation at the inverting input terminal yields

23.899 × 10-3 23.899 × 10-3 - vout

0 = +
500 37.7 × 103
Solving,
vout = 1.826 V

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

27. We first combine the 4.7 MΩ and 1.3 kΩ resistors: 4.7 MΩ || 1.3 kΩ = 1.30 kΩ.
Next, a source transformation yields (27×10-6)(1300) = 35.1 mV which appears in
series with the 20 mV source and the 500-Ω resistor. Thus, we may redraw the circuit
as

37.7 kΩ

500 Ω
vout

1.8 kΩ 370 Ω

55.1 mV
-6 V

Since no current flows through the 1.8 kΩ resistor, V+ = 55.1 mV and hence
V- = 55.1 mV as well. A single nodal equation at the inverting input terminal yields

55.1 × 10-3 55.1 × 10-3 - vout

0 = +
500 37.7 × 103
Solving,
vout = 4.21 V

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

28. The 3 mA source, 1 kΩ resistor and 20 kΩ resistor may be replaced with a –3 V

source (“+” reference up) in series with a 21 kΩ resistor. No current flows through
either 1 MΩ resistor, so that the voltage at each of the four input terminals is
identically zero. Considering each op amp circuit separately,
100
vout LEFTOPAMP
= - (-3) = 14.29 V
21
100
vout RIGH OPAMP
= - (5) = - 50 V
10

vx = vout LEFTOPAMP
- vout RIGH OPAMP
= 14.29 + 50 = 64.29 V.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

29. A general summing amplifier with N input sources:

R1 Rf
va

R2 vout
vb
v1

v2

RN

vN

1. va = vb = 0
2. A single nodal equation at the inverting input leads to:
va − vout v −v v −v v − vN
0 = + a 1 + a 2 + ... + a
Rf R1 R2 RN

Simplifying and making use of the fact that va = 0, we may write this as

⎡ 1 N
⎤ v1 N v2 N vN N
⎢− R ∏ R i ⎥ out
v =
R
∏ R i +
R
∏ R i + ... +
R
∏ Ri
⎣ f i =1 ⎦ 1 i =1 2 i =1 N i =1

or simply
vout v1 v v
− = + 2 + ... + N
Rf R1 R2 RN
Thus,
N
vi
vout = - R f ∑R
i =1 i

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

30. A general difference amplifier:

R4
R1

vout
R2
v1

v2 R3

Writing a nodal equation at the inverting input,

v -v v -v
0 = a 1 + a out
R1 Rf
Writing a nodal equation at the non-inverting input,
v v -v
0 = b + b 2
R3 R2
Simplifying and collecting terms, we may write

(Rf + R1) va – R1 vout = Rf v1 [1]

(R2 + R3) vb = R3 v2 [2]

R3
From Eqn. [2], we have vb = v2
R2 + R3

Since va = vb, we can now rewrite Eqn. [1] as

− R 1 vout = R f v1 −
(R f + R1 )R 3 v
2
R2 + R3
and hence
Rf R ⎛ R + R1 ⎞
vout = - v1 + 3 ⎜⎜ f ⎟ v2
R1 R1 ⎝ R 2 + R 3 ⎟⎠

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

31. In total darkness, the CdS cell has a resistance of 100 kΩ, and at a light intensity L of
6 candela it has a resistance of 6 kΩ. Thus, we may compute the light-dependent
resistance (assuming a linear response in the range between 0 and 6 candela) as RCdS =
-15L + 100 Ω.
Our design requirement (using the standard inverting op amp circuit shown) is that the
voltage across the load is 1.5 V at 2 candela, and less than 1.5 V for intensities greater
than 2 candela.
Thus, vout(2 candela) = -RCdS vS/ R1 = -70 VS/ R1 = 1.5 (R1 in kΩ).
Pick R1 = 10 kΩ. Then vS = -0.2143 V.

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32. We want Rf/ Rinstrument = 2K, and Rf/ Rvocal = 1K, where K is a constant not specified.
Assuming K = 1, one possible solution of many is:
Rf = 2 Ω

Rvocal = 1 Ω

vocals Rinstruments = 2 Ω vout

microphone

instruments
microphone

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33. One possible solution of many:

99 kΩ

1 kΩ

vout

2V

vS

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v1 + v2 + v3
34. To get the average voltage value, we want vout = . This voltage stays
3
positive and therefore a one stage summing circuit (which inverts the voltage) is not
sufficient. Using the cascade setup as shown figure 6.15 and modified for three inputs
we have:

The nodal equation at the inverting input of the first op-amp gives
v1 v2 v3 − vo
+ + =
R1 R2 R3 R f1

If we assume R1=R2=R3=R, then

v1 + v 2 + v 3
v 0 = − R f1
R
Using the nodal equation at the inverting input of the second op-amp, we have:
− vout vo − R f1 v1 + v2 + v3
= =
Rf2 R4 R4 R
Or,
R f 2 R f1 v1 + v2 + v3
vout =
R4 R
For simplicity, we can take Rf2 = Rf1 = R4= Rx, then, to give a voltage average,

v1 + v2 + v3 v1 + v2 + v3
vout = Rx =
R 3

I.e. Rx/R = 3. Therefore, the circuit can be completed with R1 = R2= R3 = 30 kΩ and
Rf2 = Rf1 = R4 = 10 kΩ

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

35. The first stage is to subtract each voltage signal from the scale by the voltage
corresponding to the weight of the pallet (Vtare). This can be done by using a
differential amplifier:

The resistance of R can be arbitary as long as they resistances of each resistor is the
same and the current rating is not exceeded. A good choice would be R = 10 kΩ.

The output voltage of the differential amps from each of the scale, V1 – V4 (now gives
the weight of the items only), is then added by using a two stage summing amplifier:

The output is given by:

R f 2 R f1 v1 + v2 + v3 + v4
vout =
Rin R

Therefore, to get the sum of the voltages v1 to v4, we only need to set all resistances to
be equal, so setting Rf2 = Rf1 = Rin = R =10 kΩ would give an output that is
proportional to the total weight of the items

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

36. a) Using a difference amplifier, we can provide a voltage that is the difference
between the radar gun output and police speedometer output, which is proportional to
the speed difference between the targeted car and the police car. Note that since a
positive voltage is required which the police car is slower, the police speedometer
voltage would be feed into the inverting input:

Again, R can be arbitary as long as they are equal and doesn’t give an excessive
current. 10 kΩ is a good choice here.

b) To convert to kph (km per hour) from mph (miles per hour), it is noted that 1 mph
= 1.609 kph. Therefore, the voltage output from each device must be multiplied by
1.609. This can be done by using a non-inverting amplifier, which has an output given
by:

Rf
vout = (1 + )vin = 1.609vin
Rin

This gives Rf/Rin =0.609 ≈ 61/100, i.e. Rf = 6.2 kΩ and Rin = 10 kΩ

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37. vout of stage 1 is (1)(-20/ 2) = -10 V.

vout of stage 2 is (-10)(-1000/ 10) = 1000 V

Note: in reality, the output voltage will be limited to a value less than that used to
power the op amps.

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38. We have a difference amplifier as the first amplifier stage, and a simple voltage
follower as the second stage. We therefore need only to find the output voltage of the
first stage: vout will track this voltage. Using voltage division, then, we find that the
voltage at the non-inverting input pin of the first op amp is:

⎛ R3 ⎞
V2 ⎜⎜ ⎟⎟
⎝ R2 + R3 ⎠
and this is the voltage at the inverting input terminal also. Thus, we may write a
single nodal equation at the inverting input of the first op amp:

1 ⎡ ⎛ R3 ⎞ ⎤ 1 ⎡ ⎛ R3 ⎞ ⎤
0 = ⎢V2 ⎜⎜ ⎟⎟ - V1 ⎥ + ⎢V2 ⎜ ⎟ - Vout Stage 1 ⎥
R 1 ⎢⎣ ⎝ R 2 + R 3 ⎠ ⎥⎦ R f ⎢⎣ ⎜⎝ R 2 + R 3 ⎟⎠ ⎥⎦

which may be solved to obtain:

⎛R ⎞ R3 Rf
Vout = Vout = ⎜⎜ f + 1⎟⎟ V2 - V1
⎠ R2 + R3
Stage 1
⎝ R1 R1

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

39. The output of the first op amp stage may be found by realising that the voltage at the
non-inverting input (and hence the voltage at the inverting input) is 0, and writing a
ingle nodal equation at the inverting input:

0 - Vout stage 1 0-2 0-3

0 = + + which leads to Vout steage 1
= -114.1 V
47 1 7
This voltage appears at the input of the second op amp stage, which has a gain of
–3/ 0.3 = 10. Thus, the output of the second op amp stage is –10(-114.1) = 1141 V.
This voltage appears at the input of the final op amp stage, which has a gain of
–47/ 0.3 = -156.7.
Thus, the output of the circuit is –156.7(1141) = -178.8 kV, which is completely and
utterly ridiculous.

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40. The output of the top left stage is –1(10/ 2) = -5 V.

The output of the middle left stage is –2(10/ 2) = -10 V.
The output of the bottom right stage is –3(10/ 2) = -15 V.
These three voltages are the input to a summing amplifier such that
R
Vout = − (− 5 − 10 − 15) = 10
100
Solving, we find that R = 33.33 Ω.

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41. Stage 1 is configured as a voltage follower: the output voltage will be equal to the
input voltage. Using voltage division, the voltage at the non-inverting input (and
hence at the inverting input, as well), is
50
5 = 1.667 V
100 + 50
The second stage is wired as a voltage follower also, so vout = 1.667 V.

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42. a) Since the voltage supply is higher than the Zener voltage of the diode, the diode is
operating in the breakdown region. This means V2 = 4.7 V, and assuming ideal op-
amp, V1 = V2= 4.7 V. This gives a nodal equation at the inverting input:

4.7 V3 − 4.7
=
1k 1.1k

Solving this gives V3 = 9.87 V

b) PSpice simulation gives:

It can be seen that all voltage values are very close to what was calculated. The
voltage output V3 is 9.88Vinstead of 9.87 V. This can be explained by the fact that the
operating voltage is slightly higher than the breakdown voltage, and also the non-ideal
characteristics of the op-amp.

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43. The following circuit can be used:

The circuit is governed by the equations:

Rf
V3 = (1 + )V1
Rin
And
V1 = V2 = Vdiode

Since the diode voltage is 5.1 V, and the desired output voltage is 5.1 V, we have
Rf/Rin = 0. In other words, a voltage follower is needed with Rf = 0Ω, and Rin can be
arbitary – Rin =100 kΩ would be sufficient.

The resistor value of R2 is determined by:

Vs − Vdiode
R2 =
I ref
At a voltage of 5.1 V, the current is 76 mA, as described in the problem. This gives
R2≈ 51 Ω using standard resistor values.

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44. For the Zener diode to operate in the breakdown region, a voltage supply greater than
the breakdown voltage, in this case 10 V is needed. With only 9 V batteries, the
easiest way is the stack two battery to give a 18 V power supply. Also, as the input is
inverted, an inverting amplifier would be needed. Hence we have the following
circuit:

Rf
Vout = − Vin
Rin

Here, the input voltage is the diode voltage = 10 V, and the desired output voltage is -
2.5 V. This gives Rf/Rin = 25 / 100 = 50 / 200, or Rf = 51 kΩ and Rin = 200 kΩ using
standard values. Note that large values are chosen so that most current flow through
the Zener diode to provide sufficient current for breakdown condition.

The resistance R is given by R = (18-10) V /25 mA = 320 Ω = 330 Ω using standard

values.

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45. For a 20 V Zener diode, three 9 V batteries giving a voltage of 27 V would be needed.
However, because the required voltage is smaller than the Zener voltage, a non-
inverting amplifier can not be used. To use a inverting amplifier to give a positive
voltage, we first need to invert the input to give a negative input:

In this circuit, the diode is flipped but so is the power supply, therefore keeping the
diode in the breakdown region, giving Vin = -20 V. Then, using the inverting amp
equation, we have Rf / Rin = 12/20 giving Rf = 120 kΩ and Rin = 200 kΩ using
standard resistor values.

The resistance R is then given by R = (-20 - -27) V / 12.5 mA = 560 Ω using standard
resistor values.

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46. a) using inverting amplifier:

Rf/Rin = 5/3.3 giving Rf = 51 kΩ and Rin = 33 kΩ. R = (9-3.3) V / 76 mA = 75 Ω using

standard resistor values.

b) To give a voltage output of +2.2 V instead, the same setup can be used, with supply
and diode inverted:

Correspondingly, the resistor values needs to be changed:

Rf / Rin = 3.3/2.2 giving Rf = 33 kΩ and Rin = 22 kΩ. R would be the same as before
as the voltage difference between supply and diode stays the same i.e. R = 75 Ω.

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47. The following setup can be used:

I Is

Is = I = 10 V / R = 25 mA assuming ideal op-amp. This gives R = 400 Ω. Again,

taking half of max current rating as the operating current, we get R1 = (12 – 10) V / 25
mA = 80 Ω = 82 Ω using standard values.

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48. Using the following current source circuit, we have:

I Is

Is = I = 12.5 mA = 20 V / R, assuming ideal op-amp. This gives R = 1.6 kΩ and R1 =

(27 – 20) / 12.5 mA = 560 Ω.

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49. In this situation, we know that there is a supply limit at ±15 V, which is lower than the
zener diode voltage. Therefore, previous designs need to be modified to suit this
application. One possible solution is shown here:

I Is

Here, we have Is = I = (27-20)/ R = 75 mA, assuming infinite op-amp input

resistance. This gives R = 93.3 ≈ 91 Ω using standard values. We also have R1 = (27-
20)/ 12.5 mA = 560 Ω.

Now look at the range of possible loads. The maximum output voltage is
approximately equal to the supply voltage, i.e. 15 V. Therefore, the minimum load is
given by RL = (20 – 15) V / 75 mA = 66.67 Ω. Similarly, the maximum load is given
by RL = (20 - -15) V/ 75 mA = 466.67 Ω. i.e. this design is suitable for
466.67 Ω > RL > 66.67 Ω.

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50.

(a) va = vb = 1 nV ∴ vd = 0 and vout = 0. Thus, P8Ω = 0 W.

(b) va = 0, vb = 1 nV ∴ vd = -1 nV
8 v2
vout = (2×105)(-1×10-9) = -19.28 μV. Thus, P8Ω = out = 46.46 pW.
75 + 8 8

(c) va = 2 pV, vb = 1 fV ∴ vd = 1.999 pV

8 v2
vout = (2×105)(1.999×10-12) = 38.53 nV. Thus, P8Ω = out = 185.6 aW.
75 + 8 8

(c) va = 50 μV, vb = -4 μV ∴ vd = 54 μV
2
8 vout
vout = (2×105)(54×10-6) = 1.041 V. Thus, P8Ω = = 135.5 mW.
75 + 8 8

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51.

Writing a nodal equation at the “-vd” node,

- vd - vd - VS -v -v
0 = + + d out [1]
R in R1 Rf

or (R1Rf + RinRf + RinR1) vd + RinR1vout = -RinRfVS [1]

Writing a nodal equation at the “vout” node,

- vout - Avd v - (-vd )
0 = + out [2]
Ro Rf
Eqn. [2] can be rewritten as:
- (R f + R o )
vd = vout [2]
R o - AR f
so that Eqn. [1] becomes:
R in (AR f - R o ) VS
vout = -
AR in R 1 + R f R 1 + R in R f + R in R 1 + R o R 1 + R o R in

where for this circuit, A = 106, Rin = 10 TΩ, Ro = 15 Ω, Rf = 1000 kΩ, R1 = 270 kΩ.

(a) –3.704 mV; (b) 27.78 mV; (c) –3.704 V.

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52. vout = Avd = A

Ri
16 + R i
( )
80 × 1015 sin 2t V

(a) A = 105, Ri = 100 MΩ, Ro value irrelevant. vout = 8 sin 2t nV

(b) A = 106, Ri = 1 TΩ, Ro value irrelevant. vout = 80 sin 2t nV

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53.

(a) Find vout/ vin if Ri = ∞, Ro = 0, and A is finite.

The nodal equation at the inverting input is
- vd - vin -v -v
0 = + d out [1]
1 100
At the output, with Ro = 0 we may write vout = Avd so vd = vout/ A. Thus, Eqn. [1]
becomes
v v v
0 = out + vin + out + out
A 100A 100
from which we find
vout - 100A
= [2]
vin 101 + A

(b) We want the value of A such that vout/ vin = -99 (the “ideal” value would be –100
if A were infinite). Substituting into Eqn. [2], we find
A = 9999

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54. (a) δ = 0 V ∴ vd = 0, and P8Ω = 0 W.

(b) δ = 1 nV, so vd = 5 – (5 + 10-9) = -10-9 V
Thus,
8
vout = (2×105)vd = -19.28 μV and P8Ω = (vout)2/ 8 = 46.46 pW.
8 + 75
(c) δ = 2.5 μV, so vd = 5 – (5 + 2.5×10-6) = -2.5×10-6V
Thus,
8
vout = (2×105)vd = -48.19 mV and P8Ω = (vout)2/ 8 = 290.3 μW.
8 + 75

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55.

AD549

Writing a single nodal equation at the output, we find that

vout - vin v - Avd
0 = + out [1]
Ri Ro

Also, vin – vout = vd, so Eqn. [1] becomes

0 = (vout – vin) Ro + (vout – Avin + Avout) Ri

and
vout =
(R o + AR i ) vin
R o + ( A + 1) R i

To within 4 significant figures (and more, actually), when vin = -16 mV, vout = -16 mV
(this is, after all, a voltage follower circuit).

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56. The Voltage follower with a finite op-amp model is shown below:

Nodal equation at the op-amp output gives:

Vout − Vin AVd − Vout

=
Ri Ro
But in this circuit, Vd=Vin – Vout. Substitution gives:

Vout − Vin A(Vin − Vout ) − Vout AVin − ( A + 1)Vout

= =
Ri Ro Ro

Further rearranging gives:

RoVout + Ri ( A + 1)Vout = RoVin + Ri AVin

Ro + Ri A
⇔ Vout = Vin
Ro + Ri ( A + 1)

This is the expression for the voltage follower in non-ideal situation. In the case of
ideal op-amp, A → ∞, and so A+1 → A. This means the denominator and the
numerator would cancel out to give Vout = Vin, which is exactly what we expected.

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57. a) By definition, when the op-amp is at common mode, vout = ACMvin. Therefore, a model that can represent this is:

This model relies on that fact that ACM is much smaller than the differential gain A, and therefore when the inputs
are different, the contribution of ACM is negligible. When the inputs are the same, however, the differential term
Avd vanishes, and so vout = ACMv2, which is correct.

b) The voltage source in the circuit now becomes 105vd+10v2. Assuming Ro = 0, the circuit in figure 6.25 becomes:

The circuit is governed by the following equations:

105 vd + 10vb − va va − v1
vd = vb − va so =
R R
vb = v2 / 2 (from voltage divider)

Rearranging gives:
105 (v2 / 2 − va ) + 10(v2 / 2) − va = va − v1
50000v2 − 105 va + 5v2 − va = va − v1
50005v2 + v1
va =
(105 + 2)
Then, the output is given by:
vout = 105 vd + 10vb = 105 × (v2 / 2 − va ) + 5v2

in this case, v1 = 5 + 2 sin t, v2 = 5. This gives va=0.50004v2+9.99980×10-6v1. Thus

vout = 105(-0.00004v2 - 9.99980×10-6v1)+5v2 = 1.00008v2 - 0.99998v1 = 0.0005 –
1.99996 sin t
c) If the common mode gain is 0, than the equation for va becomes
50000v2 + v1
va =
(105 + 2)
Giving va=0.49999v2+9.99980×10-6v1. The output equation becomes
vout = 105 vd = 105 × (v2 / 2 − va ) =0.99998v2-0.99998v1 = 1.99996 sin t

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58. Slew rate is the rate at which output voltage can respond to changes in the input. The
higher the slew rate, the faster the op-amp responds to changes. Limitation in slew
rate – i.e. when the change in input is faster than the slew rate, causes degradation in
performance of the op-amp as the change is delayed and output distorted.

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59. a) V2 = 4.7 V from the Zener diode, V1 = V2 = 4.7 V assuming ideal op-amp, and V3
is given by the nodal equation at the inverting input:
V3 − V1 V1
=
4.7k 1k

Solving gives V3 = 26.79 V

b) The simulation result is shown below

There are considerable discrepancies between calculated and simulated voltages. In particular, V1 = 3.090 V is
considerably lower than the expected 4.7 V. This is due to the non-ideal characteristics of uA741 which has a finite
input resistance, inducing a voltage drop between the two input pins. A more severe limitation, however, is the
supply voltage. Since the supply voltage is 18V, the output cannot exceed 18 V. This is consistent with the
simulation result which gives V3 = 17.61 V but is quite different to the calculated value as the mathematical model
does not account for supply limitations.

c) By using a DC sweep, the voltage from the diode (i.e. V2) was monitored as the
battery voltage changes from 12 V to 4V.

It can be seen that the diode

voltage started dropping when
batteries drop below 10 V.
However, the diode can still be
considered as operating in the
breakdown region, until it hit
the knee of the curve. This
occurs at Vsupply = 5.28 V

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60. The ideal op amp model predicts a gain vout/ vin = -1000/ 10 = -100, regardless of the
value of vin. In other words, it predicts an input-output characteristic such as:
vout (V)

1
vin (V)
-100

From the PSpice simulation result shown below, we see that the ideal op amp model
is reasonably accurate for |vin| × 100 < 15 V (the supply voltage, assuming both have
the same magnitude), but the onset of saturation is at ±14.5 V, or |vin| ~ 145 mV.
Increasing |vin| past this value does not lead to an increase in |vout|.

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61. Positive voltage supply, negative voltage supply, inverting input, ground, output pin.

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62. This op amp circuit is an open-loop circuit; there is no external feedback path from
the output terminal to either input. Thus, the output should be the open-loop gain
times the differential input voltage, minus any resistive losses.

From the simulation results below, we see that all three op amps saturate at a voltage
magnitude of approximately 14 V, corresponding to a differential input voltage of 50
to 100 μV, except in the interest case of the LM 324, which may be showing some
unexpected input offset behavior.

op amp onset of negative onset of positive

negat satur positi satur
ive ation ve ation
satur volta satur volta
ation ge ation ge
μA 741 -92 μV -14.32 V 54.4 mV 14.34 V
LM 324 41.3 μV -14.71 V 337.2 mV 13.87 V
LF 411 -31.77 μV -13.81 V 39.78 mV 13.86 V

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63. This is a non-inverting op amp circuit, so we expect a gain of 1 + 1000/4.7 = 213.8.

With ±15 V DC supplies, we need to sweep the input just above and just below this
value divided by the gain to ensure that we see the saturation regions. Performing the
indicated simulation and a DC sweep from –0.1 V to +0.1 V with 0.001 V steps, we
obtain the following input-output characteristic:

Using the cursor tool, we see that the linear region is in the range of
–68.2 mV < Vin < 68.5 mV.
The simulation predicts a gain of 7.103 V/ 32.87 mV = 216.1, which is reasonably
close to the value predicted using the ideal op amp model.

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64. To give a proper simulation, the inputs are grounded to give an input of 0. This gives:

As can be seen, a current of 18.57 mA is drawn from the uA741. Assuming the output
voltage from the op-amp before Ro is 0, we have Ro = (1-18.57m)/18.57m = 52.9 Ω.
This is close to the value given in table 6.3. There is difference between the two as
here we are still using the assumption that the voltage output is independent to the
loading circuit. This is illustrated by the fact that as the supplied voltage to the 1 ohm
resistor changes, the voltage at the output pin actually increases, and is always higher
than the voltage provided by the battery, as long as the supplied to the op-amp is
greater than the battery voltage. When the supply voltage drops to 1V, the output
current increased greatly and gave an output resistance of only 8 Ω. This suggests that
the inner workings of the op-amp depend on both the supply and the loading.

For LF411, a current of 25.34 mA is drawn from the op-amp. This gives a output
resistance of 38.4 Ω. This value is quite different to the 1 Ω figure given in the table.

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65. Based on the detailed model of the LF 411 op amp, we can write the following nodal
equation at the inverting input:
- vd v -v Av - v
0 = + x 4 d + 6d d
R in 10 10 + R o

Substituting values for the LF 411 and simplifying, we make appropriate

approximations and then solve for vd in terms of vx, finding that

- 106 vx
vd = vx = -
199.9 × 106 199.9
With a gain of –1000/10 = -100 and supply voltage magnitudes of 15 V, we are
effectively limited to values of |vx| < 150 mV.
For vx = -10 mV, PSpice predicts vd = 6 μV, where the hand calculations based on the
detailed model predict 50 μV, which is about one order of magnitude larger. For the
same input voltage, PSpice predicts an input current of -1 μA, whereas the hand
calculations predict 99.5vx mA = -995 nA (which is reasonably close).

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66. (a) The gain of the inverting amplifier is –1000. At a sensor voltage of –30 mV, the
predicted output voltage (assuming an ideal op amp) is +30 V. At a sensor voltage of
+75 mV, the predicted output voltage (again assuming an ideal op amp) is –75 V.
Since the op amp is being powered by dc sources with voltage magnitude equal to 15
V, the output voltage range will realistically be limited to the range
–15 < Vout < 15 V.

(b) The peak input voltage is 75 mV. Therefore, 15/ 75×10-3 = 200, and we should set
the resistance ratio Rf/ R1 < 199 to ensure the op amp does not saturate.

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67. (a)

We see from the simulation result that negative saturation begins at Vin = –4.72 V,
and positive saturation begins at Vin = +4.67 V.

(b) Using a 1 pΩ resistor between the output pin and ground, we obtain an output
current of 40.61 mA, slightly larger than the expected 35 mA, but not too far off.

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68. We assume that the strength of the separately-broadcast chaotic “noise” signal is
received at the appropriate intensity such that it may precisely cancel out the chaotic
component of the total received signal; otherwise, a variable-gain stage would need to
be added so that this could be adjusted by the user. We also assume that the signal
frequency is separate from the “carrier” or broadcast frequency, and has already been
separated out by an appropriate circuit (in a similar fashion, a radio station
transmitting at 92 MHz is sending an audio signal of between 20 and 20 kHz, which
must be separated from the 92 MHz frequency.)

One possible solution of many (all resistances in ohms):

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69. One possible solution of many:

This circuit produces an output equal to the average of V1, V2, and V3, as shown in the
simulation result: Vaverage = (1.45 + 3.95 + 7.82)/ 3 = 4.407 V.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

70. Assuming ideal situations (ie slew rate = infinite)

a)

20
18 V
15

10
V out (V)

-5
-5 -3 -1 1 3 5
V active (V)

b)
20
18 V
15

10
V out (V)

-5
-5 -3 -1 1 3 5
V active (V)

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

71. a)

15
12 V
10

5
V out (V)

0
-2 -1 0 1 2
-5

-10
-12 V
-15
V active (V)

b) The simulation is performed using the following circuit:

Where RL = load resistor which is needed for the voltage probe to perform properly.
The battery is swept from -2V to +2 V and the voltage sweep is displayed on the next
page.

It can be seen that the sweep is very much identical to what was expected, with a
discontinuity at 0V. The only difference is the voltage levels which are +11.61V and –
11.61 V instead of ±12 V. This is because the output of an op-amp or comparator can
never quite reach the supplied voltage.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

72. a)

15

10

5
V out (V)

0
-5 -3 -1 1 3 5
-5

-10

-15
V active (V)

b)
15

10

5
V out (V)

0
-5 -3 -1 1 3 5
-5

-10

-15
V 2 (V)

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

73. The following comparator setup would give a logic 0 for voltages below 1.5 V and
logic 1 for voltages above 1.5 V

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

74. The voltage output of the circuit is given by

R4 1 + R2 / R1 R
vout = ( ) v + − 2 v−
R3 1 + R4 / R3 R1

a) When R1 = R3 and R2 = R4, the equation reduces to

R
vout = 4 (v+ − v− )
R3
When v+ = v-, vout = 0, thus ACM = 0. Hence CMRR = ∞

b) If R1, R2, R3 and R4 are all different, then when v+ = v- = v,

R 1 + R2 / R1 R
vout = ( 4 ( ) − 2 )v
R3 1 + R4 / R3 R1
Simplifying the algebra gives
R R − R3 R4
vout = 1 4 v
R1 R3 + R1 R4

If v+ and v- are different, it turns out that it is impossible to separate vout and vd
completely. Therefore, it is not possible to obtain A or CMRR in symbolic form.

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 Engineering Circuit Analysis, 7th Edition Chapter Six Solutions 10 March 2006

75. a) The voltage at node between R1 and R2 is

⎛ R2 ⎞
V 1 = V ref ⎜⎜ ⎟⎟
⎝ R1 + R 2 ⎠
by treating it as a voltage divider. Similarly, the voltage at node between RGauge and
R3 is:
⎛ R3 ⎞
V2 = Vref ⎜ ⎟
⎜R +R ⎟
⎝ 3 Gauge ⎠
Therefore, the output voltage is
⎛ R2 R3 ⎞
Vout = V1 − V2 = Vref ⎜ − ⎟
⎜R +R R +R ⎟
⎝ 1 2 3 Gauge ⎠

b) If R1 = R2 = R3 = Rgauge then the two terms in the bracket cancels out, giving Vout =
0.

c) The amplifier has a maximum gain of 1000 and minimum gain of 2. Therefore to
get a voltage of 1V at maximum loading, the voltage input into the amplifier must fall
between 0.001 and 0.5, i.e. 0.5 > Vout > 0.001.

To simplify the situation, let R1 = R2 = R3 = R, then at maximum loading,

⎛ R ⎞
Vout = Vref ⎜ −
R ⎟ = 12⎛⎜ 1 − R ⎞
⎟
⎜R+R R+R ⎟
⎝ Gauge + ΔR ⎠ ⎝ 2 R + 5k + 50m ⎠

Using this we can set up two inequalities according to the two limits. The first one is:
⎛ 12 R ⎞
⎜6 − ⎟ ≥ 0.001
⎝ R + 5k + 50m ⎠
Solving gives
12 R
5.999 ≥
R + 5000.05

4998.38 ≥ R
12 R
Similarly, the lower gain limit gives: 5.5 ≤
R + 5000.05

⇒ 4230 ≤ R

This gives 4998.38 > R > 4230. Using standard resistor values, the only possible
resistor values are R = 4.3 kΩ and R = 4.7 kΩ.

If we take R = 4.7 kΩ, then

⎛1 4.7k ⎞
Vout = 12⎜ − ⎟ = 0.1855
⎝ 2 4.7k + 5k + 50m ⎠

Giving a gain of 5.388. This means a resistor value of R = 50.5/(5.388 – 1) = 11.5 kΩ

or 11kΩ using standard value is needed between pin 1 and pin 8 of the amplifier.

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