1.2.1 VTU Scheme Syllabus Min
1.2.1 VTU Scheme Syllabus Min
Department
Credits
Teaching
Total Marks
Board
Duration in
SEE Marks
CIE Marks
Sl. No
Practical/
Drawing
Course Title
Theory
Course Code
hours
1 Engineering Mathematics --
17MAT11 Mathematics Basic Science 04 03 60 40 100 4
-I
2 17PHY12 Engineering Physics Physics Basic Science 04 -- 03 60 40 100 4
Elements of Civil --
Civil
3 17CIV13 Civil Engineerin 04 03 60 40 100 4
Engineering
Engineering and g
Mechanics
Elements of Mechanical Mechanical Mechanical --
4 17EME14 04 03 60 40 100 4
Engineering Engineering Engineering
Basic Electrical E and E E and E
5 17ELE17 04 -- 03 60 40 100 4
Engineering Engineering Engineering
ME, Auto, IP,
Mechanical 01Hour Instruction
6 17WSL16 Workshop Practice IEM, Mfg 03 60 40 100 2
Engineerin 02Hour Practical
Engineering
g
Engineering 01Hour Instruction
7 17PHYL17 Physics Basic Science 03 60 40 100 2
Physics Laboratory 02Hour Practical
Language – English
8 17ENG18 Humanities -- 01 -- -- -- -- --
(Audit Course)
Theory:21 hours
TOTAL 21 420 280 700 24
Practical: 06 hours
Department
Credits
Teaching
Total Marks
Board
Duration in
SEE Marks
CIE Marks
Sl.
Practical/
Drawing
Course Title
Theory
Course Code
hours
No
CREDITS - 04
Course Objectives:
To enable the students to apply the knowledge of Mathematics in various
engineering fields by making them to learn the following:
• nth derivatives of product of two functions and polar curves.
• Partial derivatives
• Vector calculus
• Reduction formulae of integration; To solve First order differential
equations.
• Solution of system of linear equations , quadratic forms.
Module - 1 Hours – 10
Module -2
Differential Calculus -2 Hours - 10
Module – 3
Hours - 10
Vector Calculus:
Derivative of vector valued functions, Velocity, Acceleration and
related problems, Scalar and Vector point functions. Definition of
Gradient, Divergence and Curl-problems. Solenoidal and
Irrotational vector fields. Vector identities - div(ɸA), curl (ɸA ),
curl( grad ɸ), div(curl A).
Module-4
Module-5
Linear Algebra Hours - 10
Course outcomes:
CREDITS - 04
Course objectives:
Module-4
Module-5
Module -1 Teaching
Hours
Electrochemistry and Battery Technology 10 hours
Module -2
Module - 3
Fuels and Solar Energy: 10 hours
Fuels: Introduction, classification, calorific value- gross and
net calorific values, determination of calorific value of fuel using
bomb calorimeter, numerical problems. Cracking: Introduction,
fluidized catalytic cracking, synthesis of petrol by Fishcher-Tropsch
process, reformation of petrol, octane and cetane numbers.
Gasoline and diesel knocking and their mechanism, anti knocking
agents, power alcohol & biodiesel.
Module - 4
Polymers: 10 hours
Course outcomes:
On completion of this course, students will have knowledge in:
Text Books:
1. B.S.Jai Prakash, R.Venugopal, Sivakumaraiah & Pushpa Iyengar.,
“Chemistry for Engineering Students”, Subhash Publications,
Bangalore.
2. R.V.Gadag & A.Nityananda Shetty., “Engineering Chemistry”, I K
International Publishing House Private Ltd. New Delhi.
3. P.C.Jain & Monica Jain.,“Engineering Chemistry”, Dhanpat Rai
Publications, New Delhi.
Reference Books:
1. O.G.Palanna,“Engineering Chemistry”,Tata McGraw Hill Education Pvt.
Ltd. New Delhi, Fourth Reprint.
2. G.A.Ozin & A.C. Arsenault, “Nanochemistry A Chemical Approach to
Nanomaterials”, RSC publishing, 2005.
3. “Wiley Engineering Chemistry”, Wiley India Pvt. Ltd. New Delhi. Second
Edition.
4. V.R.Gowariker, N.V.Viswanathan & J.Sreedhar., “Polymer Science”,
Wiley-Eastern Ltd.
5. M.G.Fontana., “Corrosion Engineering”, Tata McGraw Hill Publishing
Pvt. Ltd. New Delhi.
ENGINEERING PHYSICS
[As per Choice Based Credit System (CBCS) scheme]
(Effective from the academic year 2017 -2018)
SEMESTER - I/II
Number of Lecture 04
Exam Marks 60
Hours/Week
CREDITS - 04
COURSE OBJECTIVES:
The Objective of this course is to make students learn and understand basic
concepts and principles of physics to analyze practical engineering problems and
apply its solutions effectively and meaningfully. To understand building up of
models, design issues, practical oriented skills and problem solving challenges are
the great task of the course. To know about shock waves and practical applications is
the prime motto to introduce new technology at the initial stage of Engineering.
Module -1 Teaching
Hours
10 Hours
Modern Physics and Quantum Mechanics
Module-5
10 Hours
Shock waves and Science of Nano Materials
• Learn and understand more about basic principles and to develop problem
solving skills and implementation in technology.
• Gain Knowledge about Modern physics and quantum mechanics will update
the basic concepts to implement the skills.
• Study of material properties and their applications is the prime role to
understand and use in engineering applications and studies.
• Study Lasers and Optical fibers and its applications are to import knowledge
and to develop skills and to use modern instruments in the engineering
applications.
• Understand Crystal structure and applications are to boost the technical skills
and its applications.
• Expose shock waves concept and its applications will bring latest technology to
the students at the first year level to develop research orientation programs at
higher semester level.
• Understand basic concepts of nano science and technology.
1. Wiley precise Text, Engineering Physics, Wiley India Private Ltd., New
Delhi.
Book series – 2014,
2. Dr. M.N. Avadhanulu, Dr. P.G.Kshirsagar, Text Book of Engineering
Physics, S Chand Publishing, New Delhi - 2012
Reference Books:
Credits - 04
Course objectives:
D C circuits: Ohm’s Law and Kirchhoff’s Laws, analysis of series, parallel and series-
parallel circuits excited by independent voltage sources. Power and Energy. Illustrative
examples. 5 Hours
Electromagnetism:
Review of field around a conductor and coil, magnetic flux and flux density, magnetomotive
force and magnetic field intensity, reluctance and permeability, definition of magnetic
circuit and basic analogy between electric and magnetic circuits. (These topics are not to be
considered for setting the examination questions).
Operation of DC motor, back emf, torque equation. Types of DC motors, characteristics and
applications. Significance of back emf. Necessity of a starter for DC motor. Illustrative
examples on back emf and torque. 7 Hours
Module - 3
Domestic wiring:
Service mains, meter board and distribution board. Brief discussion on concealed conduit
wiring. Two-way and three-way control. Elementary discussion on Circuit protective
devices: fuse and Miniature Circuit Breaker (MCB’s). Electric shock, precautions against
shock, Objectives of Earthing, types of earthing; pipe and plate earthing, Residual current
circuit breaker (RCCB). 3 Hours
Module-4
Three Phase Circuits: Necessity and advantages of three phase systems, generation of
three phase power. Definition of Phase sequence, balanced supply and balanced load.
Relationship between line and phase values of balanced star and delta connections. Power
in balanced three-phase circuits, measurement of power by two-wattmeter method.
Determination power factor using wattmeter readings. Illustrative examples. 6 Hours
Three PhaseSynchronous Generators: Principle of operation, Types and constructional
features, Advantages of rotating field type alternator, Synchronous speed, Frequency of
generated voltage, Emf equation. Concept of winding factor (excluding the derivation of
distribution and pitch factors). Illustrative examples on calculation of distribution factor,
pitch factor and emf equation. 4 Hours
Module-5
Course outcomes:
After the completion of the course, the student should be able
Module -1 Teach
ing
Hours
Semiconductor Diodes and Applications (Text-1): p-n junction 06
Hours
diode, Characteristics and Parameters, Diode approximations, DC
load line analysis, Half-wave rectifier, Two-diode Full-wave rectifier,
Bridge rectifier, Capacitor filter circuit (only qualitative approch),
Zener diode voltage regulators: Regulator circuit with no load,
Loaded Regulator. Numerical examples as applicable.
Bipolar Junction Transistors: BJT operation, BJT Voltages and
Currents, BJT amplification, Common Base, Common Emitter and
04
Common Collector Characteristics, Numerical examples as Hours
applicable.
Module -2
BJT Biasing (Text-1): DC Load line and Bias Point, Base Bias, 04
Hours
Voltage divider Bias, Numerical examples as applicable.
Module-4
Module-5
Communication Systems (Text-2): Introduction, Elements of 06
Hours
Communication Systems, Modulation: Amplitude Modulation,
Spectrum Power, AM Detection (Demodulation), Frequency and
Phase Modulation. Amplitude and Frequency Modulation: A
comparison.
Transducers (Text-2): Introduction, Passive Electrical Transducers,
Resistive Transducers, Resistance Thermometers, Thermistor. 04
Hours
Linear Variable Differential Transformer (LVDT). Active Electrical
Transducers, Piezoelectric Transducer, Photoelectric Transducer.
Course outcomes:
After studying this course, students will be able to:
• Appreciate the significance of electronics in different applications,
• Understand the applications of diode in rectifiers, filter circuits and
wave shaping,
• Apply the concept of diode in rectifiers, filters circuits
• Design simple circuits like amplifiers (inverting and non inverting),
comparators, adders, integrator and differentiator using OPAMPS,
• Compile the different building blocks in digital electronics using logic
gates and implement simple logic function using basic universal
gates, and
• Understand the functioning of a communication system, and different
modulation technologies, and
• Understand the basic principles of different types of Transuducers.
Text Books:
1. David A. Bell, “Electronic Devices and Circuits”, Oxford University
Press, 5th Edition, 2008.
2. D.P. Kothari, I. J. Nagrath, “Basic Electronics”, McGraw Hill
Education (India) Private Limited, 2014.
Number of Lecture 04
Exam Marks 60
Hours/Week
CREDITS - 04
COURSE OBJECTIVES:
The objectives of this course is to make students to learn basics of Civil
Engineering concepts and infrastructure development, solve problems involving
Forces, loads and Moments and know their applications in allied subjects. It is a
pre-requisite for several courses involving Forces, Moments, Centroids, Moment
of inertia and Kinematics.
Particulars Hours
Module 1: Introduction to Civil Engineering &Engineering 10
Mechanics
Introduction to Civil Engineering
Scope of different fields of Civil Engineering - Surveying, Building
Materials, Construction Technology, Geotechnical Engineering,
Structural Engineering, Hydraulics, WaterResources and Irrigation
01
Engineering, Transportation Engineering, Environmental Engineering.
Module 5: Kinematics 10
Concepts and Applications 02
Definitions – Displacement – Average velocity – Instantaneous velocity
– Speed – Acceleration - Average acceleration – Variable acceleration –
Acceleration due to gravity – Newton’s Laws of Motion.
Rectilinear Motion–Numerical problems. 02
Curvilinear Motion – Super elevation – ProjectileMotion – Relative 03
motion – Numerical problems.
Motion under gravity – Numerical problems. 03
COURSE OUTCOMES
After a successful completion of the course, the student will be able to:
1. Know basics of Civil Engineering, its scope of study, knowledge about Roads,
Bridges and Dams;
2. Comprehend the action of Forces, Moments and other loads on systems of
rigid bodies;
3. Compute the reactive forces and the effects that develop as a result of the
external loads;
4. Locate the Centroid and compute the Moment of Inertia of regular cross-
sections.
5. Express the relationship between the motion of bodies and
6. Equipped to pursue studies in allied courses in Mechanics.
TEXT BOOKS
1. Elements of Civil Engineering and Engineering Mechanics by M.N. Shesha
Prakash and Ganesh. B. Mogaveer, PHI Learning, 3rd Revised edition (2014)
2. Engineering Mechanics-Statics and Dynamics by A Nelson, Tata McGraw Hill
Education Private Ltd, New Delhi, 2009.
3. Elements of Civil Engineering (IV Edition) by S.S. Bhavikatti, New Age
International Publisher, New Delhi, 3rd edition 2009.
REFERENCES
Module -1 Teaching
Hours
1
Module -2
Turbines and IC Engines and Pumps Steam turbines :Classification, 10
Hours
Principle of operation of Impulse and reaction turbines, Delaval’s
turbine, Parson’s turbine. (No compounding of turbines).
Module - 3
Machine Tools and Automation Machine Tools Operations : 10
Hours
Turning, facing, knurling, Thread cutting, Taper Turning by swivelling
the compound rest, Drilling, Boring, Reaming, Tapping, Counter
Sinking, Counter Boring, -Plane milling, End milling, Slot milling. (No
sketches of Machine tools, sketches to be used only for explaining
operations. Students to be shown the available machine tools in the
Machine Shop of the college before explaining the operations)
2
Module-4
Engineering materials and joining processes : 10
Hours
Engineering Materials :Types and applications of Ferrous &
Nonferrous metals and alloys,
Course outcomes:
Students shall demonstrate knowledge associated with,
1. Various Energy sources, Boilers, Prime movers such as turbines and IC
engines, refrigeration and air-conditioning systems
2. Metal removal process using Lathe, drilling, Milling Robotics and
Automation.
3. Fair understanding of application and usage of various engineering
materials.
3
from each module.
• Each full question will have sub questions covering all the topics under a
module.
• The students will have to answer 5 full questions, selecting one full
question from each module.from each module.
• Each full question will have sub questions covering all the topics under a
module.
Text Books:
Reference Books:
4
COMPUTER AIDED ENGINEERING DRAWING
[As per Choice Based Credit System (CBCS) scheme]
(Effective from the academic year 2017 -2018)
SEMESTER - I/II
Subject Code 17CED14/17CED24 IA Marks 40
Number of Lecture 6 (2T + 4L)
Exam Marks 60
Hours/Week
Total Number of Lecture Hours 84 Exam Hours 03
CREDITS - 04
Course objectives:
Engineering drawing is an important tool for all Engineers and for many
others professionals. It is the language of Engineers. Engineering Drawing
communicates all needed information from the engineer who designed a part
to the workers who will manufacture it.
Module -1 Teaching
Hours
1
Introduction to Computer Aided Sketching 06 Hours
Introduction, Drawing Instruments and their uses, BIS
conventions, Lettering, Dimensioning and free hand practicing.
Computer screen, layout of the software, standard tool
bar/menus and description of most commonly used tool bars,
navigational tools. Co-ordinate system and reference planes. of
HP, VP, RPP & LPP. of 2D/3D environment. Selection of drawing
size and scale. Commands and creation of Lines, Co-ordinate
points, axes, poly-lines, square, rectangle, polygons, splines,
circles, ellipse, text, move, copy, off-set, mirror, rotate, trim,
extend, break, chamfer, fillet, curves, constraints viz. tangency,
parallelism, inclination and perpendicularity. Dimensioning, line
conventions, material conventions and lettering.
Module -2 Teaching
Hours
Orthographic projections 20Hours
Introduction, Definitions - Planes of projection, reference line and
conventions employed, Projections of points in all the four
quadrants, Projections of straight lines (located in First
quadrant/first angle only), True and apparent lengths, True and
apparent inclinations to reference planes (No application
problems).
Orthographic Projections of Plane Surfaces (First Angle Projection
Only)
Introduction, Definitions–projections of plane surfaces–triangle,
square, rectangle, rhombus, pentagon, hexagon and circle,
planes in different positions by change of position method only
(No problems on punched plates and composite plates).
Module-3
2
Projections of Solids (First angle Projection only) 28 Hours
Introduction, Definitions – Projections of right regular
tetrahedron, hexahedron (cube), prisms, pyramids, cylinders and
cones in different positions (No problems on octahedrons and
combination solid).
Module-4
Sections And Development of Lateral Surfaces of Solids 15Hours
Introduction, Section planes, Sections, Section views, Sectional
views, Apparent shapes and True shapes of Sections of right
regular prisms, pyramids, cylinders and cones resting with base
on HP. (No problems on sections of solids)
Development of lateral surfaces of above solids, their frustums
and truncations. (No problems on lateral surfaces of trays,
tetrahedrons, spheres and transition pieces).
Module-5
Isometric Projection (Using Isometric Scale Only)
Introduction, Isometric scale, Isometric projection of simple plane 15 Hours
figures, Isometric projection of tetrahedron, hexahedron(cube),
right regular prisms, pyramids, cylinders, cones, spheres, cut
spheres and combination of solids (Maximum of three solids).
Course outcomes:
After studying this course,
3. Students are evaluated for their ability in applying various concepts to solve
practical problems related to engineering drawing.
3
Question paper pattern:
Scheme of Examination
1. Module 1 is only for practice and Internal Assessment and not for
Examination.
2. Question paper for each batch of students will be sent online by VTU and
has to be downloaded before the commencement of Examination of each
batch. The answer sheets will have to be jointly evaluated by the Internal and
External examiners.
1 Module 2 30
2 Module 3 40
3 Module 4 or Module 5 30
Total 100
Scheme of Evaluation
1 10 Marks 20 Marks 30
2 15 Marks 25 Marks 40
3 15 Marks 15 Marks 30
Students have to submit the computer printouts and the sketches drawn on
the graph sheets at the end of the examination. Both Internal and External
examiners have to jointly evaluate the solutions (Sketches), Computer display
4
and Printouts of each student for 100 Marks (40 Marks for solutions &
sketches + 60 Marks for computer display and printouts). Submit the marks
list along with the solution (sketches) on graph sheets and computer printouts
in separate covers.
5
Text Books:
1) Engineering Drawing - N.D. Bhatt & V.M. Panchal, 48th edition, 2005-
Charotar Publishing House, Gujarat.
2) "Computer Aided Engineering Drawing" by Dr. M H Annaiah, Dr C N
Chandrappa and Dr B Sudheer Premkumar Fifth edition, New Age
International Publishers.
Reference Books:
1) Computer Aided Engineering Drawing - S. Trymbaka Murthy, - I.K.
International Publishing House Pvt. Ltd., New Delhi, 3rd revised edition- 2006.
2) Engineering Graphics - K.R. Gopalakrishna, 32nd edition, 2005- Subash
Publishers Bangalore.
3) Fundamentals of Engineering Drawing with an Introduction to Interactive
Computer Graphics for Design and Production- Luzadder Warren J., Duff
John M., Eastern Economy Edition, 2005- Prentice-Hall of India Pvt. Ltd., New
Delhi.
4) A Primer on Computer Aided Engineering Drawing-2006, Published by
VTU, Belgaum.
6
COMPUTER PROGRAMMING LABORATORY
[As per Choice Based Credit System (CBCS) scheme]
(Effective from the academic year 2017 -2018)
SEMESTER - I/II
Laboratory Code 17CPL 16 / 17CPL26 IA Marks 40
CREDITS - 02
Course objectives: To provide basic principles C programming language. To provide design & develop of C
programming skills. To provide practical exposures like designing flowcharts, algorithms, how to debug
programs etc.
Laboratory Session-1: Write-up on Functional block diagram of Computer, CPU, Buses, Mother Board,
Chip sets, Operating System & types of OS, Basics of Networking & Topology and NIC.
Laboratory Session-2: Write-up on RAM, SDRAM, FLASH memory, Hard disks, Optical media, CD-
ROM/R/RW, DVDs, Flash drives, Keyboard, Mouse, Printers and Plotters. Introduction to flowchart,
algorithm and pseudo code.
Note: These TWO Laboratory sessions are used to fill the gap between theory classes and practical sessions.
Both sessions are to be evaluated as lab experiments.
Laboratory Experiments:
Implement the following programs with WINDOWS / LINUX platform using appropriate C compiler.
1. Design and develop a flowchart or an algorithm that takes three coefficients (a, b, and c) of a
Quadratic equation (ax2+bx+c=0) as input and compute all possible roots. Implement a C
program for the developed flowchart/algorithm and execute the same to output the possible
roots for a given set of coefficients with appropriate messages.
2. Design and develop an algorithm to find the reverse of an integer number NUM and check
whether it is PALINDROME or NOT. Implement a C program for the developed algorithm
that takes an integer number as input and output the reverse of the same with suitable
messages. Ex: Num: 2014, Reverse: 4102, Not a Palindrome
3.
3a. Design and develop a flowchart to find the square root of a given number N. Implement
a C program for the same and execute for all possible inputs with appropriate messages.
Note: Don’t use library function sqrt(n).
1
3b. Design and develop a C program to read a year as an input and find whether it is leap year or
not. Also consider end of the centuries.
4. Design and develop an algorithm to evaluate polynomial f(x) = a4x4 + a3x3 + a2x2 + a1x + a0,
for a given value of x and its coefficients using Horner’s method. Implement a C program
for the same and execute the program with different set of values of coefficients and x.
5. Draw the flowchart and Write a C Program to compute Sin(x) using Taylor series approximation
given by Sin(x) = x - (x3/3!) + (x5/5!) - (x7/7!) + …….
Compare your result with the built- in Library function. Print both the results with appropriate
messages.
6. Develop an algorithm, implement and execute a C program that reads N integer numbers and
arrange them in ascending order using Bubble Sort.
7. Develop, implement and execute a C program that reads two matrices A (m x n ) and B
(p x q ) and Compute product of matrices A and B. Read matrix A and matrix B in row
major order and in column major order respectively. Print both the input matrices and resultant
matrix with suitable headings and output should be in matrix format only. Program must
check the compatibility of orders of the matrices for multiplication. Report appropriate
message in case of incompatibility.
8. Develop, implement and execute a C program to search a Name in a list of names using Binary
searching Technique.
10.
a. Design and develop a C function RightShift(x ,n) that takes two integers x and n as
input and returns value of the integer x rotated to the right by n positions. Assume the
integers are unsigned. Write a C program that invokes this function with different values
for x and n and tabulate the results with suitable headings.
b. Design and develop a C function isprime(num) that accepts an integer argument and
returns 1 if the argument is prime, a 0 otherwise. Write a C program that invokes this
function to generate prime numbers between the given range.
11. Draw the flowchart and write a recursive C function to find the factorial of a number, n!, defined by
fact(n)=1, if n=0. Otherwise fact(n)=n*fact(n-1). Using this function, write a C program to compute
the binomial coefficient nCr. Tabulate the results for different values of n and r with suitable
messages.
12. Given two university information files “studentname.txt” and “usn.txt” that contains students
Name and USN respectively. Write a C program to create a new file called “output.txt” and
copy the content of files “studentname.txt” and “usn.txt” into output file in the sequence
2
shown below . Display the contents of output file “output.txt” on to the screen.
Student Name USN Heading
Name 1 USN1
Name 2 USN2
…. ….
…. ….
13. Write a C program to maintain a record of n student details using an array of structures with
four fields (Roll number, Name, Marks, and Grade). Assume appropriate data type for each
field. Print the marks of the student, given the student name as input.
14. Write a C program using pointers to compute the sum, mean and standard deviation of all elements
stored in an array of n real numbers.
Course outcomes:
3
ENGINEERING CHEMISTRY LABORATORY
[As per Choice Based Credit System (CBCS) scheme]
(Effective from the academic year 2017 -2018)
SEMESTER - I/II
6. Estimation of Sodium and Potassium in the given sample of water using Flame
Photometer.
Volumetric Experiments
Reference Books:
SEMESTER - I/II
6. Estimation of Sodium and Potassium in the given sample of water using Flame
Photometer.
Volumetric Experiments
Reference Books:
EXPERIMENTS:
1. Black box experiment; Identification of unknown passive
electrical components and determine the value of Inductance
and Capacitance
2. Series and parallel LCR Circuits (Determination of resonant
frequency and quality factor)
3. I–V Characteristics of Zener Diode. (determination of knee
voltage, zener voltage and forward resistance)
4. Characteristics of Transistor (Study of Input and Output
characteristics and calculation of input resistance, output
resistance and amplification factor)
5. Photo Diode Characteristics (Study of I–V characteristics in
reverse bias and variation of photocurrent as a function of
reverse voltage and intensity).
6. Dielectric constant (Measurement of dielectric constant).
7. Diffraction (Measurement of wavelength of laser source using
diffraction grating).
8. Torsional pendulum (Determination of M.I. of wire and
Rigidity modulus).
9. Determination of Fermi energy. (Measurement of Fermi energy
in copper).
10. Uniform Bending Experiment (Determination of Youngs
modulus of material bar).
11. Newtons Rings, (Determination of radius of curvature of
plano convex lens).
12. Verification of Stefan’s Law.
Course Outcomes:
On Completion of this course, students are able to –
• Develop skills to impart practical knowledge in real time solution.
Reference Books:
1) G. Sankaran, “English Rank Scorer”, Addone Publishing group, Thiruvanantapuram, Kerala
2) Wren & Martin “English Grammar”.
3) John Seely, “Oxford Guide to Speaking and Writing”, 2000
ENVIRONMENTAL STUDIES
[As per Choice Based Credit System (CBCS) scheme]
(Effective from the academic year 2017 -2018)
SEMESTER - I/II
Subject Code 17CIV18/17CIV28 IA Marks 20
Module - 2
Natural Resources, Water resources – Availability & Quality aspects, Water borne diseases &
water induced diseases, Fluoride problem in drinking water Mineral resources, Forest
Wealth Material Cycles – Carbon Cycle, Nitrogen Cycle & Sulphur Cycle. 2 Hours
Energy – Different types of energy, Conventional sources & Non Conventional sources of
energy Solar energy, Hydro electric energy, Wind Energy, Nuclear energy, Biomass &
Biogas Fossil Fuels, Hydrogen as an alternative energy. 3 Hours
Module -3
Environmental Pollution – Water Pollution, Noise pollution, Land Pollution, Public Health
Aspects. 2 Hours
Global Environmental Issues: Population Growth, Urbanization, Land Management, Water
& Waste Water Management. 3 Hours
Module -4
Air Pollution & Automobile Pollution: Definition, Effects – Global Warming, Acid rain &
Ozone layer depletion, controlling measures. 3 Hours
Solid Waste Management, E - Waste Management & Biomedical Waste Management -
Sources, Characteristics & Disposal methods. 2 Hours
Module - 5
Introduction to GIS & Remote sensing, Applications of GIS & Remote Sensing in
Environmental Engineering Practices. 2 Hours
Environmental Acts & Regulations, Role of government, Legal aspects, Role of Non-
governmental Organizations (NGOs) , Environmental Education & Women Education.
3 Hours
Course Outcome:
Students will be able to,
1. Understand the principles of ecology and environmental issues that apply to air,
land, and water issues on a global scale,
2. Develop critical thinking and/or observation skills, and apply them to the analysis
of a problem or question related to the environment,
3. Demonstrate ecology knowledge of a complex relationship between biotic and
abiotic components
4. Apply their ecological knowledge to illustrate and graph a problem and describe
the realities that managers face when dealing with complex issues
Text Books:
1. Benny Joseph (2005), “Environmental Studies”, Tata McGraw – Hill Publishing
Company Limited.
2. R.J.Ranjit Daniels and Jagadish Krishnaswamy, (2009), “Environmental Studies”,
Wiley India Private Ltd., New Delhi.
3. R Rajagopalan, “Environmental Studies – From Crisis to Cure”, Oxford
University Press, 2005,
4. Aloka Debi, “Environmental Science and Engineering”, Universities Press (India)
Pvt. Ltd. 2012.
Reference Books:
1. Raman Sivakumar, “Principals of Environmental Science and Engineering”,
Second Edition, Cengage learning Singapore, 2005
2. P. Meenakshi, “Elements of Environmental Science and Engineering”, Prentice
Hall of India Private Limited, New Delhi, 2006
3. S.M. Prakash, “Environmental Studies”, Elite Publishers Mangalore, 2007
4. Erach Bharucha, “Text Book of Environmental Studies”, for UGC, University
press, 2005
5. G.Tyler Miller Jr., “Environmental Science – working with the Earth”, Tenth
Edition, Thomson Brooks /Cole, 2004
6. G.Tyler Miller Jr., “Environmental Science – working with the Earth”, Eleventh
Edition, Thomson Brooks /Cole, 2006
7. Dr.Pratiba Sing, Dr.AnoopSingh and Dr.Piyush Malaviya, “Text Book of
Environmental and Ecology”, Acme Learning Pvt. Ltd. New Delhi.
PROGRAMMING IN C AND DATA STRUCTURES
[As per Choice Based Credit System (CBCS) scheme]
(Effective from the academic year 2017 -2018)
SEMESTER - I/II
CREDITS - 02
Course objectives:
To impart knowledge and skill to use tools, machines, equipment, and
measuring instruments.
Educate students of Safe handling of machines and tools.
Module -1 Teaching
Hours
1. Use of Hand Tools: V-block, Marking Gauge, Files, Hack Saw, 3 Hours
Drills, Taps and Minimum 3 models involving Dove tail joint,
Triangular joint and Semicircular joint.
2. Welding: Study of electric arc welding tools &equipments,
Models: Butt Joint, Lap Joint, T joint & L-joint.
3. Sheet Metal & Soldering Work: Development & Soldering of the
models: Tray, Frustum of cone, Prism(Hexagon &
Pentagon),Truncated Square Pyramid, Funnel.
4. Study & Demonstration of power tools in Mechanical
Engineering.
1
Course outcomes:
At the end of the course, the student will be able to:
1. Demonstrate and produce different types of fitting models.
2. Gain knowledge of development of sheet metal models with an
understanding of their applications.
3. Perform soldering and welding of different sheet metal & welded joints.
4. Understand the Basics of Workshop practices.
Scheme of Examination
2
SCHEME OF TEACHING AND EXAMINATION
B.E Electronics & Communication Engineering / Telecommunication Engineering
(Common to Electronics & Communication and Telecommunication Engineering)
III SEMESTER
Teaching Teaching Hours /Week Examination Credits
Sl.
Course Code Title Department Practical/ Duration in SEE CIE Total
No Theory
Drawing hours Marks Marks Marks
1 17MAT31 Engineering Mathematics –III* Maths 04 03 60 40 100 4
1.Kannada/Constitution of India, Professional Ethics and Human Rights: 50 % of the programs of the Institution have to teach Kannada/Constitution of India, Professional Ethics
and Human Rights in cycle based concept during III and IV semesters.
2. Audit Course:
(i) *All lateral entry students (except B.Sc candidates) have to register for Additional Mathematics – I, which is 03 contact hours per week.
(ii) Language English (Audit Course) be compulsorily studied by all lateral entry students (except B.Sc candidates)
3
B.E Electronics & Communication Engineering / Telecommunication Engineering
(Common to Electronics & Communication and Telecommunication Engineering)
IV SEMESTER
Teaching Teaching Hours /Week Examination Credits
Sl. Department
Course Code Title Practical/ Duration in SEE CIE Total
No Theory
Drawing hours Marks Marks Marks
1 17MAT41 Engineering Mathematics –IV* Maths 04 03 60 40 100 4
01-Hour Instruction 2
7 17ECL47 Microprocessor Lab EC 03 60 40 100
02-Hour Practical
01-Hour Instruction 2
8 17ECL48 Linear ICs and Communication Lab EC 03 60 40 100
02-Hour Practical
Kannada/Constitution of India,
01
9 17KL/CPH39/49 Professional Ethics and Human Humanities 01 01 30 20 50
Rights
Theory: 24hours
TOTAL 25 510 340 850 28
Practical: 06 hours
1. Kannada/Constitution of India, Professional Ethics and Human Rights: 50 % of the programs of the Institution have to teach Kannada/Constitution of India, Professional Ethics and
Human Rights in cycle based concept during III and IV semesters.
2.Audit Course:
(i) *All lateral entry students (except B.Sc candidates) have to register for Additional Mathematics – II, which is 03 contact hours per week.
(ii) Language English (Audit Course) be compulsorily studied by all lateral entry students (except B.Sc candidates)
4
B.E., III Semester, Electronics & Communication Engineering
/Telecommunication Engineering
ENGINEERING MATHEMATICS-III
B.E., III Semester, Common to all Branches
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17MAT31 CIE Marks 40
Number of Lecture 04 SEE Marks 60
Hours/Week
Total Number of 50 (10 Hours per Module) Exam Hours 03
Lecture Hours
Credits – 04
Course Objectives: This course will enable students to:
Introduce most commonly used analytical and numerical methods in the
different engineering fields.
Learn Fourier series, Fourier transforms and Z-transforms, statistical methods,
numerical methods.
Solve algebraic and transcendental equations, vector integration and calculus of
variations.
Module-1
Fourier Series: Periodic functions, Dirichlet‘s condition, Fourier Series of periodic
functions with period 2π and with arbitrary period 2c. Fourier series of even and odd
functions. Half range Fourier Series, practical harmonic analysis-Illustrative
examples from engineering field. L1, L2, L4
Module-2
Fourier Transforms: Infinite Fourier transforms, Fourier sine and cosine transforms.
Inverse Fourier transform.
Z-transform: Difference equations, basic definition, z-transform-definition, Standard z-
transforms, Damping rule, Shifting rule, Initial value and final value theorems (without
proof) and problems, Inverse z-transform. Applications of z-transforms to solve
difference equations. L2, L3, L4
Module-3
Statistical Methods: Review of measures of central tendency and dispersion.
Correlation-Karl Pearson‘s coefficient of correlation-problems. Regression analysis-
lines of regression (without proof) –Problems
Curve Fitting: Curve fitting by the method of least squares- fitting of the curves of the
form, y = ax + b, y = ax2 + bx + c and y = aebx.
Numerical Methods: Numerical solution of algebraic and transcendental equations by
Regula- Falsi Method and Newton-Raphson method. L3
Module-4
Finite differences: Forward and backward differences, Newton‘s forward and
backward interpolation formulae. Divided differences- Newton‘s divided difference
formula. Lagrange‘s interpolation formula and inverse interpolation formula (all
formulae without proof)-Problems
Numerical integration: Simpson‘s (1/3)th and (3/8)th rules, Weddle‘s rule (without
proof) – Problems. L3
9
Module-5
Vector integration: Line integrals-definition and problems, surface and volume
integrals-definition, Green‘s theorem in a plane, Stokes and Gauss-divergence
theorem(without proof) and problems. L3, L4
Calculus of Variations: Variation of function and Functional, variational problems.
Euler‘s equation, Geodesics, hanging chain, Problems. L2, L4
10
ELECTRONIC INSTRUMENTATION
SEMESTER – III (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC32 CIE Marks 40
Number of Lecture 03 SEE Marks 60
Hours/Week
13
Oscilloscopes: Introduction, Basic principles, CRT features, Block diagram of
Oscilloscope, Simple CRO, Vertical Amplifier, Horizontal Deflecting System, Sweep or
Time Base Generator, Measurement of Frequency by Lissajous Method, Digital Storage
Oscilloscope. (Text 1)
14
ANALOG ELECTRONICS
SEMESTER – III (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC33 CIE Marks 40
Number of 04 SEE Marks 60
Lecture
Hours/Week
Total Number of 50 (10 Hours per Module) Exam Hours 03
Lecture Hours
CREDITS – 04
Course objectives: This course will enable students to:
• Explain various BJT parameters, connections and configurations.
• Explain BJT Amplifier, Hybrid Equivalent and Hybrid Models.
• Explain construction and characteristics of JFETs and MOSFETs.
• Explain various types of FET biasing, and demonstrate the use of FET amplifiers.
• Construct frequency response of BJT and FET amplifiers at various frequencies.
• Analyze Power amplifier circuits in different modes of operation.
• Construct Feedback and Oscillator circuits using FET.
Module -1
BJT AC Analysis: BJT Transistor Modeling, The re transistor model, Common emitter
fixed bias, Voltage divider bias, Emitter follower configuration. Darlington connection-
DC bias; The Hybrid equivalent model, Approximate Hybrid Equivalent Circuit- Fixed
bias, Voltage divider, Emitter follower configuration; Complete Hybrid equivalent
model, Hybrid π Model. L1, L2,L3
Module -2
Module -3
BJT and JFET Frequency Response: Logarithms, Decibels, Low frequency response
– BJT Amplifier with RL, Low frequency response-FET Amplifier, Miller effect
capacitance, High frequency response – BJT Amplifier, High frequency response-FET
Amplifier, Multistage Frequency Effects. L1, L2, L3
Module -4
Text Book:
Robert L. Boylestad and Louis Nashelsky, ―Electronics devices and Circuit theory‖,
Pearson, 10th/11th Edition, 2012, ISBN:978-81-317-6459-6.
Reference Books:
1. Adel S. Sedra and Kenneth C. Smith, ―Micro Electronic Circuits Theory and
Application‖, 5th Edition ISBN:0198062257
2. Fundamentals of Microelectronics, Behzad Razavi, John Weily ISBN 2013 978-81-
265-2307-8
3. J.Millman & C.C.Halkias―Integrated Electronics, 2nd edition, 2010, TMH. ISBN 0-
07-462245-5
4. K. A. Navas, ―Electronics Lab Manual‖, Volume I, PHI, 5th Edition, 2015,
ISBN:9788120351424.
16
DIGITAL ELECTRONICS
SEMESTER – III (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC34 CIE Marks 40
Number of Lecture 04 SEE Marks 60
Hours/Week
Module – 1
Principles of combination logic: Definition of combinational logic, canonical forms,
Generation of switching equations from truth tables, Karnaugh maps-3,4,5 variables,
Incompletely specified functions (Don‘t care terms) Simplifying Max term equations,
Quine-McCluskey minimization technique, Quine-McCluskey using don‘t care terms,
Reduced prime implicants Tables (Text 1, Chapter 3). L1, L2, L3
Module -2
Analysis and design of combinational logic: General approach to combinational
logic design, Decoders, BCD decoders, Encoders, digital multiplexers, Using
multiplexers as Boolean function generators, Adders and subtractors, Cascading full
adders, Look ahead carry, Binary comparators (Text 1, Chapter 4). L1, L2, L3
Module -3
Flip-Flops: Basic Bistable elements, Latches, Timing considerations, The master-slave
flip-flops (pulse-triggered flip-flops): SR flip-flops, JK flip-flops, Edge triggered flip-
flops, Characteristic equations. (Text 2, Chapter 6) L1, L2
Module -4
Simple Flip-Flops Applications: Registers, binary ripple counters, synchronous binary
counters, Counters based on shift registers, Design of a synchronous counters,
Design of a synchronous mod-n counter using clocked T , JK , D and SR flip-flops.
(Text 2, Chapter 6) L1,L2, L3
Module -5
17
Sequential Circuit Design: Mealy and Moore models, State machine notation,
Synchronous Sequential circuit analysis, Construction of state diagrams, counter
design. (Text 1, Chapter 6) L1, L2, L3
Course Outcomes: After studying this course, students will be able to:
Develop simplified switching equation using Karnaugh Maps and Quine-
McClusky techniques.
Explain the operation of decoders, encoders, multiplexers, demultiplexers, adders,
subtractors and comparators.
Explain the working of Latches and Flip Flops (SR,D,T and JK).
Design Synchronous/Asynchronous Counters and Shift registers using Flip
Flops.
Develop Mealy/Moore Models and state diagrams for the given clocked sequential
circuits.
Apply the knowledge gained in the design of Counters and Registers.
Text Books:
1. Digital Logic Applications and Design, John M Yarbrough, Thomson Learning,
2001. ISBN 981-240-062-1.
2. Donald D. Givone, ―Digital Principles and Design‖, McGraw Hill, 2002. ISBN 978-0-
07-052906-9.
Reference Books:
1. D. P. Kothari and J. S Dhillon, ―Digital Circuits and Design‖, Pearson, 2016,
ISBN:9789332543539.
2. Morris Mano, ―Digital Design‖, Prentice Hall of India, Third Edition.
3. Charles H Roth, Jr., ―Fundamentals of logic design‖, Cengage Learning.
4. K. A. Navas, ―Electronics Lab Manual‖, Volume I, PHI, 5th Edition, 2015, ISBN:
9788120351424.
18
NETWORK ANALYSIS
SEMESTER – III (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC35 CIE Marks 40
Number of Lecture 04 SEE Marks 60
Hours/Week
19
Course Outcomes: After studying this course, students will be able to:
Determine currents and voltages using source transformation/ source shifting/
mesh/ nodal analysis and reduce given network using star-delta transformation/
source transformation/ source shifting.
Solve network problems by applying Superposition/ Reciprocity/ Thevenin‘s/
Norton‘s/ Maximum Power Transfer/ Millman‘s Network Theorems and electrical
laws to reduce circuit complexities and to arrive at feasible solutions.
Calculate current and voltages for the given circuit under transient conditions.
Apply Laplace transform to solve the given network.
Evaluate for RLC elements/ frequency response related parameters like resonant
frequency, quality factor, half power frequencies, voltage across inductor and
capacitor, current through the RLC elements, in resonant circuits
Solve the given network using specified two port network parameter like Z or Y or T
or h.
Text Books:
1. M.E. Van Valkenberg (2000), ―Network analysis‖, Prentice Hall of India, 3rd
edition, 2000, ISBN: 9780136110958.
2. Roy Choudhury, ―Networks and systems‖, 2nd edition, New Age International
Publications, 2006, ISBN: 9788122427677.
Reference Books:
1. Hayt, Kemmerly and Durbin ―Engineering Circuit Analysis‖, TMH 7th Edition,
2010.
2. J. David Irwin /R. Mark Nelms, ―Basic Engineering Circuit Analysis‖, John Wiley,
8thed, 2006.
3. Charles K Alexander and Mathew N O Sadiku, ― Fundamentals of Electric
Circuits‖, Tata McGraw-Hill, 3rd Ed, 2009.
20
ENGINEERING ELECTROMAGNETICS
SEMESTER – III (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC36 CIE Marks 40
Number of Lecture Hours/Week 04 SEE Marks 60
Total Number of Lecture Hours 50 (10 Hours per Module) Exam Hours 03
CREDITS – 04
Course objectives: This course will enable students to:
Study the different coordinate systems, Physical signifiance of Divergence, Curl
and Gradient.
Understand the applications of Coulomb‘s law and Gauss law to different charge
distributions and the applications of Laplace‘s and Poisson‘s Equations to solve
real time problems on capacitance of different charge distributions.
Understand the physical significance of Biot-Savart‘s, Amperes‘s Law and Stokes‘
theorem for different current distributions.
Infer the effects of magnetic forces, materials and inductance.
Know the physical interpretation of Maxwell‘ equations and applications for Plane
waves for their behaviour in different media
Acquire knowledge of Poynting theorem and its application of power flow.
Module - 1
Coulomb’s Law, Electric Field Intensity and Flux density
Experimental law of Coulomb, Electric field intensity, Field due to continuous volume
charge distribution, Field of a line charge, Electric flux density. L1, L2, L3
Module -2
Gauss’s law and Divergence
Gauss‘ law, Divergence. Maxwell‘s First equation (Electrostatics), Vector Operator ▼
and divergence theorem.
Energy, Potential and Conductors
Energy expended in moving a point charge in an electric field, The line integral,
Definition of potential difference and potential, The potential field of point charge,
Current and Current density, Continuity of current. L1, L2, L3
Module -3
Poisson’s and Laplace’s Equations
Derivation of Poisson‘s and Laplace‘s Equations, Uniqueness theorem, Examples of
the solution of Laplace‘s equation.
Steady Magnetic Field
Biot-Savart Law, Ampere‘s circuital law, Curl, Stokes‘ theorem, Magnetic flux and
magnetic flux density, Scalar and Vector Magnetic Potentials. L1, L2, L3
Module -4
21
Magnetic Forces
Force on a moving charge, differential current elements, Force between differential
current elements.
Magnetic Materials
Magnetisation and permeability, Magnetic boundary conditions, Magnetic circuit,
Potential Energy and forces on magnetic materials. L1, L2, L3
Module -5
Time-varying fields and Maxwell’s equations
Faraday‘s law, displacement current, Maxwell‘s equations in point form, Maxwell‘s
equations in integral form.
Uniform Plane Wave
Wave propagation in free space and good conductors. Poynting‘s theorem and wave
power, Skin Effect. L1, L2, L3
Course Outcomes: After studying this course, students will be able to:
Evaluate problems on electric field due to point, linear, volume charges by
applying conventional methods or by Gauss law.
Determine potential and energy with respect to point charge and capacitance
using Laplace equation.
Calculate magnetic field, force, and potential energy with respect to magnetic
materials.
Apply Maxwell‘s equation for time varying fields, EM waves in free space and
conductors.
Evaluate power associated with EM waves using Poynting theorem.
Text Book:
W.H. Hayt and J.A. Buck, ―Engineering Electromagnetics‖, 7th Edition, Tata
McGraw-Hill, 2009, ISBN-978-0-07-061223-5.
Reference Books:
1. John Krauss and Daniel A Fleisch, ―Electromagnetics with applications‖,
McGraw- Hill.
2. N. Narayana Rao, ―Fundamentals of Electromagnetics for Engineering‖, Pearson.
22
ANALOG ELECTRONICS LABORATORY
SEMESTER – III (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Laboratory 17ECL37 CIE Marks 40
Code
Number of 01Hr Tutorial (Instructions) SEE Marks 60
Lecture + 02 Hours Laboratory
Hours/Week
RBT Level L1, L2, L3 Exam Hours 03
CREDITS – 02
Course objectives: This laboratory course enables students to get practical experience
in design, assembly, testing and evaluation of:
Rectifiers and Voltage Regulators.
BJT characteristics and Amplifiers.
JFET Characteristics and Amplifiers.
MOSFET Characteristics and Amplifiers
Power Amplifiers.
RC-Phase shift, Hartley, Colpitts and Crystal Oscillators.
NOTE: The experiments are to be carried using discrete components only.
Laboratory Experiments:
1. Design and set up the following rectifiers with and without filters and to determine
ripple factor and rectifier efficiency:
(a) Full Wave Rectifier (b) Bridge Rectifier
2. Conduct experiment to test diode clipping (single/double ended) and clamping
circuits (positive/negative).
3. Conduct an experiment on Series Voltage Regulator using Zener diode and power
transistor to determine line and load regulation characteristics.
4. Realize BJT Darlington Emitter follower with and without bootstrapping and
determine the gain, input and output impedances.
5. Design and set up the BJT common emitter amplifier using voltage divider bias with
2.
and without feedback and determine the gain- bandwidth product from its
3.
frequency response.
6. Plot the transfer and drain characteristics of a JFET and calculate its drain
resistance, mutual conductance and amplification factor.
7. Design, setup and plot the frequency response of Common Source JFET/MOSFET
amplifier and obtain the bandwidth.
23
8. Plot the transfer and drain characteristics of n-channel MOSFET and calculate its
parameters, namely; drain resistance, mutual conductance and amplification factor.
9. Set-up and study the working of complementary symmetry class B push pull power
amplifier and calculate the efficiency.
10. Design and set-up the RC-Phase shift Oscillator using FET, and calculate the
frequency of output waveform.
11. Design and set-up the following tuned oscillator circuits using BJT, and determine
the frequency of oscillation.
(a) Hartley Oscillator (b) Colpitts Oscillator
12. Design and set-up the crystal oscillator and determine the frequency of oscillation.
Course Outcomes: On the completion of this laboratory course, the students will be
able to:
Test circuits of rectifiers, clipping circuits, clamping circuits and voltage regulators.
Determine the characteristics of BJT and FET amplifiers and plot its frequency
response.
Compute the performance parameters of amplifiers and voltage regulators
Design and test the basic BJT/FET amplifiers, BJT Power amplifier and oscillators.
24
DIGITAL ELECTRONICS LAB
SEMESTER – III (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Laboratory Code 17ECL38 CIE Marks 40
CREDITS – 02
Course objectives: This laboratory course enables students to get practical
experience in design, realisation and verification of
Demorgan‘s Theorem, SOP, POS forms
Full/Parallel Adders, Subtractors and Magnitude Comparator
Demultiplexers and Decoders applications
Flip-Flops, Shift registers and Counters
NOTE:
1. Use discrete components to test and verify the logic gates. The IC umbers
given are suggestive. Any equivalent IC can be used.
2. For experiment No. 11 and 12 any open source or licensed simulation tool
may be used.
Laboratory Experiments:
1. Verify
(a) Demorgan‘s Theorem for 2 variables.
(b) The sum-of product and product-of-sum expressions using universal gates.
5. Realize
(a) Adder & Subtractor using IC 74153.
(b) 3-variable function using IC 74151(8:1MUX).
6. Realize a Boolean expression using decoder IC74139.
7. Realize Master-Slave JK, D & T Flip-Flops using NAND Gates.
8. Realize the following shift registers using IC7474/IC 7495
(a) SISO (b) SIPO (c) PISO (d) PIPO (e) Ring and (f) Johnson counter.
9. Realize (i) Mod-N Asynchronous Counter using IC7490 and
( ii) Mod-N Synchronous counter using IC74192
10. Design Pseudo Random Sequence generator using 7495.
25
11. Simulate Full- Adder using simulation tool.
12. Simulate Mod-8 Synchronous UP/DOWN Counter using simulation tool.
Course Outcomes: On the completion of this laboratory course, the students will be
able to:
Demonstrate the truth table of various expressions and combinational circuits
using logic gates.
Design and test various combinational circuits such as adders, subtractors,
comparators, multiplexers.
Realize Boolean expression using decoders.
Construct and test flips-flops, counters and shift registers.
Simulate full adder and up/down counters.
26
B.E E&C FOURTH SEMESTER SYLLABUS
ENGINEERING MATHEMATICS-IV
B.E., IV Semester, Common to all Branches
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 15MAT41 CIE Marks 40
Number of Lecture 04 SEE Marks 60
Hours/Week
Total Number of 50 (10 Hours per Module) Exam Hours 03
Lecture Hours
Credits – 04
Course Objectives: This course will enable students to:
Module-3
Complex Variables: Review of a function of a complex variable, limits, continuity,
differentiability. Analytic functions-Cauchy-Riemann equations in cartesian and polar
forms. Properties and construction of analytic functions. Complex line integrals-
Cauchy‘s theorem and Cauchy‘s integral formula, Residue, poles, Cauchy‘s Residue
theorem (without proof) and problems. L1, L3
Joint probability distribution: Joint Probability distribution for two discrete random
variables, expectation, covariance, correlation coefficient. L3
27
Module-5
Sampling Theory: Sampling, Sampling distributions, standard error, test of
hypothesis for means and proportions, confidence limits for means, student‘s t-
distribution, Chi-square distribution as a test of goodness of fit. L3
Text Books:
1. B.S. Grewal: Higher Engineering Mathematics, Khanna Publishers, 43rd Ed.,
2015.
2. E. Kreyszig: Advanced Engineering Mathematics, John Wiley & Sons,10th Ed.,
2015.
Reference Books:
1. N.P.Bali and Manish Goyal: A Text Book of Engineering Mathematics, Laxmi
Publishers,7th Ed., 2010.
2. B.V.Ramana: "Higher Engineering Mathematics" Tata McGraw-Hill, 2006.
3. H. K. Dass and Er. Rajnish Verma: "Higher Engineering Mathematics", S.
Chand publishing, 1st edition, 2011.
Web Link and Video Lectures:
1. http://nptel.ac.in/courses.php?disciplineID=111
2. http://www.khanacademy.org/
3. http://www.class-central.com/subject/math
28
SIGNALS AND SYSTEMS
SEMESTER – IV (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC42 CIE Marks 40
Number of Lecture 04 SEE Marks 60
Hours/Week
Total Number of 50 (10 Hours per Module) Exam Hours 03
Lecture Hours
CREDITS – 04
Course objectives: This course will enable students to:
Understand the mathematical description of continuous and discrete time signals
and systems.
Analyze the signals in time domain using convolution difference/differential
equations
Classify signals into different categories based on their properties.
Analyze Linear Time Invariant (LTI) systems in time and transform domains.
Build basics for understanding of courses such as signal processing, control
system and communication.
Module -1
Introduction and Classification of signals: Definition of signal and systems,
communication and control systems as examples. Sampling of analog signals,
Continuous time and discrete time signal, Classification of signals as even, odd,
periodic and non-periodic, deterministic and non-deterministic, energy and power.
Elementary signals/Functions: Exponential, sine, impulse, step and its properties,
ramp, rectangular, triangular, signum, sync functions.
Operations on signals: Amplitude scaling, addition, multiplication, differentiation,
integration (Accumulator for DT), time scaling, time shifting and time folding.
Systems: Definition, Classification: linear and non-linear, time variant and
invariant, causal and non- causal, static and dynamic, stable and unstable,
invertible. L1, L2, L3
Module -2
Time domain representation of LTI System: System modeling: Input-output
relation, definition of impulse response, convolution sum, convolution integral,
computation of convolution integral and convolution sum using graphical method for
unit step to unit step, unit step to exponential, exponential to exponential, unit step
to rectangular and rectangular to rectangular only. Properties of convolution.
L1, L2, L3
Module -3
Module -4
31
Fourier Representation of aperiodic Signals:
FT representation of aperiodic CT signals - FT, definition, FT of standard CT
signals, Properties and their significance (4 Hours).
FT representation of aperiodic discrete signals-DTFT, definition, DTFT of standard
discrete signals, Properties and their significance (4 Hours).
Impulse sampling and reconstruction: Sampling theorem (only statement) and
reconstruction of signals (2 Hours). L1, L2, L3
Module -5
Z-Transforms: Introduction, the Z-transform, properties of the Region of
convergence, Properties of the Z-Transform, Inversion of the Z-Transform, Transform
analysis of LTI systems. L1, L2, L3
Course Outcomes: At the end of the course, students will be able to:
Classify the signals as continuous/discrete, periodic/aperiodic, even/odd,
energy/power and deterministic/random signals.
Determine the linearity, causality, time-invariance and stability properties of
continuous and discrete time systems.
Compute the response of a Continuous and Discrete LTI system using convolution
integral and convolution sum.
Determine the spectral characteristics of continuous and discrete time signal using
Fourier analysis.
Compute Z-transforms, inverse Z- transforms and transfer functions of complex
LTI systems.
Text Book:
Simon Haykins and Barry Van Veen, ―Signals and Systems‖, 2nd Edition,
2008, WileyIndia. ISBN 9971-51-239-4.
Reference Books:
1. Michael Roberts, ―Fundamentals of Signals & Systems‖, 2nd edition,
Tata McGraw-Hill, 2010, ISBN 978-0-07-070221-9.
2. Alan V Oppenheim, Alan S, Willsky and A Hamid Nawab, ―Signals and
Systems‖ Pearson Education Asia / PHI, 2nd edition, 1997. Indian
Reprint 2002.
3. H. P Hsu, R. Ranjan, ―Signals and Systems‖, Scham‘s outlines, TMH,
2006.
4. B. P. Lathi, ―Linear Systems and Signals‖, Oxford University Press, 2005.
5. Ganesh Rao and Satish Tunga, ―Signals and Systems‖, Pearson/Sanguine
Technical Publishers, 2004.
32
CONTROL SYSTEMS
SEMESTER – IV (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC43 CIE Marks 40
Number of Lecture 04 SEE Marks 60
Hours/Week
Total Number of 50(10 Hours per Module) Exam Hours 03
Lecture Hours
CREDITS – 04
Course objectives: This course will enable students to:
Module -2
Time Response of feedback control systems: Standard test signals, Unit step response
of First and Second order Systems. Time response specifications, Time response
specifications of second order systems, steady state errors and error constants.
Introduction to PI, PD and PID Controllers (excluding design). L1, L2, L3
Module -3
Stability analysis: Concepts of stability, Necessary conditions for Stability, Routh
stability criterion, Relative stability analysis: more on the Routh stability criterion,
Introduction to Root-Locus Techniques, The root locus concepts, Construction of root
loci. L1, L2, L3
Module -4
Frequency domain analysis and stability:
Correlation between time and frequency response, Bode Plots, Experimental
determination of transfer function.
Introduction to Polar Plots, (Inverse Polar Plots excluded) Mathematical preliminaries,
Nyquist Stability criterion, (Systems with transportation lag excluded)
Introduction to lead, lag and lead-lag compensating networks (excluding design).
L1, L2, L3
Module -5
33
Introduction to Digital Control System: Introduction, Spectrum Analysis of
Sampling process, Signal reconstruction, Difference equations. Introduction to State
variable analysis: Introduction, Concept of State, State variables & State model,
State model for Linear Continuous & Discrete time systems, Diaganolisation.
L1, L2, L3
Course Outcomes: At the end of the course, the students will be able to
Develop the mathematical model of mechanical and electrical systems
Develop transfer function for a given control system using block diagram
reduction techniques and signal flow graph method
Determine the time domain specifications for first and second order systems
Determine the stability of a system in the time domain using Routh-Hurwitz
criterion and Root-locus technique.
Determine the stability of a system in the frequency domain using Nyquist and
bode plots
Develop a control system model in continuous and discrete time using state
variable techniques
Text Book:
J.Nagarath and M.Gopal, ― Control Systems Engineering‖, New Age International
(P) Limited, Publishers, Fifth edition-2005, ISBN: 81-224-2008-7.
Reference Books:
1. ―Modern Control Engineering,‖ K.Ogata, Pearson Education Asia/PHI, 4th
Edition, 2002. ISBN 978-81-203-4010-7.
2. ―Automatic Control Systems‖, Benjamin C. Kuo, John Wiley India Pvt. Ltd., 8th
Edition, 2008.
3. ―Feedback and Control System,‖ Joseph J Distefano III et al., Schaum‘s
Outlines, TMH, 2nd Edition 2007.
34
PRINCIPLES OF COMMUNICATION SYSTEMS
SEMESTER – IV (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC44 CIE Marks 40
CREDITS – 04
Course objectives: This course will enable students to:
Design simple systems for generating and demodulating AM, DSB, SSB and VSB
signals.
Understand the concepts in Angle modulation for the design of communication
systems.
Design simple systems for generating and demodulating frequency modulated
signals.
Learn the concepts of random process and various types of noise.
Evaluate the performance of the communication system in presence of noise.
Analyze pulse modulation and sampling techniques.
Module – 1
AMPLITUDE MODULATION: Introduction, Amplitude Modulation: Time & Frequency –
Domain description, Switching modulator, Envelop detector.
DOUBLE SIDE BAND-SUPPRESSED CARRIER MODULATION: Time and Frequency –
Domain description, Ring modulator, Coherent detection, Costas Receiver, Quadrature
Carrier Multiplexing.
SINGLE SIDE–BAND AND VESTIGIAL SIDEBAND METHODS OF MODULATION: SSB
Modulation, VSB Modulation, Frequency Translation, Frequency- Division Multiplexing,
Theme Example: VSB Transmission of Analog and Digital Television.
(Chapter 3 of Text). L1, L2, L3
Module – 2
ANGLE MODULATION: Basic definitions, Frequency Modulation: Narrow Band FM, Wide
Band FM, Transmission bandwidth of FM Signals, Generation of FM Signals,
Demodulation of FM Signals, FM Stereo Multiplexing, Phase–Locked Loop: Nonlinear
model of PLL, Linear model of PLL, Nonlinear Effects in FM Systems. The
Superheterodyne Receiver (refer Chapter 4 of Text). L1, L2, L3
Module – 3
35
RANDOM VARIABLES & PROCESS: Introduction, Probability, Conditional Probability,
Random variables, Several Random Variables. Statistical Averages: Function of a random
variable, Moments, Random Processes, Mean, Correlation and Covariance function:
Properties of autocorrelation function, Cross–correlation functions (refer Chapter 5 of
Text).
NOISE: Shot Noise, Thermal noise, White Noise, Noise Equivalent Bandwidth (refer
Chapter 5 of Text), Noise Figure (refer Section 6.7 of Text). L1, L2, L3
Module – 4
Module – 5
Text Book:
Communication Systems, Simon Haykins & Moher, 5th Edition, John
Willey, India Pvt. Ltd, 2010, ISBN 978 – 81 – 265 – 2151 – 7.
Reference Books:
1. Modern Digital and Analog Communication Systems, B. P. Lathi, Oxford
University Press., 4th edition.
2. An Introduction to Analog and Digital Communication, Simon Haykins, John
Wiley India Pvt. Ltd., 2008, ISBN 978–81–265–3653–5.
3. Principles of Communication Systems, H.Taub & D.L.Schilling, TMH,
2011.
4. Communication Systems, Harold P.E, Stern Samy and A.Mahmond, Pearson
Edition, 2004.
5. Communication Systems: Analog and Digital, R.P.Singh and S.Sapre: TMH 2nd
edition, 2007.
36
LINEAR INTEGRATED CIRCUITS
SEMESTER – IV (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC45 CIE Marks 40
CREDITS – 04
Course objectives: This course will enable students to:
Define and describe various parameters of Op-Amp, its characteristics and
specifications.
Discuss the effects of Input and Output voltage ranges upon Op-Amp circuits.
Sketch and Analyze Op-Amp circuits to determine Input Impedances, output
Impedances and other performance parameters.
Sketch and Explain typical Frequency Response graphs for each of the Filter circuits
showing Butterworth and Chebyshev responses where ever appropriate.
Describe and Sketch the various switching circuits of Op-Amps and analyze its
operations.
Differentiate between various types of DACs and ADCs and evaluate the performance
of each with neat circuit diagrams and assuming suitable inputs.
Module – 1
Module – 2
Module – 3
37
More Applications : Limiting circuits, Clamping circuits, Peak detectors, Sample and
hold circuits, V to I and I to V converters, Differentiating Circuit, Integrator Circuit,
Phase shift oscillator, Wien bridge oscillator, Crossing detectors, inverting Schmitt
trigger. (Text 1)
Log and antilog amplifiers, Multiplier and divider. (Text2) L1, L2,L3
Module – 4
Active Filters: First order and second order active Low-pass and high pass filters,
Bandpass Filter, Bandstop Filter. (Text 1)
Voltage Regulators: Introduction, Series Op-amp regulator, IC voltage regulators. 723
general purpose regulators. (Text 2) L1, L2,L3
Module – 5
Phase locked loop: Basic Principles, Phase detector/comparator, VCO.
DAC and ADC convertor: DAC using R-2R, ADC using Successive approximation.
Other IC Application: 555 timer, Basic timer circuit, 555 timer used as astable and
monostable multivibrator. (Text 2) L1, L2,L3
Course Outcomes: After studying this course, students will be able to:
Explain Op-Amp circuit and parameters including CMRR, PSRR, Input & Output
Impedances and Slew Rate.
Design Op-Amp based Inverting, Non-inverting, Summing & Difference
Amplifier, and AC Amplifiers including Voltage Follower.
Test circuits of Op-Amp based Voltage/ Current Sources & Sinks, Current,
Instrumentation and Precision Amplifiers.
Test circuits of Op-Amp based linear and non-linear circuits comprising of
limiting, clamping, Sample & Hold, Differentiator/ Integrator Circuits, Peak
Detectors, Oscillators and Multiplier & Divider.
Design first & second order Low Pass, High Pass, Band Pass, Band Stop Filters
and Voltage Regulators using Op-Amps.
Explain applications of linear ICs in phase detector, VCO, DAC, ADC and Timer.
Text Books:
1. ―Operational Amplifiers and Linear IC‘s‖, David A. Bell, 2nd edition, PHI/Pearson,
2004. ISBN 978-81-203-2359-9.
2. ―Linear Integrated Circuits‖, D. Roy Choudhury and Shail B. Jain,
4thedition, Reprint 2006, New Age International ISBN 978-81-224-3098-1.
Reference Books:
1. Ramakant A Gayakwad, ―Op-Amps and Linear Integrated Circuits‖,
Pearson, 4th Ed, 2015. ISBN 81-7808-501-1.
2. B Somanathan Nair, ―Linear Integrated Circuits: Analysis, Design &
Applications,‖ Wiley India, 1st Edition, 2015.
3. James Cox, ―Linear Electronics Circuits and Devices‖, Cengage Learning,
Indian Edition, 2008, ISBN-13: 978-07-668-3018-7.
4. Data Sheet: http://www.ti.com/lit/ds/symlink/tl081.pdf.
38
MICROPROCESSORS
SEMESTER – IV (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC46 CIE Marks 40
Number of Lecture 03 SEE Marks 60
Hours/Week
Total Number of 40 (08 Hours per Module) Exam Hours 03
Lecture Hours
CREDITS – 03
Course objectives: This course will enable students to:
Familiarize basic architecture of 8086 microprocessor
Program 8086 Microprocessor using Assembly Level Language
Use Procedures in 8086 Programs
Understand interfacing of 16 bit microprocessor with memory and peripheral chips
involving system design
Understand the Von-Neumann, Harvard, CISC & RISC CPU architecture.
Module -1
8086 PROCESSOR: Historical background (refer Reference Book 1), 8086 CPU
Architecture (1.1 – 1.3 of Text).
Module -3
Stack and Interrupts:
Introduction to stack, Stack structure of 8086, Programming for Stack. Interrupts
and Interrupt Service routines, Interrupt cycle of 8086, NMI, INTR, Interrupt
programming, Timing and Delays. (Chap. 4 of Text). L1, L2, L3
Module -4
8086 Bus Configuration and Timings:
Physical memory Organization, General Bus operation cycle, I/O addressing
capability, Special processor activities, Minimum mode 8086 system and Timing
diagrams, Maximum Mode 8086 system and Timing diagrams. (1.4 to 1.9 of Text).
Basic Peripherals and their Interfacing with 8086 (Part 1): Static RAM
Interfacing with 8086 (5.1.1), Interfacing I/O ports, PIO 8255, Modes of operation –
Mode-0 and BSR Mode, Interfacing simple switches and simple LEDs using 8255
(Refer 5.3, 5.4, 5.5 of Text). L1, L2, L3
39
Module 5
Module 5
Basic Peripherals and their Interfacing with 8086 (Part 2):
Interfacing ADC-0808/0809, DAC-0800, Stepper Motor using 8255
(5.6.1, 5.7.2, 5.8). Timer 8254 – Mode 0 & 3 and Interfacing programmes for these
modes (refer 6.1 of Text).
INT 21H DOS Function calls - for handling Keyboard and Display (refer Appendix-B
of Text).
Von-Neumann & Harvard CPU architecture and CISC & RISC CPU architecture (refer
Reference Book 1). L1, L2, L3
Course Outcomes: At the end of the course students will be able to:
Explain the History of evaluation of Microprocessors, Architecture and instruction
set of 8086, CISC & RISC, Von-Neumann & Harvard CPU Architecture,
Configuration & Timing diagrams of 8086 and Instruction set of 8086.
Write 8086 Assembly level programs using the 8086 instruction set
Write modular programs using procedures.
Write 8086 Stack and Interrupts programming.
Interface 8086 to Static memory chips and 8255, 8254, 0808 ADC, 0800 DAC,
Keyboard, Display and Stepper motors.
Use INT 21 DOS interrupt function calls to handle Keyboard and Display.
Text Book:
Advanced Microprocessors and Peripherals - A.K. Ray and K.M.
Bhurchandi, TMH, 3rd Edition, 2012, ISBN 978-1-25-900613-5.
Reference Books:
1. Microprocessor and Interfacing- Douglas V Hall, SSSP Rao, 3rd edition
TMH, 2012.
2. Microcomputer systems-The 8086 / 8088 Family – Y.C. Liu and A.
Gibson, 2nd edition, PHI -2003.
3. The 8086 Microprocessor: Programming & Interfacing the PC –
Kenneth J Ayala, CENGAGE Learning, 2011.
4. The Intel Microprocessor, Architecture, Programming and
Interfacing - Barry B. Brey, 6e, Pearson Education / PHI, 2003.
40
MICROPROCESSOR LAB
SEMESTER – IV (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Laboratory Code 17ECL47 CIE Marks 40
Number of Lecture 01Hr Tutorial (Instructions) SEE Marks 60
Hours/Week + 02 Hours Laboratory
RBT Level L1, L2, L3 Exam Hours 03
CREDITS – 02
Course objectives: This course will enable students to:
Get familiarize with 8086 instructions and DOS 21H interrupts and function calls.
Develop and test assembly language programs to use instructions of 8086.
Get familiarize with interfacing of various peripheral devices with 8086
microprocessor for simple applications.
Laboratory Experiments:
1. Programs involving:
2. Programs involving:
41
5. Programs involving
String manipulation like string transfer, string reversing, searching for a string.
6. Programs involving
Programs to use DOS interrupt INT 21h Function calls for Reading a Character from
keyboard, Buffered Keyboard input, Display of character/ String on console.
7. Interfacing Experiments:
Experiments on interfacing 8086 with the following interfacing modules through DIO
(Digital Input/Output - PCI bus compatible card / 8086 Trainer )
1. Matrix keyboard interfacing
2. Seven segment display interface
3. Logical controller interface
4. Stepper motor interface
5. ADC and DAC Interface (8 bit)
6. Light dependent resistor (LDR), Relay and Buzzer Interface to make light operated
switches
Course Outcomes: On the completion of this laboratory course, the students will be able
to:
Write and execute 8086 assembly level programs to perform data transfer, arithmetic
and logical operations.
Understand assembler directives, branch, loop operations and DOS 21H Interrupts.
Write and execute 8086 assembly level programs to sort and search elements in a
given array.
Perform string transfer, string reversing, searching a character in a string with string
manipulation instructions of 8086.
Utilize procedures and macros in programming 8086.
Demonstrate the interfacing of 8086 with 7 segment display, matrix keyboard, logical
controller, stepper motor, ADC, DAC, and LDR for simple applications.
Conduct of Practical Examination:
All laboratory experiments are to be included for practical examination.
For examination, one question from software and one question from hardware
interfacing to be set.
Students are allowed to pick one experiment from the lot.
Change of experiment is allowed only once and Marks allotted to the procedure
part to be made zero.
42
LINEAR ICS AND COMMUNICATION LAB
SEMESTER – IV (EC/TC)
[As per Choice Based Credit System (CBCS) Scheme]
Laboratory Code 17ECL48 CIE Marks 40
Number of Lecture 01Hr Tutorial (Instructions) SEE Marks 60
Hours/Week + 02 Hours Laboratory
43
Course Outcomes: This laboratory course enables students to:
Illustrate the pulse and flat top sampling techniques using basic circuits.
Demonstrate addition and integration using linear ICs, and 555 timer operations to
generate signals/pulses.
Demonstrate AM and FM operations and frequency synthesis.
Design and illustrate the operation of instrumentation amplifier, LPF, HPF, DAC and
oscillators using linear IC.
44
B.E.: Electronics & Communication Engineering
V SEMESTER
Teaching Teaching Hours Credits
Department Examination
/Week
Sl.
Course Code Title
No Practical/ Duration in CIE Total
Theory SEE Marks
Drawing hours Marks Marks
1 17ES51 Management and Entrepreneurship Development EC 04 03 60 40 100 4
2 17EC52 Digital Signal Processing EC 04 03 60 40 100 4
3 17EC53 Verilog HDL EC 04 03 60 40 100 4
4 17EC54 Information Theory & Coding EC 04 03 60 40 100 4
5 17EC55X Professional Elective-1 EC 03 03 60 40 100 3
6 17EC56X Open Elective-1 EC 03 03 60 40 100 3
01-Hour Instruction
7 17ECL57 DSP Lab EC 03 60 40 100 2
02-Hour Practical
01-Hour Instruction
8 17ECL58 HDL Lab EC 03 60 40 100 2
02-Hour Practical
Theory: 22hours
TOTAL 24 480 320 800 26
Practical: 06 hours
Professional Elective-1 Open Elective – 1*** (List offered by EC/TC Board only)
17EC551 Nanoelectronics 17EC561 Automotive Electronics
17EC552 Switching & Finite Automata Theory 17EC562 Object Oriented Programming Using C++
17EC553 Operating System 17EC563 8051 Microcontroller
17EC554 Electrical Engineering Materials
17EC555 MSP430 Microcontroller
***Students can select any one of the open electives offered by any Department (Please refer to consolidated list of VTU for open electives).
Selection of an open elective is not allowed, if:
· The candidate has no pre – requisite knowledge.
· The candidate has studied similar content course during previous semesters.
· The syllabus content of the selected open elective is similar to that of Departmental core course(s) or to be studied Professional elective(s).
Registration to open electives shall be documented under the guidance of Programme Coordinator and Adviser.
5
B.E.: Electronics & Communication Engineering
VI SEMESTER
Teaching Teaching Hours Credits
Examination
Sl. Course Department /Week
Title
No Code
Practical/ Duration SEE CIE Total
Theory
Drawing in hours Marks Marks Marks
1 17EC61 Digital Communication EC 04 03 60 40 100 4
2 17EC62 ARM Microcontroller & Embedded Systems EC 04 03 60 40 100 4
3 17EC63 VLSI Design EC 04 03 60 40 100 4
4 17EC64 Computer Communication Networks EC 04 03 60 40 100 4
5 17EC65X Professional Elective-2 EC 03 03 60 40 100 3
6 17EC66X Open Elective-2 EC 03 03 60 40 100 3
01-Hour Instruction 2
7 17ECL67 Embedded Controller Lab EC 03 60 40 100
02-Hour Practical
01-Hour Instruction 2
8 17ECL68 Computer Networks Lab EC 03 60 40 100
02-Hour Practical
Theory: 22hours
TOTAL 24 480 320 800 26
Practical: 06 hours
Professional Elective-2 Open Elective – 2*** (List offered by EC/TC Board only)
17EC651 Cellular Mobile Communication 17EC661 Data Structures Using C++
17EC652 Adaptive Signal Processing 17EC662 Power Electronics (not for E&C students)
17EC653 Artificial Neural Networks 17EC663 Digital System Design using Verilog
17EC654 Digital Switching Systems
17EC655 Microelectronics
***Students can select any one of the open electives offered by any Department (Please refer to consolidated list of VTU for open electives).
Selection of an open elective is not allowed, if:
· The candidate has no pre – requisite knowledge.
· The candidate has studied similar content course during previous semesters.
· The syllabus content of the selected open elective is similar to that of Departmental core course(s) or to be studied Professional elective(s).
Registration to open electives shall be documented under the guidance of Programme Coordinator and Adviser.
6
B.E E&C FIFTH SEMESTER SYLLABUS
Module-1
46
DIGITAL SIGNAL PROCESSING
B.E., V Semester, Electronics & Communication Engineering /
Telecommunication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC52 CIE Marks 40
Number of Lecture 04 SEE Marks 60
Hours/Week
Total Number of 50 (10 Hours / Module) Exam Hours 03
Lecture Hours
CREDITS – 04
Course objectives: This course will enable students to
Understand the frequency domain sampling and reconstruction of discrete time
signals.
Study the properties and the development of efficient algorithms for the computation
of DFT.
Realization of FIR and IIR filters in different structural forms.
Learn the procedures to design of IIR filters from the analog filters using impulse
invariance and bilinear transformation.
Study the different windows used in the design of FIR filters and
design appropriate filters based on the specifications.
Module-1
Discrete Fourier Transforms (DFT): Frequency domain sampling and reconstruction of
discrete time signals. DFT as a linear transformation, its relationship with other
transforms. Properties of DFT, multiplication of two DFTs- the circular convolution.
L1, L2
Module-2
Additional DFT properties, use of DFT in linear filtering, overlap-save and overlap-add
method. Fast-Fourier-Transform (FFT) algorithms: Direct computation of DFT, need for
efficient computation of the DFT (FFT algorithms). L1, L2, L3
Module-3
Radix-2 FFT algorithm for the computation of DFT and IDFT–decimation-in-time and
decimation-in-frequency algorithms. Goertzel algorithm, and chirp-z transform. L1, L2, L3
Module-4
Structure for IIR Systems: Direct form, Cascade form, Parallel form structures.
IIR filter design: Characteristics of commonly used analog filter – Butterworth and
Chebyshev filters, analog to analog frequency transformations.
Design of IIR Filters from analog filter using Butterworth filter: Impulse invariance,
Bilinear transformation. L1, L2, L3
Module-5
Structure for FIR Systems: Direct form, Linear Phase, Frequency sampling structure,
Lattice structure.
FIR filter design: Introduction to FIR filters, design of FIR filters using - Rectangular,
Hamming, Hanning and Bartlett windows. L1, L2, L3
Course Outcomes: After studying this course, students will be able to:
Determine response of LTI systems using time domain and DFT techniques.
Compute DFT of real and complex discrete time signals.
Computation of DFT using FFT algorithms and linear filtering approach.
Solve problems on digital filter design and realize using digital computations.
47
Text Book:
Digital signal processing – Principles Algorithms & Applications, Proakis &
Monalakis, Pearson education, 4th Edition, New Delhi, 2007.
Reference Books:
1. Discrete Time Signal Processing, Oppenheim & Schaffer, PHI, 2003.
2. Digital Signal Processing, S. K. Mitra, Tata Mc-Graw Hill, 3rd Edition, 2010.
3. Digital Signal Processing, Lee Tan: Elsevier publications, 2007.
48
VERILOG HDL
B.E., V Semester, Electronics & Communication Engineering/
Telecommunication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC53 CIE Marks 40
Number of 04 SEE Marks 60
Lecture
Hours/Week
Total Number of 50 (10 Hours / Module) Exam Hours 03
Lecture Hours
CREDITS – 04
Course objectives: This course will enable students to:
Differentiate between Verilog and VHDL descriptions.
Learn different Verilog HDL and VHDL constructs.
Familiarize the different levels of abstraction in Verilog.
Understand Verilog Tasks and Directives.
Understand timing and delay Simulation.
Learn VHDL at design levels of data flow, behavioral and structural for effective
modeling of digital circuits.
Module-1
Overview of Digital Design with Verilog HDL
Evolution of CAD, emergence of HDLs, typical HDL-flow, why Verilog HDL?, trends in
HDLs. (Text1)
Hierarchical Modeling Concepts
Top-down and bottom-up design methodology, differences between modules and
module instances, parts of a simulation, design block, stimulus block. (Text1)
L1, L2, L3
Module-2
Basic Concepts
Lexical conventions, data types, system tasks, compiler directives. (Text1)
Modules and Ports
Module definition, port declaration, connecting ports, hierarchical name referencing.
(Text1) L1, L2, L3
Module-3
Gate-Level Modeling
Modeling using basic Verilog gate primitives, description of and/or and buf/not type
gates, rise, fall and turn-off delays, min, max, and typical delays. (Text1)
Dataflow Modeling
Continuous assignments, delay specification, expressions, operators, operands,
operator types. (Text1) L1, L2, L3
Module-4
Behavioral Modeling
Structured procedures, initial and always, blocking and non-blocking statements,
delay control, generate statement, event control, conditional statements, Multiway
branching, loops, sequential and parallel blocks. (Text1) L1, L2, L3
Module-5
Introduction to VHDL
Introduction: Why use VHDL?, Shortcomings, Using VHDL for Design Synthesis,
49
Design tool flow, Font conventions.
Entities and Architectures: Introduction, A simple design, Design entities,
Identifiers, Data objects, Data types, and Attributes. (Text 2) L1, L2, L3
Course Outcomes: At the end of this course, students should be able to
Write Verilog programs in gate, dataflow (RTL), behavioral and switch modeling
levels of Abstraction.
Write simple programs in VHDL in different styles.
Design and verify the functionality of digital circuit/system using test benches.
Identify the suitable Abstraction level for a particular digital design.
Write the programs more effectively using Verilog tasks and directives.
Perform timing and delay Simulation.
Text Books:
1. Samir Palnitkar, ―Verilog HDL: A Guide to Digital Design and Synthesis”,
Pearson Education, Second Edition.
2. Kevin Skahill, ―VHDL for Programmable Logic‖, PHI/Pearson education, 2006.
Reference Books:
1. Donald E. Thomas, Philip R. Moorby, ―The Verilog Hardware Description
Language‖, Springer Science+Business Media, LLC, Fifth edition.
2. Michael D. Ciletti, ―Advanced Digital Design with the Verilog HDL‖ Pearson
(Prentice Hall), Second edition.
3. Padmanabhan, Tripura Sundari, ―Design through Verilog HDL‖, Wiley, 2016 or
earlier.
50
OPERATING SYSTEM
B.E., V Semester, Electronics & Communication Engineering /
Telecommunication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC553 CIE Marks 40
Number of 03 SEE Marks 60
Lecture
Hours/Week
Total Number of 40 (8 Hours / Module) Exam Hours 03
Lecture Hours
CREDITS – 03
Course objectives: This course will enable students to:
Module-1
Introduction to Operating Systems
OS, Goals of an OS, Operation of an OS, Computational Structures, Resource
allocation techniques, Efficiency, System Performance and User Convenience, Classes
operating System, Batch processing, Multi programming, Time Sharing Systems, Real
Time and distributed Operating Systems (Topics from Sections 1.2, 1.3, 2.2 to 2.8 of
Text). L1, L2
Module-2
Process Management: OS View of Processes, PCB, Fundamental State Transitions,
Threads, Kernel and User level Threads, Non-preemptive scheduling- FCFS and SRN,
Preemptive Scheduling- RR and LCN, Long term, medium term and short term
scheduling in a time sharing system (Topics from Sections 3.3, 3.3.1 to 3.3.4, 3.4,
3.4.1, 3.4.2 , 4.2, 4.3, 4.4.1 of Text). L1, L2
Module-3
Memory Management: Contiguous Memory allocation, Non-Contiguos Memory
Allocation, Paging, Segmentation, Segmentation with paging, Virtual Memory
Management, Demand Paging, Paging Hardware, VM handler, FIFO, LRU page
replacement policies (Topics from Sections 5.5 to 5.9, 6.1 to 6.3, except Optimal policy
and 6.3.1of Text). L1, L2
Module-4
File Systems: File systems and IOCS, File Operations, File Organizations, Directory
structures, File Protection, Interface between File system and IOCS, Allocation of disk
space, Implementing file access (Topics from Sections 7.1 to 7.8 of Text). L1, L2, L3
Module-5
Message Passing and Deadlocks: Overview of Message Passing, Implementing
message passing, Mailboxes, Deadlocks, Deadlocks in resource allocation, Resource
state modelling, Deadlock detection algorithm, Deadlock Prevention (Topics from
Sections 10.1 to 10.3, 11.1 to 11.5 of Text). L1, L2, L3
57
Course outcomes: After studying this course, students will be able to:
Explain the goals, structure, operation and types of operating systems.
Apply scheduling techniques to find performance factors.
Explain organization of file systems and IOCS.
Apply suitable techniques for contiguous and non-contiguous memory allocation.
Describe message passing, deadlock detection and prevention methods.
Text Book:
Operating Systems – A concept based approach, by Dhamdare, TMH, 2nd edition.
Reference Books:
1. Operating systems concepts, Silberschatz and Galvin, John Wiley India Pvt. Ltd,
5th edition,2001.
2. Operating system–internals and design system, William Stalling, Pearson
Education, 4th ed, 2006.
3. Design of operating systems, Tannanbhaum, TMH, 2001.
58
MSP430 MICROCONTROLLER
B.E., V Semester, Electronics & Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Module-1
MSP430 Architecture: Introduction –Where does the MSP430 fit, The outside view, The
inside view-Functional block diagram, Memory, Central Processing Unit, Memory
Mapped Input and Output, Clock Generator, Exceptions: Interrupts and Resets,
MSP430 family.
(Text: Ch1- 1.3 to 1.7, Ch2- 2.1 to 2.7, Ch5- 5.1, 5.7 up to 5.7.1) L1, L2
Module-2
Addressing Modes & Instruction Set-Addressing Modes, Instruction set, Constant
Generator and Emulated Instructions, Program Examples.
(Text: Ch5- 5.2 to 5.5) L1, L2, L3
Module-3
Clock System, Interrupts and Operating Modes-Clock System, Interrupts, What
happens when an interrupted is requested, Interrupt Service Routines, Low Power
Modes of Operation, Watchdog Timer, Basic Timer1, Real Time Clock, Timer-A: Timer
Block, Capture/Compare Channels, Interrupts from Timer-A.
(Text: Ch5 - 5.8 upto 5.8.4, Ch 6-6.6 to 6.8, 6.10, Ch8 -8.1, 8.2, 8.3) L1, L2
Module-4
Analog Input-Output and PWM - Comparator-A, ADC10, ADC12, Sigma-Delta ADC,
Internal Operational Amplifiers, DAC, Edge Aligned PWM, Simple PWM, Design of PWM.
LCD interfacing.
(Text: Ch9 – 9.1 up to 9.1.2, 9.4, 9.5 up to 9.5.1, 9.7, 9.8 up to 9.8.1, 9.11.5, 9.12
(without 9.12.1), 8.6.2 to 8.6.4) L1, L2
Module-5
62
Digital Input-Output and Serial Communication:
Parallel Ports, Lighting LEDs, Flashing LEDs, Read Input from a Switch, Toggle the LED
state by pressing the push button, LCD interfacing.
Asynchronous Serial Communication, Asynchronous Communication with USCI_A,
Communications, Peripherals in MSP430, Serial Peripheral Interface.
(Text: Selected topics from Ch4 & Ch7 and Ch7- 7.1, Ch10 – 10.1, 10.2, and 10.12)
L1, L2, L3
Course outcomes: After studying this course, students will be able to:
63
DSP LAB
B.E., V Semester, ELECTRONICS & COMMUNICATION ENGINEERING /
TELECOMMUNICATION ENGINEERING
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17ECL57 CIE Marks 40
Number of Lecture 01Hr Tutorial (Instructions) SEE Marks 60
Hours/Week + 02 Hours Laboratory=03
64
OPCODE ALU Operation
1. A+B
2. A-B
3. A Complement
4. A*B
5. A AND B
6. A OR B
7. A NAND B
8. A XOR B
5. Develop the Verilog code for the following flip-flops, SR, D, JK and T.
6. Design a 4 bit binary, BCD counters (Synchronous reset and Asynchronous
reset) and ―any sequence‖ counters, using Verilog code.
Part–B: INTERFACING (at least four of the following must be covered using
VHDL/Verilog)
Course Outcomes: At the end of this course, students should be able to:
Write the Verilog/VHDL programs to simulate Combinational circuits in
Dataflow, Behavioral and Gate level Abstractions.
Describe sequential circuits like flip flops and counters in Behavioral description
and obtain simulation waveforms.
Synthesize Combinational and Sequential circuits on programmable ICs and test
the hardware.
Interface the hardware to the programmable chips and obtain the required
output.
67
Digital Engine Control Systems – Digital Engine control features, Control modes for
fuel Control (Seven Modes), EGR Control, Electronic Ignition Control - Closed loop
Ignition timing, Spark Advance Correction Scheme, Integrated Engine Control System -
Secondary Air Management, Evaporative Emissions Canister Purge, Automatic System
Adjustment, System Diagnostics. (Text 1: Chapter 7) (6 hours)
Vehicle Motion Control – Typical Cruise Control System, Digital Cruise Control
System, Digital Speed Sensor, Throttle Actuator, Digital Cruise Control configuration,
Cruise Control Electronics (Digital only), Antilock Brake System (ABS) (Text 1: Chapter
8) (2 hours) L1, L2
Module-5
Automotive Diagnostics–Timing Light, Engine Analyzer, On-board diagnostics, Off-
board diagnostics, Expert Systems, Occupant Protection Systems – Accelerometer based
Air Bag systems. (Text 1: Chapter 10) (2 hours)
Text Books:
1. William B. Ribbens, ―Understanding Automotive Electronics‖, 6th Edition, Elsevier
Publishing.
2. Robert Bosch Gmbh (Ed.) Bosch Automotive Electrics and Automotive Electronics
Systems and Components, Networking and Hybrid Drive, 5th edition, John
Wiley& Sons Inc., 2007.
69
8051 MICROCONTROLLER
B.E., V Semester (Open Elective)
[As per Choice Based Credit System (CBCS) Scheme]
Module -1
8051 Microcontroller:
Microprocessor Vs Microcontroller, Embedded Systems, Embedded
Microcontrollers, 8051 Architecture- Registers, Pin diagram, I/O ports
functions, Internal Memory organization. External Memory (ROM & RAM)
interfacing. L1, L2
Module -2
8051 Instruction Set: Addressing Modes, Data Transfer instructions,
Arithmetic instructions, Logical instructions, Branch instructions, Bit
manipulation instructions. Simple Assembly language program examples
(without loops) to use these instructions. L1, L2
Module -3
8051 Stack, I/O Port Interfacing and Programming: 8051 Stack, Stack and
Subroutine instructions. Assembly language program examples on subroutine
and involving loops - Delay subroutine, Factorial of an 8 bit number (result
maximum 8 bit), Block move without overlap, Addition of N 8 bit numbers,
Picking smallest/largest of N 8 bit numbers.
Interfacing simple switch and LED to I/O ports to switch on/off LED with
respect to switch status. L1, L2, L3
Module -4
8051 Timers and Serial Port: 8051 Timers and Counters – Operation and
Assembly language programming to generate a pulse using Mode-1 and a
square wave using Mode-2 on a port pin.
8051 Serial Communication- Basics of Serial Data Communication, RS-232
standard, 9 pin RS232 signals, Simple Serial Port programming in Assembly
and C to transmit a message and to receive data serially. L1, L2, L3
Module -5
8051 Interrupts and Interfacing Applications: 8051 Interrupts. 8051
Assembly language programming to generate an external interrupt using a
72
switch, 8051 C programming to generate a square waveform on a port pin
using a Timer interrupt.
Interfacing 8051 to ADC-0804, LCD and Stepper motor and their 8051
Assembly language interfacing programming. L1, L2, L3
Evaluation of CIE Marks:
It is suggested that at least a few simple programs to be executed by students
using a simulation software or an 8051 microcontroller kit for better
understanding of the course. This activity can be considered for the evaluation
of 10 marks out of 40 CIE (Continuous Internal Evaluation) marks, reserved for
the other activities.
Course outcomes: At the end of the course, students will be able to:
Explain the difference between Microprocessors & Microcontrollers,
Architecture of 8051 Microcontroller, Interfacing of 8051 to external
memory and Instruction set of 8051.
Write 8051 Assembly level programs using 8051 instruction set.
Explain the Interrupt system, operation of Timers/Counters and Serial port
of 8051.
Write 8051 Assembly language program to generate timings and waveforms
using 8051 timers, to send & receive serial data using 8051 serial port and
to generate an external interrupt using a switch.
Write 8051 C programs to generate square wave on 8051 I/O port pin
using interrupt and to send & receive serial data using 8051 serial port.
Interface simple switches, simple LEDs, ADC 0804, LCD and Stepper Motor
to 8051 using 8051 I/O ports.
TEXT BOOKS:
1. “The 8051 Microcontroller and Embedded Systems – using assembly
and C ”, Muhammad Ali Mazidi and Janice Gillespie Mazidi and Rollin
D. McKinlay; PHI, 2006 / Pearson, 2006.
REFERENCE BOOKS:
1. “The 8051 Microcontroller Based Embedded Systems”, Manish K
Patel, McGraw Hill, 2014, ISBN: 978-93-329-0125-4.
2. “Microcontrollers: Architecture, Programming, Interfacing and
System Design”, Raj Kamal, Pearson Education, 2005.
73
B.E E&C SIXTH SEMESTER SYLLABUS
DIGITAL COMMUNICATION
B.E., VI Semester, Electronics & Communication Engineering/
Telecommunication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Module-1
Bandpass Signal to Equivalent Lowpass: Hilbert Transform, Pre-envelopes,
Complex envelopes, Canonical representation of bandpass signals, Complex low pass
representation of bandpass systems, Complex representation of band pass signals
and systems (Text 1: 2.8, 2.9, 2.10, 2.11, 2.12, 2.13).
Line codes: Unipolar, Polar, Bipolar (AMI) and Manchester code and their power
spectral densities (Text 1: Ch 6.10).
Overview of HDB3, B3ZS, B6ZS (Ref. 1: 7.2) L1, L2, L3
Module-2
Signaling over AWGN Channels- Introduction, Geometric representation of signals,
Gram-Schmidt Orthogonalization procedure, Conversion of the continuous AWGN
channel into a vector channel, Optimum receivers using coherent detection: ML
Decoding, Correlation receiver, matched filter receiver (Text 1: 7.1, 7.2, 7.3, 7.4).
L1, L2, L3
Module-3
Digital Modulation Techniques: Phase shift Keying techniques using coherent
detection: generation, detection and error probabilities of BPSK and QPSK, M–ary
PSK, M–ary QAM (Relevant topics in Text 1 of 7.6, 7.7).
Module-4
Communication through Band Limited Channels: Digital Transmission through
Band limited channels: Digital PAM Transmission through Band limited Channels,
Signal design for Band limited Channels: Design of band limited signals for zero ISI–
The Nyquist Criterion (statement only), Design of band limited signals with controlled
ISI-Partial Response signals, Probability of error for detection of Digital PAM:
Probability of error for detection of Digital PAM with Zero ISI, Symbol–by–Symbol
detection of data with controlled ISI (Text 2: 9.1, 9.2, 9.3.1, 9.3.2).
Reference Books:
1. B.P.Lathi and Zhi Ding, ―Modern Digital and Analog communication Systems‖,
Oxford University Press, 4th Edition, 2010, ISBN: 978-0-198-07380-2.
2. Ian A Glover and Peter M Grant, ―Digital Communications‖, Pearson Education,
Third Edition, 2010, ISBN 978-0-273-71830-7.
3. John G Proakis and Masoud Salehi, ―Communication Systems Engineering‖, 2nd
Edition, Pearson Education, ISBN 978-93-325-5513-6.
75
ARM MICROCONTROLLER & EMBEDDED SYSTEMS
B.E., VI Semester, Electronics & Communication Engineering/
Telecommunication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Module-1
ARM-32 bit Microcontroller: Thumb-2 technology and applications of ARM,
Architecture of ARM Cortex M3, Various Units in the architecture, Debugging support,
General Purpose Registers, Special Registers, exceptions, interrupts, stack operation,
reset sequence (Text 1: Ch 1, 2, 3) L1, L2
Module-2
ARM Cortex M3 Instruction Sets and Programming: Assembly basics, Instruction
list and description, Useful instructions, Memory mapping, Bit-band operations and
CMSIS, Assembly and C language Programming (Text 1: Ch-4, Ch-5, Ch-10 (10.1,
10.2, 10.3, 10.5 only) L1, L2, L3
Module-3
Embedded System Components: Embedded Vs General computing system,
Classification of Embedded systems, Major applications and purpose of ES. Core of
an Embedded System including all types of processor/controller, Memory, Sensors,
Actuators, LED, 7 segment LED display, Optocoupler, Relay, Piezo buzzer, Push
button switch, Communication Interface (onboard and external types), Embedded
firmware, Other system components.
(Text 2: All the Topics from Ch-1 and Ch-2, excluding 2.3.3.4 (stepper motor), 2.3.3.8
(keyboard) and 2.3.3.9 (PPI) sections). L1, L2, L3
Module-4
Embedded System Design Concepts: Characteristics and Quality Attributes of
Embedded Systems, Operational and non-operational quality attributes, Embedded
Systems-Application and Domain specific, Hardware Software Co-Design and
Program Modelling (excluding UML), Embedded firmware design and development
(excluding C language).
(Text 2: Ch-3, Ch-4, Ch-7 (Sections 7.1, 7.2 only), Ch-9 (Sections 9.1, 9.2, 9.3.1,
9.3.2 only) L1, L2, L3
76
Module-5
RTOS and IDE for Embedded System Design: Operating System basics, Types of
operating systems, Task, process and threads (Only POSIX Threads with an example
program), Thread preemption, Preemptive Task scheduling techniques, Task
Communication, Task synchronization issues – Racing and Deadlock, Concept of
Binary and counting semaphores (Mutex example without any program), How to
choose an RTOS, Integration and testing of Embedded hardware and firmware,
Embedded system Development Environment – Block diagram (excluding Keil),
Disassembler/decompiler, simulator, emulator and debugging techniques
(Text 2: Ch-10 (Sections 10.1, 10.2, 10.3, 10.5.2 , 10.7, 10.8.1.1, 10.8.1.2, 10.8.2.2,
10.10 only), Ch 12, Ch-13 (a block diagram before 13.1, 13.3, 13.4, 13.5, 13.6 only)
L1, L2, L3
Course outcomes: After studying this course, students will be able to:
Describe the architectural features and instructions of 32 bit microcontroller ARM
Cortex M3.
Apply the knowledge gained for Programming ARM Cortex M3 for different
applications.
Understand the basic hardware components and their selection method based on
the characteristics and attributes of an embedded system.
Develop the hardware /software co-design and firmware design approaches.
Explain the need of real time operating system for embedded system applications.
Text Books:
1. Joseph Yiu, ―The Definitive Guide to the ARM Cortex-M3‖, 2nd Edition, Newnes,
(Elsevier), 2010.
77
VLSI DESIGN
B.E., VI Semester, Electronics & Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC63 CIE Marks 40
Number of Lecture 04 SEE Marks 60
Hours/Week
Total Number of 50 (10 Hours / Module) Exam Hours 03
Lecture Hours
CREDITS – 04
Course Objectives: The objectives of the course is to enable students to:
Impart knowledge of MOS transistor theory and CMOS technologies
Impart knowledge on architectural choices and performance tradeoffs
involved in designing and realizing the circuits in CMOS technology
Cultivate the concepts of subsystem design processes
Demonstrate the concepts of CMOS testing
Module-1
Introduction: A Brief History, MOS Transistors, MOS Transistor Theory, Ideal I-V
Characteristics, Non-ideal I-V Effects, DC Transfer Characteristics
(1.1, 1.3, 2.1, 2.2, 2.4, 2.5 of TEXT2).
Fabrication: nMOS Fabrication, CMOS Fabrication [P-well process, N-well process,
Twin tub process], BiCMOS Technology (1.7, 1.8,1.10 of TEXT1). L1, L2
Module-2
MOS and BiCMOS Circuit Design Processes: MOS Layers, Stick Diagrams, Design
Rules and Layout.
Basic Circuit Concepts: Sheet Resistance, Area Capacitances of Layers, Standard
Unit of Capacitance, Some Area Capacitance Calculations, Delay Unit, Inverter
Delays, Driving Large Capacitive Loads (3.1 to 3.3, 4.1, 4.3 to 4.8 of TEXT1).
L1, L2, L3
Module-3
Scaling of MOS Circuits: Scaling Models & Scaling Factors for Device Parameters
Subsystem Design Processes: Some General considerations, An illustration of
Design Processes, Illustration of the Design Processes- Regularity, Design of an
ALU Subsystem, The Manchester Carry-chain and Adder Enhancement
Techniques(5.1, 5.2, 7.1, 7.2, 8.2, 8.3, 8.4.1, 8.4.2 of TEXT1). L1, L2, L3
Module-4
Subsystem Design: Some Architectural Issues, Switch Logic, Gate(restoring) Logic,
Parity Generators, Multiplexers, The Programmable Logic Array (PLA)
(6.1to 6.3, 6.4.1, 6.4.3, 6.4.6 of TEXT1).
FPGA Based Systems: Introduction, Basic concepts, Digital design and FPGA‘s,
FPGA based System design, FPGA architecture, Physical design for FPGA‘s
(1.1 to 1.4, 3.2, 4.8 of TEXT3). L1, L2, L3
Module-5
Memory, Registers and Aspects of system Timing- System Timing Considerations,
Some commonly used Storage/Memory elements (9.1, 9.2 of TEXT1).
Testing and Verification: Introduction, Logic Verification, Logic Verification
Principles, Manufacturing Test Principles, Design for testability (12.1, 12.1.1, 12.3,
12.5, 12.6 of TEXT 2). L1, L2, L3
78
Course outcomes: At the end of the course, the students will be able to:
Demonstrate understanding of MOS transistor theory, CMOS fabrication flow
and technology scaling.
Draw the basic gates using the stick and layout diagrams with the knowledge of
physical design aspects.
Interpret Memory elements along with timing considerations
Demonstrate knowledge of FPGA based system design
Interpret testing and testability issues in VLSI Design
Analyze CMOS subsystems and architectural issues with the design
constraints.
Text Books:
1. “Basic VLSI Design”- Douglas A. Pucknell& Kamran Eshraghian, PHI 3rd
Edition (original Edition – 1994).
2. “CMOS VLSI Design- A Circuits and Systems Perspective”- Neil H.E. Weste,
David Harris, Ayan Banerjee, 3rd Edition, Pearson Education.
3. “FPGA Based System Design”- Wayne Wolf, Pearson Education, 2004,
Technology and Engineering.
79
COMPUTER COMMUNICATION NETWORKS
B.E., VI Semester, Electronics & Communication Engineering /
Telecommunication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC64 CIE Marks 40
Number of Lecture 04 SEE Marks 60
Hours/Week
Total Number of 50 (10 Hours / Module) Exam Hours 03
Lecture Hours
CREDITS – 04
Course Objectives: This course will enable students to:
Understand the layering architecture of OSI reference model and TCP/IP protocol
suite.
Understand the protocols associated with each layer.
Learn the different networking architectures and their representations.
Learn the various routing techniques and the transport layer services.
Module-1
Introduction: Data Communications: Components, Representations, Data Flow,
Networks: Physical Structures, Network Types: LAN, WAN, Switching, Internet.
Network Models: Protocol Layering: Scenarios, Principles, Logical Connections,
TCP/IP Protocol Suite: Layered Architecture, Layers in TCP/IP suite, Description of
layers, Encapsulation and Decapsulation, Addressing, Multiplexing and
Demultiplexing, The OSI Model: OSI Versus TCP/IP.
Data-Link Layer: Introduction: Nodes and Links, Services, Categories‘ of link,
Sublayers, Link Layer addressing: Types of addresses, ARP. Data Link Control (DLC)
services: Framing, Flow and Error Control, Data Link Layer Protocols: Simple Protocol,
Stop and Wait protocol, Piggybacking. L1, L2
Module-2
Media Access Control: Random Access: ALOHA, CSMA, CSMA/CD, CSMA/CA.
Controlled Access: Reservation, Polling, Token Passing.
Wired LANs: Ethernet: Ethernet Protocol: IEEE802, Ethernet Evolution, Standard
Ethernet: Characteristics, Addressing, Access Method, Efficiency, Implementation,
Fast Ethernet: Access Method, Physical Layer, Gigabit Ethernet: MAC Sublayer,
Physical Layer, 10 Gigabit Ethernet. L1, L2
Module-3
Wireless LANs: Introduction: Architectural Comparison, Characteristics, IEEE 802.11:
Architecture, MAC Sublayer, Addressing Mechanism, Physical Layer, Bluetooth:
Architecture, Layers.
Connecting Devices: Hubs, Switches, Virtual LANs: Membership, Configuration,
Communication between Switches and Routers, Advantages.
Network Layer: Introduction, Network Layer services: Packetizing, Routing and
Forwarding, Other services, Packet Switching: Datagram Approach, Virtual Circuit
Approach, IPV4 Addresses: Address Space, Classful Addressing, Classless Addressing,
DHCP, Network Address Resolution, Forwarding of IP Packets: Based on destination
Address and Label. L1, L2
Module-4
Network Layer Protocols: Internet Protocol (IP): Datagram Format, Fragmentation,
80
Options, Security of IPv4 Datagrams, ICMPv4: Messages, Debugging Tools, Mobile IP:
Addressing, Agents, Three Phases, Inefficiency in Mobile IP.
Unicast Routing: Introduction, Routing Algorithms: Distance Vector Routing, Link
State Routing, Path vector routing, Unicast Routing Protocol: Internet Structure,
Routing Information Protocol, Open Shortest Path First, Border Gateway Protocol
Version 4. L1, L2, L3
Module-5
Transport Layer: Introduction: Transport Layer Services, Connectionless and
Connection oriented Protocols, Transport Layer Protocols: Simple protocol, Stop and
wait protocol, Go-Back-N Protocol, Selective repeat protocol, User Datagram Protocol:
User Datagram, UDP Services, UDP Applications, Transmission Control Protocol: TCP
Services, TCP Features, Segment, Connection, State Transition diagram, Windows in
TCP, Flow control, Error control, TCP congestion control. L1, L2
Course Outcomes: At the end of the course, the students will be able to:
Identify the protocols and services of Data link layer.
Identify the protocols and functions associated with the transport layer services.
Describe the layering architecture of computer networks and distinguish
between the OSI reference model and TCP/IP protocol suite.
Distinguish the basic network configurations and standards associated with
each network.
Construct a network model and determine the routing of packets using different
routing algorithms.
Text Book:
Data Communications and Networking , Forouzan, 5th Edition, McGraw Hill, 2016
ISBN: 1-25-906475-3
Reference Books:
1. Computer Networks, James J Kurose, Keith W Ross, Pearson Education,
2013, ISBN: 0-273-76896-4
2. Introduction to Data Communication and Networking, Wayarles Tomasi,
Pearson Education, 2007, ISBN:0130138282
81
MICROELECTRONICS
B.E., VI Semester, Electronics & Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC655 CIE Marks 40
Number of Lecture 03 SEE Marks 60
Hours/Week
Total Number of Lecture 40 (8 Hours / Module) Exam Hours 03
Hours
CREDITS – 03
Course Objectives: This course will enable students to:
Be familiar with the MOSFET physical structure and operation, terminal
characteristics, circuit models and basic circuit applications.
Confront integrated device and/or circuit design problems, identify the design
issues, and develop solutions.
Analyze and design microelectronic circuits for linear amplifier and digital
applications.
Contrast the input/output and gain characteristics of single-transistor,
differential and common two-transistor linear amplifier building block stages.
Module-1
MOSFETS: Device Structure and Physical Operation, V-I Characteristics, MOSFET
Circuits at DC, MOSFET as an amplifier and as a switch. L1, L2
Module-2
MOSFETS (continued): Biasing in MOS amplifier Circuits, Small Signal Operation
and Models, Basic MOSFET amplifier, MOSFET internal capacitances, frequency
response of CS amplifier. L1, L2
Module-3
MOSFETS (continued): Discrete circuit MOS amplifiers.
Single Stage IC Amplifier: Comparison of MOSFET and BJT, Current sources,
Current mirrors and Current steering circuits, high frequency response- general
considerations.
L1, L2, L3
Module-4
Single Stage IC Amplifier (continued): CS with active loads, high frequency response
of CS, CG amplifiers with active loads, high frequency response of CG, Cascode
amplifiers. CS with source degeneration (only MOS amplifiers to be dealt). L1, L2
Module-5
Differential and Multistage Amplifiers: The MOS differential pair, small signal
operation of MOS differential pair, Differential amplifier with active loads, and
frequency response of the differential amplifiers. Multistage amplifiers (only MOS
amplifiers to be dealt). L1, L2
Course outcomes: After studying this course, students will be able to:
Explain the underlying physics and principles of operation of Metaloxide-
semiconductor (MOS) capacitors and MOS field effect transistors (MOSFETs).
Describe and apply simple large signal circuit models for MOSFETs.
Analyze and design microelectronic circuits for linear amplifier for digital
applications.
Use of discrete MOS circuits to design Single stage and Multistage amplifiers to
90
meet stated operating specifications.
Text Book:
“Microelectronic Circuits”, Adel Sedra and K.C. Smith, 6th Edition, Oxford
University Press, International Version, 2009.
Reference Books:
1. “Microelectronics An integrated approach”, Roger T Howe, Charles G
Sodini, Pearson education.
2. “Fundamentals of Microelectronics”, Behzad Razavi, John Wiley India
Pvt. Ltd, 2008.
3. “Microelectronics – Analysis and Design”, Sundaram Natarajan, Tata McGraw-
Hill, 2007.
91
EMBEDDED CONTROLLER LAB
B.E., VI Semester, Electronics & Communication Engineering/
Telecommunication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17ECL67 CIE Marks 40
Number of Lecture 01Hr Tutorial (Instructions) SEE Marks 60
Hours/Week + 02 Hours Laboratory = 03
CREDITS – 02
Course objectives: This course will enable students to:
Understand the instruction set of ARM Cortex M3, a 32 bit microcontroller and the
software tool required for programming in Assembly and C language.
Program ARM Cortex M3 using the various instructions in assembly level language
for different applications.
Interface external devices and I/O with ARM Cortex M3.
Develop C language programs and library functions for embedded system
applications.
Laboratory Experiments
PART-A: Conduct the following Study experiments to learn ALP using ARM
Cortex M3 Registers using an Evaluation board and the required software tool.
92
4. Interface a DAC and generate Triangular and Square waveforms.
5. Interface a 4x4 keyboard and display the key code on an LCD.
6. Using the Internal PWM module of ARM controller generate PWM and vary its
duty cycle.
7. Demonstrate the use of an external interrupt to toggle an LED On/Off.
8. Display the Hex digits 0 to F on a 7-segment LED interface, with an
appropriate delay in between.
9. Interface a simple Switch and display its status through Relay, Buzzer and
LED.
10. Measure Ambient temperature using a sensor and SPI ADC IC.
Course outcomes: After studying this course, students will be able to:
Understand the instruction set of 32 bit microcontroller ARM Cortex M3, and the
software tool required for programming in Assembly and C language.
Develop assembly language programs using ARM Cortex M3 for different
applications.
Interface external devices and I/O with ARM Cortex M3.
Develop C language programs and library functions for embedded system
applications.
Conduction of Practical Examination:
1. PART-B experiments using Embedded-C are only to be considered for the practical
examination. PART-A ALP programs are for study purpose and can be considered
for Internal Marks evaluation.
2. Strictly follow the instructions as printed on the cover page of answer script for
breakup of marks.
3. Change of experiment is allowed only once and Marks allotted to the procedure
part to be made zero.
93
COMPUTER NETWORKS LAB
B.E., VI Semester, Electronics & Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17ECL68 CIE Marks 40
Number of Lecture 01Hr Tutorial (Instructions) SEE Marks 60
Hours/Week + 02 Hours Laboratory = 03
CREDITS – 02
Course objectives: This course will enable students to:
Choose suitable tools to model a network and understand the protocols at various
OSI reference levels.
Design a suitable network and simulate using a Network simulator tool.
Simulate the networking concepts and protocols using C/C++ programming.
Model the networks for different configurations and analyze the results.
Laboratory Experiments
PART-A: Simulation experiments using NS2/ NS3/ OPNET/ NCTUNS/ NetSim/
QualNet or any other equivalent tool
1. Implement a point to point network with four nodes and duplex links between them.
Analyze the network performance by setting the queue size and varying the
bandwidth.
2. Implement a four node point to point network with links n0-n2, n1-n2 and n2-n3.
Apply TCP agent between n0-n3 and UDP between n1-n3. Apply relevant
applications over TCP and UDP agents changing the parameter and determine the
number of packets sent by TCP/UDP.
3. Implement Ethernet LAN using n (6-10) nodes. Compare the throughput by
changing the error rate and data rate.
4. Implement Ethernet LAN using n nodes and assign multiple traffic to the nodes and
obtain congestion window for different sources/ destinations.
5. Implement ESS with transmission nodes in Wireless LAN and obtain the
performance parameters.
6. Implementation of Link state routing algorithm.
94
3. Implement Dijkstra‘s algorithm to compute the shortest routing path.
4. For the given data, use CRC-CCITT polynomial to obtain CRC code. Verify the
program for the cases
a. Without error
b. With error
5. Implementation of Stop and Wait Protocol and Sliding Window Protocol
6. Write a program for congestion control using leaky bucket algorithm.
Course outcomes: On the completion of this laboratory course, the students will be
able to:
Use the network simulator for learning and practice of networking algorithms.
Illustrate the operations of network protocols and algorithms using C
programming.
Simulate the network with different configurations to measure the performance
parameters.
Implement the data link and routing protocols using C programming.
95
6th Semester Open Electives Syllabus for the Courses Offered by EC/TC
Board:
DATA STRUCTURE USING C++
B.E VI Semester (Open Elective)
[As per Choice Based Credit System (CBCS) Scheme]
Module -3
QUEUES: The abstract data types, Array Representation, Linked Representation,
Applications-Railroad car arrangement.
Module -5
Priority Queues: Linear lists, Heaps, Applications-Heap Sorting.
Search Trees: Binary search trees operations and implementation, Binary Search
trees with duplicates. L1, L2, L3
96
Course outcomes: After studying this course, students will be able to:
Acquire knowledge of Dynamic memory allocation, Various types of data
structures, operations and algorithms and Sparse matrices and Hashing
Understand non Linear data structures trees and their applications
Design appropriate data structures for solving computing problems
Analyze the operations of Linear Data structures: Stack, Queue and Linked List
and their applications
Text Book:
Data structures, Algorithms, and applications in C++, Sartaj Sahni, Universities
Press, 2nd Edition, 2005.
Reference Books:
1. Data structures, Algorithms, and applications in C++, Sartaj Sahni, Mc. Graw
Hill, 2000.
2. Object Oriented Programming with C++, E.Balaguruswamy, TMH, 6th Edition,
2013.
3. Programming in C++, E.Balaguruswamy. TMH, 4th, 2010.
97
POWER ELECTRONICS
B.E., VI Semester (Open Elective, not for E&C students)
[As per Choice Based Credit System (CBCS) Scheme]
98
Course outcomes: After studying this course, students will be able to:
Describe the characteristics of different power devices and identify the
applications.
Illustrate the working of DC-DC converter and inverter circuit.
Determine the output response of a thyristor circuit with various triggering
options.
Determine the response of controlled rectifier with resistive and inductive loads.
99
DIGITAL SYSTEM DESIGN USING VERILOG
B.E., VI Semester (Open Elective)
[As per Choice Based Credit System (CBCS) Scheme]
Course Code: 17EC663 CIE Marks: 40
Number of Lecture Hours/Week: 03 SEE Marks: 60
Total Number of Lecture Hours: 40 (08 Hrs per module) Exam Hours: 03
CREDITS – 03
Course Objectives: This course will enable students to
Understand the concepts of Verilog Language.
Design the digital systems as an activity in a larger systems design context.
Study the design and operation of semiconductor memories frequently
used in application specific digital system.
Inspect how effectively IC‘s are embedded in package and assembled in
PCB‘s for different application.
Design and diagnosis of processors and I/O controllers used in embedded systems.
Module -1
Introduction and Methodology:
Digital Systems and Embedded Systems, Real-World Circuits, Models, Design
Methodology (1.1, 1.3 to 1.5 of Text).
Combinational Basics: Combinational Components and Circuits, Verification of
Combinational Circuits.(2.3 and 2.4 of Text)
Sequential Basics: Sequential Datapaths and Control Clocked Synchronous Timing
Methodology (4.3 up to 4.3.1,4.4 up to 4.4.1 of Text). L1, L2, L3
Module -2
Memories: Concepts, Memory Types, Error Detection and Correction (Chap 5 of Text).
L1, L2, L3
Module -3
Implementation Fabrics: Integrated Circuits, Programmable Logic Devices, Packaging
and Circuit boards, Interconnection and Signal integrity (Chap 6 of Text). L1, L2, L3
Module -4
I/O interfacing: I/O devices, I/O controllers, Parallel Buses, Serial Transmission, I/O
software (Chap 8 of Text). L1, L2, L3
Module -5
Design Methodology: Design flow, Design optimization, Design for test, Nontechnical
Issues (Chap 10 of Text). L1, L2, L3, L4
Course outcomes: After studying this course, students will be able to:
Construct the combinational circuits, using discrete gates and programmable logic
devices.
Describe Verilog model for sequential circuits and test pattern generation.
Design a semiconductor memory for specific chip design.
Design embedded systems using small microcontrollers, larger CPUs/DSPs, or
hard or soft processor cores.
Synthesize different types of processor and I/O controllers that are used in
embedded system.
100
Text Book:
Peter J. Ashenden, ―Digital Design: An Embedded Systems Approach Using VERILOG‖,
Elesvier, 2010.
101
62
Course outcomes:
At the end of the course the student will be able to:
Discuss history of PLC, its sequence of operation, advantages and disadvantages, main parts and their
functions.
Describe the hardware components of PLC: I/O modules, CPU, memory devices, other support devices,
operating modes and PLC programming.
Describe field devices Relays, Contactors, Motor Starters, Switches, Sensors, Output Control Devices,
Seal-In Circuits, and Latching Relays commonly used with I/O module.
Convert relay schematics and narrative descriptions into PLC ladder logic programs
Analyze PLC timer and counter ladder logic programs
Describe the operation of different program control instructions
Discuss the execution of data transfer instructions, data compare instructions and the basic operation of
PLC closed-loop control system.
Describe the operation of mechanical sequencers, bit and word shift registers, processes and structure of
control systems and communication between the processes.
61
B.E.: Electronics & Communication Engineering
VII SEMESTER
Teaching Teaching Hours Credits
Department /Week Examination
Sl. Course Code Title
No Practical/ Duration SEE CIE Total
Theory
Drawing in hours Marks Marks Marks
1 17EC71 EC 04 03 60 40 100 4
Microwave and Antennas
2 17EC72 EC 04 03 60 40 100 4
Digital Image Processing
3 17EC73 Power Electronics EC 04 03 60 40 100 4
4 17EC74X EC 03 03 60 40 100 3
Professional Elective-3
5 17EC75X EC 03 03 60 40 100 3
Professional Elective-4
01-Hour Instruction
6 17ECL76 EC 03 60 40 100 2
Advanced Communication Lab 02-Hour Practical
01-Hour Instruction
7 17ECL77 VLSI Lab 03 60 40 100 2
EC 02-Hour Practical
1. Project Phase – I and Project Seminar: Comprises of Literature Survey, Problem identification, Objectives and Methodology. CIE marks shall be based on the report
covering Literature Survey, Problem identification, Objectives and Methodology and Seminar presentation skill.
7
B.E.: Electronics & Communication Engineering
VIII SEMESTER
Teaching Teaching Hours Credits
Examination
Department /Week
Sl. Course
Title
No Code Practical/ Duration SEE CIE Total
Theory
Drawing in hours Marks Marks Marks
1 17EC81 Wireless Cellular and LTE 4G Broadband EC 4 - 3 60 40 100 4
2 17EC82 EC 4 - 3 60 40 100 4
Fiber Optics & Networks
3 17EC83X EC 3 - 3 60 40 100 3
Professional Elective-5
4 17EC84 EC Industry Oriented 3 50 50 100 2
Internship/Professional Practice
5 17ECP85 EC - 6 3 100 100 200 6
Project Work
6 17ECS86 Seminar EC - 4 - - 100 100 1
Professional Elective -5
17EC831 Micro Electro Mechanical Systems
17EC832 Speech Processing
17EC833 Radar Engineering
17EC834 Machine learning
17EC835 Network and Cyber Security
1. Internship/ Professional Practice: 4 Weeks internship to be completed between the (VI and VII semester vacation) and/or (VII and VIII semester vacation) period.
8
B.E E&C SEVENTH SEMESTER SYLLABUS
CREDITS – 04
Course objectives: This course will enable students to:
Describe the microwave properties and its transmission media
Describe microwave devices for several applications
Understand the basics of antenna theory
Select antennas for specific applications
Module-1
Microwave Tubes: Introduction, Reflex Klystron Oscillator, Mechanism of Oscillations,
Modes of Oscillations, Mode Curve (Qualitative Analysis only). (Text 1: 9.1, 9.2.2)
Microwave Transmission Lines: Microwave Frequencies, Microwave devices,
Microwave Systems, Transmission Line equations and solutions, Reflection Coefficient
and Transmission Coefficient, Standing Wave and Standing Wave Ratio, Smith Chart,
Single Stub matching. (Text 2: 0.1, 0.2, 0.3, 3.1, 3.2, 3.3, 3.5, 3.6 Except Double stub
matching) L1, L2
Module-2
Microwave Network theory: Symmetrical Z and Y-Parameters for Reciprocal Networks,
S matrix representation of Multi-Port Networks. (Text 1: 6.1, 6.2, 6.3)
Microwave Passive Devices: Coaxial Connectors and Adapters, Attenuators, Phase
Shifters, Waveguide Tees, Magic tees. (Text 1: 6.4.2, 6.4.14, 6.4.15, 6.4.16) L1, L2
Module-3
Strip Lines: Introduction, Micro Strip lines, Parallel Strip lines, Coplanar Strip lines,
Shielded Strip Lines. (Text 2: Chapter 11)
Antenna Basics: Introduction, Basic Antenna Parameters, Patterns, Beam Area,
Radiation Intensity, Beam Efficiency, Directivity and Gain, Antenna Apertures, Effective
Height, Bandwidth, Radio Communication Link, Antenna Field Zones & Polarization.
(Text 3: 2.1- 2.11, 2.13,2.15) L1, L2, L3
Module-4
102
Point Sources and Arrays: Introduction, Point Sources, Power Patterns, Power
Theorem, Radiation Intensity, Field Patterns, Phase Patterns, Arrays of Two Isotropic
Point Sources, Pattern Multiplication, Linear Arrays of n Isotropic Point Sources of
equal Amplitude and Spacing.(Text 3: 5.1 – 5.11, 5.13)
Electric Dipoles: Introduction, Short Electric Dipole, Fields of a Short Dipole (General
and Far Field Analyses), Radiation Resistance of a Short Dipole, Thin Linear Antenna
(Field Analyses), Radiation Resistances of Lambda/2 Antenna. (Text 3: 6.1 -6.6)
L1, L2, L3, L4
Module-5
Loop and Horn Antenna: Introduction, Small loop, Comparison of Far fields of Small
Loop and Short Dipole, The Loop Antenna General Case, Far field Patterns of Circular
Loop Antenna with Uniform Current, Radiation Resistance of Loops, Directivity of
Circular Loop Antennas with Uniform Current, Horn antennas Rectangular Horn
Antennas.(Text 3: 7.1-7.8, 7.19, 7.20)
Antenna Types: Helical Antenna, Helical Geometry, Practical Design Considerations of
Helical Antenna, Yagi-Uda array, Parabola General Properties, Log Periodic Antenna.
(Text 3: 8.3, 8.5, 8.8, 9.5, 11.7) L1, L2, L3
Course Outcomes: At the end of the course, students will be able to:
Describe the use and advantages of microwave transmission
Analyze various parameters related to microwave transmission lines and
waveguides
Identify microwave devices for several applications
Analyze various antenna parameters necessary for building an RF system
Recommend various antenna configurations according to the applications
Text Books:
1. Microwave Engineering – Annapurna Das, Sisir K Das TMH Publication, 2nd,
2010.
2. Microwave Devices and circuits- Liao, Pearson Education.
3. Antennas and Wave Propagation, John D. Krauss, Ronald J Marhefka and
Ahmad S Khan,4th Special Indian Edition , McGraw- Hill Education Pvt. Ltd.,
2010.
Reference Books:
1. Microwave Engineering – David M Pozar, John Wiley India Pvt. Ltd. 3rdEdn,
2008.
2. Microwave Engineering – Sushrut Das, Oxford Higher Education, 2ndEdn, 2015.
3. Antennas and Wave Propagation – Harish and Sachidananda: Oxford University
Press, 2007.
103
DIGITAL IMAGE PROCESSING
B.E., VII Semester, Electronics & Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC72 CIE Marks 40
Number of Lecture Hours/Week 04 SEE Marks 60
Module-2
Spatial Domain: Some Basic Intensity Transformation Functions, Histogram
Processing, Fundamentals of Spatial Filtering, Smoothing Spatial Filters, Sharpening
Spatial Filters
Frequency Domain: Preliminary Concepts, The Discrete Fourier Transform (DFT) of
Two Variables, Properties of the 2-D DFT, Filtering in the Frequency Domain, Image
Smoothing and Image Sharpening Using Frequency Domain Filters, Selective
Filtering.
[Text: Chapter 3: Sections 3.2 to 3.6 and Chapter 4: Sections 4.2, 4.5 to 4.10]
L1, L2, L3
Module-3
Restoration: Noise models, Restoration in the Presence of Noise Only using Spatial
Filtering and Frequency Domain Filtering, Linear, Position-Invariant Degradations,
Estimating the Degradation Function, Inverse Filtering, Minimum Mean Square Error
(Wiener) Filtering, Constrained Least Squares Filtering.
[Text: Chapter 5: Sections 5.2, to 5.9] L1, L2, L3
Module-4
104
Color Image Processing: Color Fundamentals, Color Models, Pseudocolor Image
Processing.
Wavelets: Background, Multiresolution Expansions.
Morphological Image Processing: Preliminaries, Erosion and Dilation, Opening and
Closing, The Hit-or-Miss Transforms, Some Basic Morphological Algorithms.
[Text: Chapter 6: Sections 6.1 to 6.3, Chapter 7: Sections 7.1 and 7.2, Chapter 9:
Sections 9.1 to 9.5] L1, L2, L3
Module-5
Segmentation: Point, Line, and Edge Detection, Thresholding, Region-Based
Segmentation, Segmentation Using Morphological Watersheds.
Representation and Description: Representation, Boundary descriptors.
[Text: Chapter 10: Sections 10.2, to 10.5 and Chapter 11: Sections 11.1 and 11.2]
L1, L2, L3
Course Outcomes: At the end of the course students should be able to:
Understand image formation and the role human visual system plays in
perception of gray and color image data.
Apply image processing techniques in both the spatial and frequency (Fourier)
domains.
Design image analysis techniques in the form of image segmentation and to
evaluate the Methodologies for segmentation.
Conduct independent study and analysis of Image Enhancement techniques.
Text Book:
Digital Image Processing- Rafel C Gonzalez and Richard E. Woods, PHI 3rd
Edition 2010.
Reference Books:
1. Digital Image Processing- S.Jayaraman, S.Esakkirajan, T.Veerakumar, Tata
McGraw Hill 2014.
2. Fundamentals of Digital Image Processing-A. K. Jain, Pearson 2004.
105
POWER ELECTRONICS
B.E., VII Semester, Electronics & Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC73 CIE Marks 40
Number of Lecture 04 SEE Marks 60
Hours/Week
Total Number of 50 (10 Hours / Module) Exam Hours 03
Lecture Hours
CREDITS – 04
Course Objectives: This course will enable students to:
Understand the construction and working of various power devices.
Study and analysis of thyristor circuits with different triggering conditions.
Learn the applications of power devices in controlled rectifiers, converters and
inverters.
Study of power electronics circuits under various load conditions.
Module-1
Introduction - Applications of Power Electronics, Power Semiconductor Devices, Control
Characteristics of Power Devices, types of Power Electronic Circuits, Peripheral Effects.
Power Transistors: Power BJTs: Steady state characteristics. Power MOSFETs: device
operation, switching characteristics, IGBTs: device operation, output and transfer
characteristics, di/dt and dv/dt limitations. (Text 1) L1, L2
Module-2
Thyristors - Introduction, Principle of Operation of SCR, Static Anode-Cathode
Characteristics of SCR, Two transisitor model of SCR, Gate Characteristics of SCR,
Turn-ON Methods, Turn-OFF Mechanism, Turn-OFF Methods: Natural and Forced
Commutation – Class A and Class B types, Gate Trigger Circuit: Resistance Firing
Circuit, Resistance capacitance firing circuit, UJT Firing Circuit. (Text 2) L1, L2, L3
Module-3
Controlled Rectifiers - Introduction, Principle of Phase-Controlled Converter Operation,
Single-Phase Full Converter with RL Load, Single-Phase Dual Converters, Single-Phase
Semi Converter with RL load.
AC Voltage Controllers - Introduction, Principles of ON-OFF Control, Principle of Phase
Control, Single phase controllers with resistive and inductive loads. (Text 1)
L1, L2, L3
Module-4
DC-DC Converters - Introduction, principle of step-down operation and it‘s analysis
with RL load, principle of step-up operation, Step-up converter with a resistive load,
Performance parameters, Converter classification, Switching mode regulators: Buck
regulator, Boost regulator, Buck-Boost Regulators, Chopper circuit design. (Text 1)
L1, L2
Module-5
Pulse Width Modulated Inverters- Introduction, principle of operation, performance
parameters, Single phase bridge inverters, voltage control of single phase inverters,
current source inverters, Variable DC-link inverter, Boost inverter, Inverter circuit
design.
Static Switches: Introduction, Single phase AC switches, DC Switches, Solid state
relays, Microelectronic relays. (Text 1) L1, L2
Course Outcomes: At the end of the course students should be able to:
106
Describe the characteristics of different power devices and identify the various
applications associated with it.
Illustrate the working of power circuit as DC-DC converter.
Illustrate the operation of inverter circuit and static switches.
Determine the output response of a thyristor circuit with various triggering options.
Determine the response of controlled rectifier with resistive and inductive loads.
107
MULTIMEDIA COMMUNICATION
B.E., VII Semester, Electronics & Communication Engineering/
Telecommunication Engineering
[As per Choice Based credit System (CBCS) Scheme
Course Code 17EC741 CIE Marks 40
Number of Lecture 03 SEE Marks 60
Hours/Week
Total Number of 40 (08 Hours / Module) Exam Hours 03
Lecture Hours
CREDITS – 03
Course objectives: This course will enable students to:
Gain fundamental knowledge in understanding the basics of different multimedia
networks and applications.
Understand digitization principle techniques required to analyze different media
types.
Analyze compression techniques required to compress text and image and gain
knowledge of DMS.
Analyze compression techniques required to compress audio and video.
Gain fundamental knowledge about multimedia communication across different
networks.
Module-1
Multimedia Communications: Introduction, Multimedia information representation,
multimedia networks, multimedia applications, Application and networking
terminology. (Chap 1 of Text 1) L1, L2
Module-2
Information Representation: Introduction, Digitization principles, Text, Images,
Audio and Video (Chap 2 of Text 1) L1, L2
Module-3
Text and image compression: Introduction, Compression principles, text
compression, image Compression. (Chap 3 of Text 1)
Module-5
Multimedia Communication Across Networks: Packet audio/video in the network
environment, Video transport across generic networks, Multimedia Transport across
ATM Networks (Chap. 6 - Sections 6.1, 6.2, 6.3 of Text 2). L1, L2
108
Course Outcomes: After studying this course, students will be able to:
Understand basics of different multimedia networks and applications.
Understand different compression techniques to compress audio and video.
Describe multimedia Communication across Networks.
Analyse different media types to represent them in digital form.
Compress different types of text and images using different compression
techniques and analyse DMS.
Text Books:
1. Fred Halsall, ―Multimedia Communications‖, Pearson education, 2001 ISBN -
9788131709948.
Reference Book:
Raifsteinmetz, Klara Nahrstedt, ―Multimedia: Computing, Communications and
Applications‖, Pearson education, 2002. ISBN -9788177584417
109
Cardiological signal processing:
Basic Electrocardiography, ECG data acquisition, ECG lead system, ECG signal
characteristics (parameters and their estimation), Analog filters, ECG amplifier, and
QRS detector, Power spectrum of the ECG, Bandpass filtering techniques,
Differentiation techniques, Template matching techniques, A QRS detection algorithm,
Realtime ECG processing algorithm, ECG interpretation, ST segment analyzer,
Portable arrhythmia monitor. (Text -2) L1, L2, L3
Module-5
Neurological signal processing: The brain and its potentials, The electrophysiological
origin of brain waves, The EEG signal and its characteristics (EEG rhythms, waves,
and transients), Correlation.
Analysis of EEG channels: Detection of EEG rhythms, Template matching for EEG,
spike and wave detection (Text-2). L1, L2, L3
Course outcomes: At the end of the course, students will be able to:
Possess the basic mathematical, scientific and computational skills necessary to
analyse ECG and EEG signals.
Apply classical and modern filtering and compression techniques for ECG and
EEG signals
Develop a thorough understanding on basics of ECG and EEG feature extraction.
Text Books:
1. Biomedical Digital Signal Processing- Willis J. Tompkins, PHI 2001.
2. Biomedical Signal Processing Principles and Techniques- D C Reddy, McGraw-
Hill publications 2005
Reference Book:
Biomedical Signal Analysis-Rangaraj M. Rangayyan, John Wiley & Sons 2002
111
REAL TIME SYSTEMS
B.E., VII Semester, Electronics & Communication Engineering
/Telecommunication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC743 CIE Marks 40
Number of Lecture 03 SEE Marks 60
Hours/Week
Total Number of 40 (08 Hours per Module) Exam Hours 03
Lecture Hours
Credits – 03
Course Objectives: This Course will enable students to:
Discuss the historical background of Real-time systems and its classifications.
Describe the concepts of computer control and hardware components for Real-
Time Application.
Discuss the languages to develop software for Real-Time Applications.
Explain the concepts of operating system and RTS development methodologies.
Module-1
Introduction to Real-Time Systems: Historical background, Elements of a Computer
Control System, RTS- Definition, Classification of Real-time Systems, Time
Constraints, Classification of Programs.
Concepts of Computer Control: Introduction, Sequence Control, Loop Control,
Supervisory Control, Centralized Computer Control, Hierarchical Systems. (Text Book:
1.1 to 1.6 and 2.1 to 2.6) L1, L2
Module-2
Computer Hardware Requirements for Real-Time Applications: Introduction,
General Purpose Computer, Single Chip Microcomputers and Microcontrollers,
Specialized Processors, Process-Related Interfaces, Data Transfer Techniques,
Communications, Standard Interface.(Text Book: 3.1 to 3.8) L1, L2
Module-3
Languages for Real-Time Applications: Introduction, Syntax Layout and Readability,
Declaration and Initialization of Variables and Constants, Modularity and Variables,
Compilation of Modular Programs, Data types, Control Structures, Exception Handling,
Low-level facilities, Co-routines, Interrupts and Device Handling, Concurrency, Real-
Time Support, Overview of Real-Time Languages. (Text Book: 5.1 to 5.14) L1, L2, L3
Module-4
Operating Systems: Introduction, Real-Time Multi-Tasking OS, Scheduling Strategies,
Priority Structures, Task Management, Scheduler and Real-Time Clock Interrupt
Handler, Memory Management, Code Sharing, Resource Control, Task Co-Operation
and Communication, Mutual Exclusion.(Text Book: 6.1 to 6.11) L1, L2
Module-5
Design of RTS – General Introduction: Introduction, Specification Document,
Preliminary Design, Single-Program Approach, Foreground/Background System.
RTS Development Methodologies: Introduction, Yourdon Methodology, Ward and
Mellor Method, Hately and Pirbhai Method. (Text Book: 7.1 to 7.5 and 8.1, 8.2, 8.4,8.5)
L1, L2, L3
112
Course Outcomes: At the end of the course, students should be able to:
Understand the fundamentals of Real time systems and its classifications.
Understand the concepts of computer control, operating system and the suitable
computer hardware requirements for real-time applications.
Develop the software languages to meet Real time applications.
Apply suitable methodologies to design and develop Real-Time Systems.
Text Book:
Real-Time Computer Control, by Stuart Bennet, 2nd Edn. Pearson Education. 2008.
Reference Books:
1. C.M. Krishna, Kang G. Shin, ―Real –Time Systems‖, McGraw –Hill International
Editions, 1997.
2. Real-Time Systems Design and Analysis, Phillip. A. Laplante, second edition,
PHI, 2005.
3. Embedded Systems, Raj Kamal, Tata McGraw Hill, India, third edition, 2005.
113
CRYPTOGRAPHY
B.E., VII Semester, Electronics & Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC744 CIE Marks 40
Number of Lecture 03 SEE Marks 60
Hours/Week
Total Number of 40 (08 Hours / Module) Exam Hours 03
Lecture Hours
CREDITS – 03
Course Objectives: This Course will enable students to:
Enable students to understand the basics of symmetric key and public key
cryptography.
Equip students with some basic mathematical concepts and pseudorandom
number generators required for cryptography.
Enable students to authenticate and protect the encrypted data.
Enrich knowledge about Email, IP and Web security.
Module-1
Basic Concepts of Number Theory and Finite Fields: Divisibility and the
divisibility algorithm, Euclidean algorithm, Modular arithmetic, Groups, Rings and
Fields, Finite fields of the form GF(p), Polynomial arithmetic, Finite fields of the form
GF(2n)(Text 1: Chapter 3) L1, L2
Module-2
Classical Encryption Techniques: Symmetric cipher model, Substitution
techniques, Transposition techniques, Steganography (Text 1: Chapter 1)
SYMMETRIC CIPHERS: Traditional Block Cipher structure, Data Encryption
Standard (DES) (Text 1: Chapter 2: Section1, 2) L1, L2
Module-3
SYMMETRIC CIPHERS: The AES Cipher. (Text 1: Chapter 4: Section 2, 3, 4)
Pseudo-Random-Sequence Generators and Stream Ciphers: Linear Congruential
Generators, Linear Feedback Shift Registers, Design and analysis of stream ciphers,
Stream ciphers using LFSRs (Text 2: Chapter 16: Section 1, 2, 3, 4) L1, L2, L3
Module-4
More number theory: Prime Numbers, Fermat‘s and Euler‘s theorem, Primality
testing, Chinese Remainder theorem, discrete logarithm. (Text 1: Chapter 7)
Principles of Public-Key Cryptosystems: The RSA algorithm, Diffie - Hellman Key
Exchange, Elliptic Curve Arithmetic, Elliptic Curve Cryptography (Text 1: Chapter 8,
Chapter 9: Section 1, 3, 4) L1, L2, L3
Module-5
114
One-Way Hash Functions: Background, Snefru, N-Hash, MD4, MD5, Secure Hash
Algorithm [SHA],One way hash functions using symmetric block algorithms, Using
public key algorithms, Choosing a one-way hash functions, Message Authentication
Codes. Digital Signature Algorithm, Discrete Logarithm Signature Scheme (Text 2:
Chapter 18: Section 18.1 to 18.5, 18.7, 18.11 to 18.14 and Chapter 20: Section 20.1,
20.4) L1, L2, L3
Course Outcomes: After studying this course, students will be able to:
Use basic cryptographic algorithms to encrypt the data.
Generate some pseudorandom numbers required for cryptographic
applications.
Provide authentication and protection for encrypted data.
Text Books:
1. William Stallings , ―Cryptography and Network Security Principles and Practice‖,
Pearson Education Inc., 6th Edition, 2014, ISBN: 978-93-325-1877-3
2. Bruce Schneier, ―Applied Cryptography Protocols, Algorithms, and Source code in
C‖, Wiley Publications, 2nd Edition, ISBN: 9971-51-348-X
Reference Books:
1. Cryptography and Network Security, Behrouz A. Forouzan, TMH, 2007.
2. Cryptography and Network Security, Atul Kahate, TMH, 2003.
115
ADVANCED COMPUTER ARCHITECTURE
B.E., VII Semester, Electronics & Communication Engineering
/Telecommunication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC754 CIE Marks 40
Number of Lecture 03 SEE Marks 60
Hours/Week
Total Number of 40 (8 Hours / Exam Hours 03
Lecture Hours Module)
CREDITS – 03
Course Objectives: This course will enable students to:
Understand the various parallel computer models and conditions of parallelism
Explain the control flow, dataflow and demand driven machines
Study CISC, RISC, superscalar, VLIW and multiprocessor architectures
Understand the concept of pipelining and memory hierarchy design
Explain cache coherence protocols.
Module-1
Parallel Computer Models: The state of computing, Classification of parallel
computers, Multiprocessors and multicomputer, Multivectors and SIMD computers.
Program and Network Properties: Conditions of parallelism, Data and resource
Dependences, Hardware and software parallelism, Program partitioning and
scheduling, Grain Size and latency. L1, L2
Module-2
Program flow mechanisms: Control flow versus data flow, Data flow Architecture,
Demand driven mechanisms, Comparisons of flow mechanisms.
Principles of Scalable Performance: Performance Metrics and Measures, Parallel
Processing Applications, Speedup Performance Laws, Scalability Analysis and
Approaches. L1, L2, L3
Module-3
Speedup Performance Laws: Amdhal‘s law, Gustafson‘s law, Memory bounded speed
up model, Scalability Analysis and Approaches.
Advanced Processors: Advanced processor technology, Instruction-set Architectures,
CISC Scalar Processors, RISC Scalar Processors, Superscalar Processors, VLIW
Architectures. L1, L2, L3
Module-4
Pipelining: Linear pipeline processor, nonlinear pipeline processor, Instruction
pipeline Design, Mechanisms for instruction pipelining, Dynamic instruction
scheduling, Branch Handling techniques, branch prediction, Arithmetic Pipeline
Design.
Memory Hierarchy Design: Cache basics & cache performance, reducing miss rate
and miss penalty, multilevel cache hierarchies, main memory organizations, design of
memory hierarchies. L1, L2, L3
Module-5
124
Multiprocessor Architectures: Symmetric shared memory architectures, distributed
shared memory architectures, models of memory consistency, cache coherence
protocols (MSI, MESI, MOESI), scalable cache coherence, overview of directory based
approaches, design challenges of directory protocols, memory based directory
protocols, cache based directory protocols. L1, L2, L3
Course Outcomes: At the end of the course, the students will be able to:
Explain parallel computer models and conditions of parallelism
Differentiate control flow, dataflow, demand driven mechanisms
Explain the principle of scalable performance
Discuss advanced processors architectures like CISC, RISC, superscalar and
VLIW
Understand the basics of instruction pipelining and memory technologies
Explain the issues in multiprocessor architectures
Text Book:
Kai Hwang, ―Advanced computer architecture‖; TMH.
Reference Books:
1. Kai Hwang and Zu, ―Scalable Parallel Computers Architecture‖; MGH.
2. M.J Flynn, ―Computer Architecture, Pipelined and Parallel Processor Design‖;
Narosa Publishing.
3. D.A.Patterson, J.L.Hennessy, ―Computer Architecture :A quantitative approach‖;
Morgan Kauffmann Feb, 2002.
125
SATELLITE COMMUNICATION
B.E., VII Semester, Electronics & Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC755 CIE Marks 40
Number of Lecture 03 SEE Marks 60
Hours/Week
Total Number of 40 (8 Hours / Exam Hours 03
Lecture Hours Module)
CREDITS – 03
Course Objectives: This course will enable students to
Understand the basic principle of satellite orbits and trajectories.
Study of electronic systems associated with a satellite and the earth station.
Understand the various technologies associated with the satellite communication.
Focus on a communication satellite and the national satellite system.
Study of satellite applications focusing various domains services such as remote
sensing, weather forecasting and navigation.
Module-1
Satellite Orbits and Trajectories: Definition, Basic Principles, Orbital parameters,
Injection velocity and satellite trajectory, Types of Satellite orbits, Orbital
perturbations, Satellite stabilization, Orbital effects on satellite‘s performance,
Eclipses, Look angles: Azimuth angle, Elevation angle. L1, L2
Module-2
Satellite subsystem: Power supply subsystem, Attitude and Orbit control, Tracking,
Telemetry and command subsystem, Payload.
127
ADVANCED COMMUNICATION LAB
B.E., VII Semester, Electronics & Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17ECL76 CIE Marks 40
Number of Lecture 01Hr Tutorial (Instructions) SEE Marks 60
Hours/Week + 02 Hours Laboratory = 03
CREDITS – 02
Course objectives: This course will enable students to:
Design and demonstrate the digital modulation techniques
Demonstrate and measure the wave propagation in microstrip antennas
Characteristics of microstrip devices and measurement of its parameters.
Model an optical communication system and study its characteristics.
Simulate the digital communication concepts and compute and display various
parameters along with plots/figures.
Laboratory Experiments
PART-A: Following Experiments No. 1 to 4 has to be performed using discrete
components.
7. Determination of
2. Simulate the Pulse code modulation and demodulation system and display the
waveforms.
3. Simulate the QPSK transmitter and receiver. Plot the signals and its constellation
diagram.
Course outcomes: On the completion of this laboratory course, the students will be
able to:
Determine the characteristics and response of microwave devices and optical
waveguide.
Determine the characteristics of microstrip antennas and devices and compute
the parameters associated with it.
Simulate the digital modulation schemes with the display of waveforms and
computation of performance parameters.
Design and test the digital modulation circuits/systems and display the
waveforms.
Conduct of Practical Examination:
All laboratory experiments are to be considered for practical examination.
For examination one question from PART-A and one question from PART-B or only
one question from PART-B experiments based on the complexity, to be set.
Students are allowed to pick one experiment from the lot.
Strictly follow the instructions as printed on the cover page of answer script for
breakup of marks.
Change of experiment is allowed only once and Marks allotted to the procedure part
to be made zero.
129
VLSI LAB
B.E., VII Semester, Electronics & Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
CREDITS – 02
Course objectives: This course will enable students to:
Explore the CAD tool and understand the flow of the Full Custom IC design cycle.
Learn DRC, LVS and Parasitic Extraction of the various designs.
Design and simulate the various basic CMOS analog circuits and use them in higher
circuits like data converters using design abstraction concepts.
Design and simulate the various basic CMOS digital circuits and use them in higher
circuits like adders and shift registers using design abstraction concepts.
130
PART - B
ANALOG DESIGN
1. Design an Inverter with given specifications**, completing the design flow
mentioned below:
a. Draw the schematic and verify the following
i) DC Analysis
ii) Transient Analysis
b. Draw the Layout and verify the DRC, ERC
c. Check for LVS
d. Extract RC and back annotate the same and verify the Design
e. Verify & Optimize for Time, Power and Area to the given constraint*
2. Design the (i) Common source and Common Drain amplifier and (ii) A Single
Stage differential amplifier, with given specifications**, completing the
design flow mentioned below:
a. Draw the schematic and verify the following
i) DC Analysis
ii) AC Analysis
iii) Transient Analysis
b. Draw the Layout and verify the DRC, ERC
c. Check for LVS
d. Extract RC and back annotate the same and verify the Design.
131
5. For the SAR based ADC mentioned in the figure below draw the mixed signal
schematic and verify the functionality by completing ASIC Design FLOW.
[Specifications to GDS-II]
132
B.E E&C EIGTH SEMESTER SYLLABUS
CREDITS – 04
Course Objectives: This course will enable students to:
Key Enablers for LTE features: OFDM, Single carrier FDMA, Single carrier
FDE, Channel Dependent Multiuser Resource Scheduling, Multi antenna
Techniques, IP based Flat network Architecture, LTE Network Architecture. (Sec
1.4- 1.5 of Text).
Reference Books:
1. LTE for UMTS Evolution to LTE-Advanced‘ Harri Holma and Antti
Toskala, Second Edition - 2011, John Wiley & Sons, Ltd. Print ISBN:
9780470660003.
2. ‗EVOLVED PACKET SYSTEM (EPS) ; THE LTE AND SAE EVOLUTION
OF 3G UMTS‘ by Pierre Lescuyer and Thierry Lucidarme, 2008, John
Wiley & Sons, Ltd. Print ISBN:978-0-470-05976-0.
3. ‗LTE – The UMTS Long Term Evolution ; From Theory to Practice‘ by
Stefania Sesia, Issam Toufik, and Matthew Baker, 2009 John Wiley & Sons
Ltd, ISBN 978-0-470-69716-0.
134
FIBER OPTICS and NETWORKS
B.E., VIII Semester, Electronics &Communication Engineering
[As per Choice Based Credit System (CBCS) Scheme]
Course Code 17EC82 CIE Marks 40
Number of
Lecture 4 SEE Marks 60
Hours/Week
Total Number of 50(10 Hours /
Exam Hours 03
Lecture Hours Module)
CREDITS – 04
Course Objectives: This course will enable students to:
Learn the basic principle of optical fiber communication with different
modes of light propagation.
Understand the transmission characteristics and losses in optical fiber.
Study of optical components and its applications in optical communication
networks.
Learn the network standards in optical fiber and understand the network
architectures along with its functionalities.
Module -1
Optical fiber Communications: Historical development, The general system,
Advantages of optical fiber communication, Optical fiber waveguides: Ray
theory transmission, Modes in planar guide, Phase and group velocity,
Cylindrical fiber: Modes, Step index fibers, Graded index fibers, Single mode
fibers, Cutoff wavelength, Mode field diameter, effective refractive index. Fiber
Materials, Photonic crystal fibers. (Text 2) L1, L2
Module -2
Transmission characteristics of optical fiber: Attenuation, Material
absorption losses, Linear scattering losses, Nonlinear scattering losses, Fiber
bend loss, Dispersion, Chromatic dispersion, Intermodal dispersion:
Multimode step index fiber.
Optical Fiber Connectors: Fiber alignment and joint loss, Fiber splices,
Fiber connectors, Fiber couplers. (Text 2) L1, L2
Module -3
Optical sources: Energy Bands, Direct and Indirect Bandgaps, Light
Emitting diodes: LED Structures, Light Source Materials, Quantum Efficiency
and LED Power, Modulation. Laser Diodes: Modes and Threshold conditions,
Rate equation, External Quantum Efficiency, Resonant frequencies, Laser
Diode structures and Radiation Patterns: Single mode lasers.
135
WDM Concepts and Components: Overview of WDM: Operational Principles
of WDM, WDM standards, Mach-Zehnder Interferometer Multiplexers, Isolators
and Circulators, Fiber grating filters, Dielectric Thin-Film Filters, Diffraction
Gratings, Active Optical Components, Tunable light sources,
Text Books:
1. Gerd Keiser , Optical Fiber Communication, 5th Edition, McGraw Hill
Education(India) Private Limited, 2015. ISBN:1-25-900687-5.
2. John M Senior, Optical Fiber Communications, Principles and Practice, 3rd
Edition, Pearson Education, 2010, ISBN:978-81-317-3266-3
Reference Book:
Joseph C Palais, Fiber Optic Communication , Pearson Education, 2005,
ISBN:0130085103
136
NETWORK AND CYBER SECURITY
B.E., VIII Semester, Electronics & Communication Engineering
[As per Choice Based credit System (CBCS) Scheme]
Course Code 17EC835 CIE Marks 40
Number of Lecture 03 SEE Marks 60
Hours/Week
Total Number of 40 (8 Hours per Module) Exam Hours 03
Lecture Hours
CREDITS – 03
Course Objectives: This course will enable students to:
Know about security concerns in Email and Internet Protocol.
Understand cyber security concepts.
List the problems that can arise in cyber security.
Discuss the various cyber security frame work.
Module-1
145
Course Outcomes: After studying this course, students will be able to:
Explain network security protocols
Understand the basic concepts of cyber security
Discuss the cyber security problems
Explain Enterprise Security Framework
Apply concept of cyber security framework in computer system
administration
Text Books:
1. William Stallings, ―Cryptography and Network Security Principles and
Practice‖, Pearson Education Inc., 6th Edition, 2014, ISBN: 978-93-325-
1877-3.
Reference Books:
1. Cryptography and Network Security, Behrouz A. Forouzan, TMH, 2007.
2. Cryptography and Network Security, Atul Kahate, TMH, 2003.
146
149
SEMINAR
B.E., VIII Semester, Electrical and Electronics Engineering
[As per Choice Based Credit System (CBCS) scheme]
Explore an appreciation of the self in relation to its larger diverse social and academic contexts.
Evaluation Procedure:
The CIE marks for the seminar shall be awarded (based on the relevance of the topic, presentation skill,
participation in the question and answer session and quality of report) by the committee constituted for the
purpose by the Head of the Department. The committee shall consist of three faculties from the department with
the senior most acting as the Chairman.
Marks distribution for internal assessment of the course 15EES86 seminar:
Seminar Report: 30 marks
Presentation skill:50 marks
Question and Answer:20 marks.∎
147