Mahesh Dananjaya
4 SlideShares 33 Followers 17 Followings
Personal Information
Organization / Workplace
Sri Lanka, Western Province Sri Lanka
Occupation
Google Summer of Code Student
Industry
Electronics / Computer Hardware
Website
lk.linkedin.com/in/dananjayamahesh
About
Hi! I am Mahesh, an electronic engineer and i am interested in computer architecture, systems, high performance computing, parallel systems, many-core architecture and VLSI. I was graduated from University of Moratuwa, Sri Lanka, majoring Electronic and Telecommunication Engineering.
Contact Details
Tags
machine learning sdn computer architecture nfv processor architecture image processing machine vision segmentation graph cut normalized cut high performance computing mips risc parallel systems soc data plane flow caching flow matching high performance data sciences data analytics deep learning distributed systems sgd optimizationn complex event processor mini-batch processing
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Presentations

(1)

High Performance Flow Matching Architecture for Openflow Data Plane

8 years ago • 446 Views

Documents

(3)

Image segmentation using normalized graph cut

10 years ago • 1685 Views

OpenFlow Aware Network Processor

8 years ago • 628 Views

Proposal for google summe of code 2016

8 years ago • 440 Views

Likes

(9)
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P4: Programming Protocol-Independent Packet Processor

Makhlouf Antitene • 9 years ago

Adapting to a Cambrian AI/SW/HW explosion with open co-design competitions and Collective Knowledge

Grigori Fursin • 7 years ago

Verilator: Fast, Free, But for Me?

DVClub • 12 years ago

Open VSwitch on Android

Diego Ruggeri • 11 years ago

Tutorial on SDN data plane evolution

Antonio Capone • 10 years ago

LTE Testing | 4G Testing

Ixia • 14 years ago

Open Flow Tutorial Series - Set 1

Radhika Hirannaiah • 11 years ago

Set review 1

Ankita Mandekar • 10 years ago

Open stack with_openflowsdn-torii

Hui Cheng • 12 years ago
Personal Information
Organization / Workplace
Sri Lanka, Western Province Sri Lanka
Occupation
Google Summer of Code Student
Industry
Electronics / Computer Hardware
Website
lk.linkedin.com/in/dananjayamahesh
About
Hi! I am Mahesh, an electronic engineer and i am interested in computer architecture, systems, high performance computing, parallel systems, many-core architecture and VLSI. I was graduated from University of Moratuwa, Sri Lanka, majoring Electronic and Telecommunication Engineering.
Tags
machine learning sdn computer architecture nfv processor architecture image processing machine vision segmentation graph cut normalized cut high performance computing mips risc parallel systems soc data plane flow caching flow matching high performance data sciences data analytics deep learning distributed systems sgd optimizationn complex event processor mini-batch processing
See more