synchronous state machine design
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The document discusses state machines and finite state machines. It describes two models for representing sequential circuits: Moore circuits where the output depends only on the present state, and Mealy circuits where the output depends on both the present state and inputs. The state diagram and state table are introduced as ways to represent a state machine pictorially and tabularly. Methods like state reduction, state assignment, and implementation using flip-flops are also covered. Examples of state machines like adders, detectors, generators and counters are provided.
synchronous state machine design
- 2. The State Machine: A state machine or finite state machine (FSM) is an abstract model describing the synchronous sequential machine.
- 3. Models of representing sequential circuits • The synchronous or clocked sequential circuits are represented by two models. • 1. Moore circuit: In this model, the output depends only on the present state of the flip- flops. • 2. Mealy circuit : In this model, the output depends on both the present state of the flip- flop(s) and the input(s).
- 4. State Diagram • The state diagram or state graph is a pictorial representation of the relationships between the present state, the input, the next state, and the output of a sequential circuit, i.e. the state diagram is a pictorial representation of the behaviour of a sequential circuit. State diagram and state table using mealy machine
- 5. State Table • Even though the behaviour of a sequential circuit can be conveniently described using a state diagram, for its implementation the information contained in the state diagram is to be translated into a state table. The state table is a tabular representation of the state diagram.
- 6. State Reduction • The state reduction technique basically avoids the introduction of redundant states. • It reduces no. of FFs and logic gates.
- 8. Memory Elements • D flip flop
- 9. • T flip flop
- 10. • S R flip flop
- 11. • J K flip flop
- 12. Serial binary adder • Step 1. Word statement of the problem • Step 2. State diagram • Step 3. State table.
- 13. • Step 6. & 7. Choose type of flip-flops and form the excitation table and solve the K-maps and minimal expressions 2 • Step 4. Reduced standard form state table. • Step 5. State assignment and transition and output table:
- 15. • Step 8. Implementation
- 16. The Sequence Detector • Mealy type model
- 19. PARITY-BIT GENERATOR odd Parity-bit generator
- 23. 3 Bit Gray Code Counter