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Chap. 7 Microprogrammed Control(Control Unit)                                                                            7-1



    7-1 Control Memory
       Control Unit
           Initiate sequences of microoperations
                       » Control signal (that specify microoperations) in a bus-organized system by the
                               groups of bits that select the paths in multiplexers, decoders, and arithmetic logic units
                   Two major types of Control Unit
                       » Hardwired Control :
                                  The control logic is implemented with gates, F/Fs, decoders, and other digital circuits
                                  + Fast operation, - Wiring change(if the design has to be modified) is difficult.
                       » Microprogrammed Control :
                                  The control information is stored in a control memory, and the control memory is programmed
                                  to initiate the required sequence of microoperations for an instruction
                                  + Any required change can be done by updating the microprogram in control memory,
                                  - Slow operation
       Control Word
            The control variables at any given time can be represented by a string of 1’s and
            0’s is called control world
       Microprogrammed Control Unit
                   A control unit whose binary control variables are stored in memory (control
                   memory).

Computer System Architecture                        Chap. 7 Microprogrammed Control                        Dept. of Info. Of Computer
7-2



       Microinstruction : (Control Word in Control Memory)
            The instruction store in control memory is called microinstruction (specifies one
            or more microoperations )
       Microprogram
            Microprogram is a sequence of microinstruction just like as program is a
            sequence of program. It is two type as follow:
                       » Dynamic microprogramming : (Control Memory = RAM)
                               RAM can be used for writing (to change a writable control memory)
                               Microprogram is loaded initially from an auxiliary memory such as a magnetic disk
                       » Static microprogramming : (Control Memory = ROM)
                               Control words in ROM are made permanent during the hardware production.

                                                    User Program

                                              Machine Instruction

                                                   Microprogram

                                                 Microinstruction

                                                  Microoperation
Computer System Architecture                   Chap. 7 Microprogrammed Control                      Dept. of Info. Of Computer
Micro programmed Control Organization                                         7-3



       Microprogrammed control Organization :( Fig. 7-1)
                   1) Control Memory
                     » Computer Memory employs a micro programmed control unit
                       which have two separate memory
                           Main Memory : for storing user program (Machine
                           instruction/data)
                           Control Memory : for storing microprogram
                           (Microinstruction)
                   2) Control Address Register
                     » Specify the address of the microinstruction3) Sequencer (=
                       Next Address Generator)
                     » Determine the address sequence that is read from control
                       memory
                     » Next address of the next microinstruction can be specified
                       several way depending on the sequencer input : p. 217, [1, 2,
                       3, and 4]


Computer System Architecture         Chap. 7 Microprogrammed Control   Dept. of Info. Of Computer
7-4
                         Block Diagram of Microprogarmmed Control Memory
                   4) Control Data Register (= Pipeline Register )
                       » Hold the microinstruction read from control memory
                       » Allows the execution of the microoperations specified by the control word
                         simultaneously with the generation of the next microinstruction
       Example(RISC Architecture Concept)
           RISC(Reduced Instruction Set Computer) system use hardwired control rather
           than microprogrammed control




Computer System Architecture                 Chap. 7 Microprogrammed Control               Dept. of Info. Of Computer
Address Sequencing                                               7-5



    7-2 Address Sequencing
      Address Sequencing = Sequencer : Next Address Generator
           Selection of address for control memory
      Routine                Subroutine : program used by other ROUTINES
           Microinstruction are stored in control memory in groups With each group
           specify a routine.
           each computer instruction has it’s own micro program routine in control
           memory to generate microinstructions to execute an instruction.
      Mapping : mapping of
            Instruction Code             into Address in control memorywhere routine
           is located is called mapping process
            Process of Address Sequencing :
                   1) Incrementing of the control address register
                   2) Unconditional branch or conditional branch, depending on status bit
                   conditions
                   3) Mapping process ( bits of the instruction address for control memory )
                   4) A facility for subroutine call and return
Computer System Architecture           Chap. 7 Microprogrammed Control     Dept. of Info. Of Computer
7-6



   Selection of address for control memory : Fig. 7-2
        Multiplexer
                    CAR Increment                                                                          In s t r u c t io n c o d e


                    JMP/CALL                                                                                     M a p p in g
                                                                                                                    lo g ic
                    Mapping
                                                                                                               
                    Subroutine Return                      S ta tu s   B ra n c h
                                                                          lo g ic
                                                                                          MUX
                                                                                         s e le c t
                                                                                                                       M u lt ip le x e rs
                                                              b it s
               CAR : Control Address Register                                                                                                                          S u b ro u tin e
                                                                                                                                                                          re g is e r
                   » CAR receive the address from                                                                                                                          (S B R )
                                                                                                             C o n tro l a d d re s s re g is te r
                                                                                     C lo c k
                       4 different paths                                                                                   (C A R )


                    1) Incrementer
                                                                                                                                                           In c re m e n te r
                    2) Branch address from
                        control memory
                    3) Mapping Logic                                                                                C o n tro l m e m o ry

                    4) SBR : Subroutine Register
               SBR : Subroutine Register                                         S e le c t a s t a t u s                             M ic ro o p e ra tio n s
                                                                                            b it
                   » Return Address can not be stored
                                                                                 B ra n c h a d d re s s
                      in ROM
                   » Return Address for a subroutine is
                      stored in SBR

Computer System Architecture                Chap. 7 Microprogrammed Control                                                        Dept. of Info. Of Computer
7-7


       Conditional Branching
           Status Bits
                       » Control the conditional branch decisions generated in the Branch Logic
                   Branch Logic
                       » Test the specified condition and Branch to the indicated address if the condition is
                         met ; otherwise, the control address register is just incremented.




       Mapping of Instruction :                           Opcode

                     Computer Instruction                  1 0 1 1         Address

                           Mapping bits                 0 x x x x    0 0

                    Microinstruction Address            0 1 0 1 1    0 0


                   4 bit Opcode = specify up to 16 distinct instruction
                   Mapping Process : Converts the 4-bit Opcode to a 7-bit control memory address
                       » 1) Place a “0” in the most significant bit of the address
                       » 2) Transfer 4-bit Operation code bits
                       » 3) Clear the two least significant bits of the CAR (Microinstruction )
                   Mapping Function : Implemented by Mapping ROM or PLD
                   Control Memory Size : 128 words (= 27)
Computer System Architecture                   Chap. 7 Microprogrammed Control                Dept. of Info. Of Computer
7-8



       Subroutine
                   Subroutines are programs that are used by other routines
                     » Subroutine can be called from any point within the main body
                       of the microprogram
                   Microinstructions can be saved by subroutines that use common
                   section of microcode
                     Memory Reference ,Operands Effective Address
                     Subroutine must have a provision for
                     » storing the return address during a subroutine call
                     » restoring the address during a subroutine return
                            Last-In First Out(LIFO) Register Stack




Computer System Architecture        Chap. 7 Microprogrammed Control   Dept. of Info. Of Computer
7-9



   Instruction Format
        Instruction Format :
                   » I : 1 bit for indirect addressing
                   » Opcode : 4 bit operation code
                   » Address : 11 bit address for system memory




   Microinstruction Format :




Computer System Architecture               Chap. 7 Microprogrammed Control   Dept. of Info. Of Computer
Microinstruction formats                                       7-10




Computer System Architecture        Chap. 7 Microprogrammed Control   Dept. of Info. Of Computer
7-11



                   2 bit Condition Fields : CD
                       »   00 : Unconditional branch, U
                       »   01 : Indirect address bit, I = DR(15)
                       »   10 : Sign bit of AC, S = AC(15)
                       »   11 : Zero value in AC, Z = AC = 0
                   2 bit Branch Fields : BR
                       » 00 : JMP
                                 Condition = 0 :   1 CAR ← CAR + 1
                                 Condition = 1 :   2 CAR ← AD
                       » 01 : CALL                                                      Save Return Address
                                 Condition = 0 :   1   CAR ← CAR + 1
                                 Condition = 1 :   2   CAR ← AD, SBR ← CAR + 1
                       » 10 : RET                      CAR ← SBR
                                                                                             Restore Return Address
                                                   3
                       » 11 : MAP                  4   CAR ( 2 − 5) ← DR (11 − 14), CAR(0, 1, 6) ← 0
                   7 bit Address Fields : AD
                       » 128 word : 128 X 20 bit




Computer System Architecture                       Chap. 7 Microprogrammed Control                       Dept. of Info. Of Computer
Micro-instruction Types                                        7-12



    Micro instruction are two type:
       1)vertical micro-programming
       2) horizontal micro-programming
       vertical micro-programming
      Each micro-instruction specifies single (or few)
       micro-operations to be performed
      horizontal micro-programming
      Each micro-instruction specifies many different
       micro-operations to be performed in parallel




                                                                     12
Computer System Architecture       Chap. 7 Microprogrammed Control    Dept. of Info. Of Computer
Vertical Micro-programming                                              7-13



    Width is narrow
    n control signals encoded into log2 n bits
    Limited ability to express parallelism
    Considerable encoding of control information requires external memory
    word decoder to identify the exact control line being manipulated


                    F1          F2     F3               Micro-instruction Address
                     Function Codes

                                             Jump
                                             Condition


                                     Vertical Micro-programming diag

                                                                              13
Computer System Architecture                Chap. 7 Microprogrammed Control    Dept. of Info. Of Computer
Horizontal Micro-programmed                                                    7-14




Internal CPU Control Signals                                 Micro-instruction Address


                               System Bus                Jump Condition
                               Control Signals
        Wide memory word
        High degree of parallel operations possible
        Little encoding of control information



Computer System Architecture       Chap. 7 Microprogrammed Control     Dept. of Info. Of Computer
QUESTION                                                7-15




Computer System Architecture   Chap. 7 Microprogrammed Control   Dept. of Info. Of Computer
7-16




Computer System Architecture   Chap. 7 Microprogrammed Control   Dept. of Info. Of Computer
7-17




Computer System Architecture   Chap. 7 Microprogrammed Control   Dept. of Info. Of Computer

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Microprogram Control

  • 1. Chap. 7 Microprogrammed Control(Control Unit) 7-1 7-1 Control Memory  Control Unit Initiate sequences of microoperations » Control signal (that specify microoperations) in a bus-organized system by the groups of bits that select the paths in multiplexers, decoders, and arithmetic logic units Two major types of Control Unit » Hardwired Control : The control logic is implemented with gates, F/Fs, decoders, and other digital circuits + Fast operation, - Wiring change(if the design has to be modified) is difficult. » Microprogrammed Control : The control information is stored in a control memory, and the control memory is programmed to initiate the required sequence of microoperations for an instruction + Any required change can be done by updating the microprogram in control memory, - Slow operation  Control Word The control variables at any given time can be represented by a string of 1’s and 0’s is called control world  Microprogrammed Control Unit A control unit whose binary control variables are stored in memory (control memory). Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 2. 7-2  Microinstruction : (Control Word in Control Memory) The instruction store in control memory is called microinstruction (specifies one or more microoperations )  Microprogram Microprogram is a sequence of microinstruction just like as program is a sequence of program. It is two type as follow: » Dynamic microprogramming : (Control Memory = RAM) RAM can be used for writing (to change a writable control memory) Microprogram is loaded initially from an auxiliary memory such as a magnetic disk » Static microprogramming : (Control Memory = ROM) Control words in ROM are made permanent during the hardware production. User Program Machine Instruction Microprogram Microinstruction Microoperation Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 3. Micro programmed Control Organization 7-3  Microprogrammed control Organization :( Fig. 7-1) 1) Control Memory » Computer Memory employs a micro programmed control unit which have two separate memory Main Memory : for storing user program (Machine instruction/data) Control Memory : for storing microprogram (Microinstruction) 2) Control Address Register » Specify the address of the microinstruction3) Sequencer (= Next Address Generator) » Determine the address sequence that is read from control memory » Next address of the next microinstruction can be specified several way depending on the sequencer input : p. 217, [1, 2, 3, and 4] Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 4. 7-4 Block Diagram of Microprogarmmed Control Memory 4) Control Data Register (= Pipeline Register ) » Hold the microinstruction read from control memory » Allows the execution of the microoperations specified by the control word simultaneously with the generation of the next microinstruction  Example(RISC Architecture Concept) RISC(Reduced Instruction Set Computer) system use hardwired control rather than microprogrammed control Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 5. Address Sequencing 7-5 7-2 Address Sequencing  Address Sequencing = Sequencer : Next Address Generator Selection of address for control memory  Routine Subroutine : program used by other ROUTINES Microinstruction are stored in control memory in groups With each group specify a routine. each computer instruction has it’s own micro program routine in control memory to generate microinstructions to execute an instruction.  Mapping : mapping of Instruction Code into Address in control memorywhere routine is located is called mapping process  Process of Address Sequencing : 1) Incrementing of the control address register 2) Unconditional branch or conditional branch, depending on status bit conditions 3) Mapping process ( bits of the instruction address for control memory ) 4) A facility for subroutine call and return Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 6. 7-6  Selection of address for control memory : Fig. 7-2 Multiplexer  CAR Increment In s t r u c t io n c o d e  JMP/CALL M a p p in g lo g ic  Mapping      Subroutine Return S ta tu s B ra n c h lo g ic MUX s e le c t M u lt ip le x e rs b it s CAR : Control Address Register S u b ro u tin e re g is e r » CAR receive the address from (S B R ) C o n tro l a d d re s s re g is te r C lo c k 4 different paths (C A R ) 1) Incrementer In c re m e n te r 2) Branch address from control memory 3) Mapping Logic C o n tro l m e m o ry 4) SBR : Subroutine Register SBR : Subroutine Register S e le c t a s t a t u s M ic ro o p e ra tio n s b it » Return Address can not be stored B ra n c h a d d re s s in ROM » Return Address for a subroutine is stored in SBR Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 7. 7-7  Conditional Branching Status Bits » Control the conditional branch decisions generated in the Branch Logic Branch Logic » Test the specified condition and Branch to the indicated address if the condition is met ; otherwise, the control address register is just incremented.  Mapping of Instruction : Opcode Computer Instruction 1 0 1 1 Address Mapping bits 0 x x x x 0 0 Microinstruction Address 0 1 0 1 1 0 0 4 bit Opcode = specify up to 16 distinct instruction Mapping Process : Converts the 4-bit Opcode to a 7-bit control memory address » 1) Place a “0” in the most significant bit of the address » 2) Transfer 4-bit Operation code bits » 3) Clear the two least significant bits of the CAR (Microinstruction ) Mapping Function : Implemented by Mapping ROM or PLD Control Memory Size : 128 words (= 27) Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 8. 7-8  Subroutine Subroutines are programs that are used by other routines » Subroutine can be called from any point within the main body of the microprogram Microinstructions can be saved by subroutines that use common section of microcode Memory Reference ,Operands Effective Address Subroutine must have a provision for » storing the return address during a subroutine call » restoring the address during a subroutine return Last-In First Out(LIFO) Register Stack Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 9. 7-9  Instruction Format Instruction Format : » I : 1 bit for indirect addressing » Opcode : 4 bit operation code » Address : 11 bit address for system memory  Microinstruction Format : Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 10. Microinstruction formats 7-10 Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 11. 7-11 2 bit Condition Fields : CD » 00 : Unconditional branch, U » 01 : Indirect address bit, I = DR(15) » 10 : Sign bit of AC, S = AC(15) » 11 : Zero value in AC, Z = AC = 0 2 bit Branch Fields : BR » 00 : JMP Condition = 0 : 1 CAR ← CAR + 1 Condition = 1 : 2 CAR ← AD » 01 : CALL Save Return Address Condition = 0 : 1 CAR ← CAR + 1 Condition = 1 : 2 CAR ← AD, SBR ← CAR + 1 » 10 : RET CAR ← SBR Restore Return Address 3 » 11 : MAP 4 CAR ( 2 − 5) ← DR (11 − 14), CAR(0, 1, 6) ← 0 7 bit Address Fields : AD » 128 word : 128 X 20 bit Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 12. Micro-instruction Types 7-12 Micro instruction are two type: 1)vertical micro-programming 2) horizontal micro-programming  vertical micro-programming Each micro-instruction specifies single (or few) micro-operations to be performed horizontal micro-programming Each micro-instruction specifies many different micro-operations to be performed in parallel 12 Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 13. Vertical Micro-programming 7-13 Width is narrow n control signals encoded into log2 n bits Limited ability to express parallelism Considerable encoding of control information requires external memory word decoder to identify the exact control line being manipulated F1 F2 F3 Micro-instruction Address Function Codes Jump Condition Vertical Micro-programming diag 13 Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 14. Horizontal Micro-programmed 7-14 Internal CPU Control Signals Micro-instruction Address System Bus Jump Condition Control Signals Wide memory word High degree of parallel operations possible Little encoding of control information Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 15. QUESTION 7-15 Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 16. 7-16 Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer
  • 17. 7-17 Computer System Architecture Chap. 7 Microprogrammed Control Dept. of Info. Of Computer