This document discusses the development of a new hardware unit and algorithm for edge detection in image processing, addressing issues such as time complexity, power consumption, and area requirements. The proposed approach builds on the traditional Sobel method but introduces optimizations for faster and more efficient computation by utilizing a novel filter mask and minimizing hardware usage. The implementation and verification of the proposed algorithm will be conducted using MATLAB and Verilog on a Xilinx simulator, with performance assessed using established image quality metrics.