15CS44 MP & MC Module 1

15CS44 Microcontrollers & Microprocessors
Kishore Kumar R RLJIT Page 1
Module-1
The x86 Microprocessor
Topics:
1.1 Brief History of the x86 family
1.2 Inside 8088/86
1.3 Introduction to Assembly Programming
1.4 Introduction to Program segments
1.5 The Stack
1.6 Flag register
1.7 x86 Addressing Modes
1.8 Assembler Directives & a sample Program
1.9 Assemble Link and Run a Program
1.10 Control Transfer Instructions
1.11 Data types & Data Definition
1.12 Full segment Definition
1.13 Flowcharts & Pseudo Code

1.1 Brief History of the x86 Family:
 In 1978 16-bit microprocessor called 8086 was introduced.
 This processor was a major improvement over previous generation 8080/8085 ( 8-bit
microprocessors, 64K bytes of memory)
 8086 was pipelined processor
Evolution from 8086 to 8088:
 8088 is identical to 8086 but it has 8-bit data bus instead of 16-bit data bus.
Success of 8088:
 In 1981, IBM picked up 8088 as their microprocessor of choice in designing the IBM PC
Other microprocessors: 80286, 80386, 80486
 In 1982 Intel introduced 80286, it has 16-data lines, 24 address lines and 16 Megabytes of
memory.
 80286 operates two modes i) real mode ii) protected mode
 In 1985, Intel introduced 80386 (32-bit microprocessor) with 32-bit data bus, 32-bit address lines,
its memory size 4 gigabytes.
 Intel introduced math co-processors 8087,80287 and 80387’
 In 1989, intel introduced enhanced version of 80386 with co-processor on single chip plus
additional features such as cache memory.
Pentium and Pentium pro:
 In 1992, pentium was introduced
 It has separate 8K cache memory for code and data
 It has 64-bit data bus, its registers are 32-bit
 4-giga bytes of memory
 In 1995, pro was intriduced it has 5.5 million transistors
Pentium II
 It has 7.5 million transistors and MMX featured ( multimedia exstension) technology for fast
graphics and audio processing
 In 1998 xeon procesor was released
Pentium III:
 Pentium III was released on 1999
 It has 9.5 million transistors
 It has 70 new instructions called SIMD that enhance video and audio performance in areas like 3-
D imaging
 Pentium III xeon was released in same year 1Ghz
Pentium IV:
 Speed of Pentium IV is 1.4 to 1.5 Ghz
 The new 32-bit architecture called NetBurst is designed for heavy multimedia processing such as
video, music and grpahics
Intel 64-bit architecture:

 Intel selected Itanium as the new name for first product in its 64-bit architecture formerly called
Merced
 Itanium can execute many instructions simultaneously plus extremely large memory capabilities.
1.2 Inside the 8088/86 or Architecture of 8086 (Very very important)
Internal structure of microprocessor is divided into two sections
1. Bus Interface unit (BIU)
2. Execution Unit (EU)
Bus interface unit: it accesses memory and peripherals.
Execution unit: It executes the instructions previously fetched.
Instruction Queue:
 It contains pre-fetched instructions.

 Instruction queue in 8088 in 4 bytes long
 Instruction queue in 8086 is 6 bytes long.
 Fetching next Instruction while current instruction is being executed is called Pipelining.
Registers:
 In CPU, registers are used to store data temporarily.
 There are six types of registers in 8088/ 8086 as shown in below table.
Registers of 8088/ 8086 by category
Category Bits Register Names
General 16
8
AX, BX, CX, DX
AH, AL, BH, BL, CH, CL, DH, DL
Pointer 16 SP (stack pointer), BP (Base Pointer)
Index 16 SI (source Index), DI (destination Index)
Segment 16 CS(code segment), DS (data segment)
SS (stack segment),ES (extra segment)
Instruction 16 IP (instruction pointer)
Flag 16 FR (flag register)
General purpose registers:
 General purpose registers can be used as either 16-bit or 8-bit registers as shown below
 There are four general purpose registers AX, BX, CX, DX
AH-AL  AX register
BH-BL  BX register
CH-CL  CX register
DH-DL  DX register
AX (Accumulator):
 AX is used to store the results of the arithmetic and logic operations.
BX (Base Index register):
 BX register is used to hold the OFFSET address of DATA segment.
 BX is addressable as BH and BL
AX
16-bit register
AH
8-bit register
AL
8-bit register

CX (counter):
 CX is used to hold the count for various instructions.
DX (data register):
 DX holds the part of the result from multiplication
 It holds the dividend for division
Segment Registers:
 Four segment registers in BIU are used to hold the upper 16 bits of the starting addresses of a
Segment.
CS, DS, ES, SS  Segment Registers.
 The segment will always start at an address with zero’s in the lowest 4 bits.
 The part of the segment starting address stored in a segment register is often called Segment
Base.
Instruction Pointer:
 The Instruction Pointer points to the next instruction
Pointer and Index registers:
 SP, BP, SI, DI are the different Pointer and Index Registers.
 These registers can be used for temporary storage of data just as the general purpose registers
described above.
 However, their main use is to hold the 16-bit offset of a data word in one of these segments.
Flag register:
 A 16-bit flag register indicates some condition produced by the execution of an instruction or
controls certain operations of the EU.
 It is a 16-bit register.
 It contains 9 active flags.
1.3 Introduction to Assembly Programming:
A program that consists of 0s and 1s is called machine language, it is difficult to write programs
in machine language, to make programming easier assembly language was developed.
Assembly language:
 Assembly language provides mnemonic for the machine codes.

 Assembly language programs must be translated into machine language by a program called
Assembler.
 Assembly language is low-level language.
 To write programs in assembly language, programmer must know the number of registers and
their size and other details of the CPU.
FORMAT of Assembly language instruction:
LABEL: Mnemonic Destination, source; comments
Label and comments are optional
MOV instruction:
 It copies data from one location to another
Format: MOV Destination, Source ; copy source operand to destination
The above instructions moves source operand to destination, MOV is Mnemonic for Move
operation.
e..g MOV AX, BX; it moves BX value to AX
MOV CL, 55H; it moves 55H to CL
MOV CH, BH ; it moves BH value to CH
MOV AX, 1234H; it moves 1234H to AX
MOV BL, 1234H; it is illegal, since 1234H (16-bit data) cannot be transferred to BL (8-bit)
Data cannot be moved directly into segment registers
e.g. MOV CS, 1234H ; it is illegal
Important points:
1. Values cannot be moved directly to any segment register (CS, DS, SS, ES)
2. 8-bit value can be moved to 16-bit register, the remaining 8-bits will be zero.
e.g. MOV AX, 12H; AX= 0012H
3. Moving 16-bit data to 8-bit register is illegal
e.g. MOV CL, 1234H ; illegal
ADD Instruction:
This instruction adds the source and destination operands and puts the result in destination.
Format: ADD Destination, Source
Operation: Destination = source + destination
E.g. write instructions to add 25H and 34H, move numbers to any registers and then add together
MOV AL, 25H; AL = 25H
MOV BL, 34H; BL=34H
ADD AL, BL; AL = 59H (25H + 34H)

e.g 2 : MOV CL, 12H; CL=12H
ADD CL, 13H; CL=25H (12H+13H)
In the above example, ADD CL, 13H, CL register has one value, and another value is specified
directly in the instruction, this second value (13H) is called as immediate operand.
Important points:
 Largest number that 8-bit register can hold is FFH
 To use numbers larger than FFH, 16- bit registers (AX, BX, CX, and DX) are used.
e.g. MOV AX, 34EH; AX=34EH
MOV DX, 6A5H; DX=6A5H
ADD DX, AX; DX=9F3H (34EH+6A5H)
1.4 Introduction to Program Segments:
An assembly language program has four segments
1. CODE Segment
2. DATA segment
3. STACK Segment
4. EXTRA segment
Code segment contains assembly language instructions
Data segment is used to store information (data)
Stack segment is used by CPU to store the data temporarily
Segments:
 In 8086, memory is divided into 16 segments.
 Each segment size is 64Kbytes.
 Starting of each segment ends with 0H e.g. 12340H
 Segment registers are used to hold upper 16-bits of the starting address of segment.
e.g. if code segment starting address is 123F0H, CS holds 123FH
Physical Address:
 It is 20-bit address, it is an actual address of physical location in 1Mbyte memory.
 The range of physical address is 00000H-FFFFFH.
e.g. 12AC3H is 20-bit physical address
Offset Address:
 It is 16-bit address, it an address of location within 64-Kbyte segment.
 The range of Offset address is 0000H-FFFFH
e.g. 12FFH is 16-bit offset address.

Logical address:
 It consists of segment value and an Offset address.
e.g. 1234H:0001H 1234H is segment value 0001H is offset address
Logical and physical address in Code segment:
 To execute an instruction, processor has to fetch an instruction from code segment.
 Logical address of an instruction always consists of a CS (code segment) and IP (instruction
pointer) shown in CS: IP format.
 IP contains Offset address
Steps to generate physical address:
 Shift CS left one hex digit
 Add IP to shifted CS
 The resulting 20-bit address is physical address.
 To find the lowest address add 0000H to shifted CS value.
 To find highest address add FFFFH to shifted CS value.
Example:
Logical address is given CS:IP = 2500H : 95F3H
Physical address is calculated as follows
Lowest memory location 25000+0000H = 25000H
Highest memory location  25000H + FFFFH= 34FFFH

Problem: If CS=24F6H and IP=634AH, find a) Logical address b) offset address c) physical address
d) Lower address e) higher address of the code segment
a) logical address  24F6H : 634AH
b) Offset address  634AH
c) physical address  2B2AAH ( 24F60H + 634AH)
d) lower address  24F60H (24F60H + 0000H)
e) higher address  34F5FH (24F60H + FFFFH)
Data Segment:
 In 8086 microprocessor, memory set aside for data is called Data segment.
 Data segment uses DS register and BX, SI, DI as Offset registers.
 Logical address of Data segment is shown as DS : OFFSET register
Steps to calculate Physical address of data segment:
 Shift DS value left by one hex digit
 Add shifted DS value to Offset
Example 1: Assume that DS is 5000 and the offset is 1950, calculate the physical address
Sol) DS : OFFSET = 5000:1950
1. Start with DS
2. Shift DS left by one hex digit
3. Add the offset to Shifted DS
5 0 0 0 0 + 1 9 5 0 = 51950
Example 2: If DS=7FA2H and the OFFSET is 438EH, calculate a) physical address b) Lower
range c) Upper range d) Logical address
a) Physical address = 83DAEH (7FA20H + 438EH)
b) Lower range = 7FA20H ( 7FA20H + 0000H)
c) Upper range = 8FA1FH ( 7FA20H + FFFFH)
d) Logical address = 7FA2H : 438EH
Problem : Assume that DS register is 578CH, to access a given byte of data at physical memory
location 67F66H, does data segment cover the range where the data resides? If not what
changes need to be made.
5 0 0 0
5 0 0 0 0

Sol) NO, this byte cannot be accessed because
Lower address = 578C0H (578C0H + 0000H)
Upper address=678BFH (578C0H + FFFFH)
Range is 578C0H – 678BFH
Since 67F66H is not in the range, to access byte, DS must be changed so that its range will include
that byte.
Problem: Assume memory locations with following contents DS:6826 = 48 and DS : 6827 = 22,
Show the contents of register BX in instruction “MOV BX, [6826]”
Sol) given that memory locations DS:6826 contain 48 and DS:6827 contain 22
DS:6827
DS:6826
The instruction MOV BX, [6826] moves 48 to BL 22 to BH BH BL
Memory Map of IBM PC:
 8086 Microprocessor has 1 Mbyte of memory with address range 00000H – FFFFH
 1 Mbyte of memory is allocated for different sections, this memory allocation is called
memory map.
 The memory map of IBM PC is shown in above figure.
22
48
22 48

 640 Kbytes from addresses 00000H – 9FFFFH are allocated for RAM.
 128 Kbytes from A0000H – BFFFFH are allocated for video memory.
 256 Kbytes from C0000H – FFFFFH are allocated for ROM.
RAM (Random access memory):
 This memory is also called as Main memory.
 Any Program must be loaded into Ram foe execution.
ROM (read only memory):
 C0000H – FFFFFH locations are used for ROM.
 64K bytes of Rom space from F0000H-FFFFFH are used fro BIOS ROM.
 ROM contains initialization programs.
Functions of BIOS (Basic input-output system)ROM:
 BIOS ROM is permanent memory.
 It holds the programs which tell CPU what to do when power is turned on.
 It also contains programs that allow windows to communicate with peripheral devices such as
keyboard, mouse.
 BIOS tests all devices connected to PC when power is turned on and report errors.
 After testing all devices BIOS will load windows operating system from hard disk to RAM
and hand over control of PC to windows.
Stack:
 It is section of RAM used by CPU to store information temporarily.
 CPU needs Stack since there are limited numbers of registers.
Disadvantage of Stack: it takes more time to access data from stack.
How stacks are accessed:
 Two registers are used to access stack, SS(stack segment) register and SP (stack pointer)
 Storing any register data into stack is called PUSH.
 Loading contents of stack into any register is called POP
 SP always points to top of the stack.
 SP is decremented when data is inserted into stack.
 SP is incremented when data is removed from the stack.

Example for Push operation:
As shown in the figure below, after every push operation the contents of register are saved on to
the stack and SP is decremented by 2. When 2 bytes are pushed onto stack, lower byte is always
stored in memory location with lower address, higher byte is stored in memory location with
higher address.
Example for POP operation:
As shown in the figure below, pop operation removes two bytes from stack, and increments the
stack pointer by 2

Logical address and physical address of stack segment:
 Logical address of stack segment is shown as SS:SP
 To calculate the physical address of stack segment
1. Shift SS left by one hex digit
2. ADD shifted SS with SP
Problem: IF SS=3500H and SP = FFFEH, find i) Physical address ii) Lower range iii) upper
range iv) show Logical address
Sol) i) physical address = 44FFEH (35000H + FFFEH)
ii) Lower range = 35000H (35000H + 0000H)
iii) Upper range = 44FFFH (35000H + FFFFH)
iv) Logical address = SS : SP = 3500H : FFFEH
Flag Register:
Flag register indicates some conditions produced by the execution of an instruction and controls
the operation of microprocessor.
8086 flag register:
 8086 MP has 16-bit flag register.
 It has six conditional flags and three control flags
Conditional flags:
The six conditional flags are
1. Carry flag (CF)
2. Parity flag (PF)
3. Auxiliary carry flag (AF)
4. Zero flag (ZF)

5. Sign flag (SF)
6. Overflow flag (OF)
Carry flag:
 Carry flag holds the carry after addition or the borrow after subtraction.
 It also indicates the error conditions.
Parity flag:
 Parity is the number of ones in a binary number expressed as even or odd.
 Parity flag is 0 for odd parity and logic 1 for even parity.
Auxiliary carry flag:
 Auxiliary carry flag holds the half carry after addition or the borrow after subtraction.
Zero flag:
 The Zero flag shows that the result of an arithmetic or logic operation is zero.
 If Z=1, the result is zero, if Z=0 the result is not zero.
Sign flag:
 The sign flag holds the sign of the result
 If S=1 the sign is negative, if S=0 the sign is positive.
Overflow flag:
 Overflow flag indicates that the result of arithmetic operation has exceeded the capacity of the
machine.
Control flags:
The three control flags are
1. Trap flag (TF)
2. Interrupt flag (IF)
3. Direction flag (DF)
Trap flag:
 Trap flag enables debugging feature.
 If T=1 debugging is enabled, if T =0 debugging is disabled.
Interrupt flag:

 Interrupt flag controls the operation of interrupt request.
 If I =1, interrupt request is enabled, if T=0 interrupt request is disabled.
Direction flag:
 Direction flag selects either the increment or decrement mode for the DI and SI registers during
string instructions.
 If D=1, the registers are automatically decremented, if D=0 the registers are automatically
incremented.
Flags affected by ADD instruction:
ADD instruction affects ZF, SF, PF, CF, AF
Problem: Show how flag register is affected by addition 38H and 2FH
Sol) MOV BH, 38H
ADD BH, 2FH
38H = 0 0 1 1 1 0 0 0
2FH = 0 0 1 0 1 1 1 1
67H = 0 1 1 0 0 1 1 1
CF =0 since there is carry out from MSB bit
AF=1 since there a carry from lower nibble to higher nibble
PF = 0 since there is an odd number of 1s in result
ZF=0 since result is not zero
SF =0 since MSB bit of the result is zero

X86 Addressing Modes: (very very Important)
Addressing modes:
The different ways in which the location of an operand is specified in an instruction are referred to
as addressing modes.
There are 7 addressing Modes
1. Register Addressing Mode
2. Immediate Addressing Mode
3. Direct Addressing Mode
4. Register Indirect Addressing Mode
5. Based Relative Addressing Mode
6. Indexed Relative Addressing Mode
7. Based Indexed relative Addressing Mode

Register addressing mode:
Register addressing mode uses registers to hold data.
e.g. MOV CX, DX ; contents of DX are moved to CX
Immediate Addressing Mode:
In immediate addressing mode source operand is constant.
e.g. MOV AX, 2550H; moves 2550H to AX
Direct Addressing Mode:
In direct addressing mode, data is in some memory location, address of memory location is
specified in instruction.
e.g. MOV DL, [2400H]; the data from memory location DS: 2400H is moved to DL
Problem on direct addressing mode:
Find the physical address of memory location and its contents after the execution of following
assuming that DS = 1512H
MOV AL, 99H
MOV [3518H], AL
Sol)
First 99H is moved to AL, then the contents of AL is moved to memory location with logical
address 1512H : 3518H
Physical address of the memory location = 18638H ( 15120H + 3518H)
Register Indirect Addressing Mode:
 In this addressing mode, register holds address of memory location where data resides.
 The registers used for holding address are SI, DI, and BX
 SI, DI and BX holds offset address, to generate physical address, offset address must be
combined with DS.
e.g. MOV AL, [BX] ; it moves data from memory location pointing by DS: BX to AL
Problem on Register Indirect addressing mode:
Assume that DS= 1120H, SI = 2498H and AX = 17FEH, show the contents of memory locations after
execution of “MOV [SI], AX”
Sol) the contents of memory location AX are moved to memory location with logical address
DS:SI
Hence physical address = 13698H ( 11200H + 2498H)
Since two bytes are moved, lower byte (FE)is moved to memory location 13698H and higher byte
17 is move to memory location 13699H

Based relative Addressing Mode:
 In this addressing mode, base registers BX, BP as well as displacement value are used to
calculate effective address.
 The default segments used for calculation of physical address are DS for BX and SS for BP
e.g. MOV CX, [BX] + 10 ; it moves data from memory location with address DS:BX+10 to CX
the above instruction can also be written as MOV CX, [BX+10] or MOV CX, 10[BX]
in the above example
Effective address = BX+10 , physical address = DS(shifted left) + Effective address
Indexed Relative addressing mode:
 In this addressing mode, index registers SI and DI as well as displacement value are used to
e.g. MOV DX, [SI] +5 ; Effective address = SI+5
Physical address = DS (shifted left) +effective address
This instruction moves data from memory location with address =DS(shifted left) + SI +5 to DX
Problem on Based relative addressing mode and Indexed relative addressing mode
Assume that DS =4500H, SS=2000H, BX=2100H, SI=1486H, DI = 8500H, BP = 7814H and
AX=2512H, show the exact physical memory location where AX is stored in each of the following
a) MOV [BX] +20, AX
b) MOV [SI] +10, AX
c) MOV [DI] +4, AX
d) MOV [BP] +12, AX
sol)
in each instruction
physical address = segment register(shifted left) + offset register + displacement
a) physical address = DS (shifted left) + BX+20 = 45000H + 2100H + 20H = 47120H
AX = 2512H, hence 12 will be moved to location 47120H and 25 will be moved to 47121H
b) physical address = DS (shifted left) + SI+10 = 45000H + 1486H + 10H = 46496H
AX = 2512H, hence 12 will be moved to location 46496H and 25 will be moved to 46497H
C) physical address = DS (shifted left) + DI+4 = 45000H + 8500H + 4H = 4D504H
AX = 2512H, hence 12 will be moved to location 4D504H and 25 will be moved to 4D505H
D) physical address = SS (shifted left) + BP+12 = 20000H + 7814H + 12H = 27826H
AX = 2512H, hence 12 will be moved to location 27826H and 25 will be move to 27827H

Based Indexed Addressing Mode:
In this addressing mode, base register and index register as well as displacement value are used to
e.g. MOV CL, [BX] [DI] +8 ; effective address = BX+DI +8
physical address = DS (shifted left) + effective address
In the above instruction data will be move from location with physical address = DS (shifted left)
+ effective address to CL
The above instruction can also be written as MOV CL, [BX+DI+8]
MOV AX, [SI][DI]+8 this instruction is illegal since both registers are index registers
Segment Override Prefix:
• Segment override prefix may be added to any instruction in any memory addressing mode.
• It allows the programmer to deviate from the default segment.
E.g. MOV AX, [DI]  this instruction access the data within the data segment
by default.
MOV AX, ES:[DI]
In the above instruction override prefix ES is added, hence this instruction accesses the
data in extra segment.
Instruction Segment Accessed Default segment
MOV AX, DS: [BP] DATA STACK
MOV AX, ES: [BP] EXTRA STACK
MOV AX,CS: LIST CODE DATA
MOV AX, ES: [SI] EXTRA DATA

Assembly language instruction Format:
[LABEL] : Mnemonic [Operands] [;Comment]
Label filed:
 label is symbolic name of the instruction.
 It is optional
 symbol : is used to separate the label and mnemonic
Mnemonic and operands:
 Mnemonic and operand field together performs the operation.
Comment:
 Comment field begins with symbol ;
 Comments are optional
Model Definition:
 .Model is directive used to select the size of the memory.
 SMALL, MEDIUM, COMPACT, LARGE are the memory models.
e.g. .MODEL SMALL ; this directive defines memory model as SMALL
.MODEL MEDIUM ; in this memory model, data should fit in 64Kbytes , Code can exceed 64Kbytes
.MODEL COMPACT; data can exceed 64Kbytes, Code cannot exceed 64Kbytes
.MODEL SMALL; 64 Kbytes for Data , 64Kbytes for Code
.MODEL LARGE; both data and code can exceed 64Kbytes
.MODEL TINY; both data and code must fit in 64Kbytes
Segment Definition
 8086 has four segment registers CS, DS, SS, ES
 Segment definition uses three directive .CODE, .DATA, .STACK.
.CODE  indicates beginning of code segment
.DATA indicates beginning of data segment
.STACK indicates beginning of stack segment
e..g .STACK 64 ; this directive reserves 64K bytes of memory for stack segment

Data Segment:
 In data segment, data items are declared
 Using directives DB, DW data items can be declared
 DB (Define Byte) declares data item of size byte
 DW(Define Word) declares data item of size word
Code segment:
 It is last segment in the program
 Instructions are written after .CODE directive
Sample program using model definition method
.MODEL SMALL
.DATA
MSG DB “RLJIT$”
.CODE
MOV AX, @DATA
MOV DS, AX
LEA DX, MSG
MOV AH,09H
INT 21H
END
Assemble Link and Run a program:
Three steps to create an executable assemble language program
1. Edit the Program
2. Assemble the program
3. Link the program

After editing the program, it must be assembled
Assembling the program:
 Translating assembly program to machine program is called assembling
 Assemble is the tool used for translation
 Assembler generates three files
1. .ASM file
2. .OBJ file
3. .LST file
4. .CRF file
.ASM file:
 it is a file created with editor
.OBJ file:
 MASM assembler converts .asm file ( assembly language instructions) into .obj file ( machine
language instructions)
.LST file:
 This file is optional
 It lists all the opcodes and OFFSET addresses of instructions
 To get LIST file TYPE FILENAME.lst | more
Note: MASM assumes that list file is not wanted (NUL.LST indicates no list file)
CRF file (cross reference file):
 This file contains list of all symbols and labels used in the program as well as program line
numbers in which they are specified.
PAGE directive: this directive tells the printer how the list file should be printed
Format: PAGE [LINES], [COLUMNS]
E.g. PAGE 60,132 ( default : 66 , 80)
TITLE Directive: this directive is used to assign the name to program
Format : TITLE name of the program
e.g. TITLE display a message
Linking the program: Linker is a program which produces executable file (.exe)
 .OBJ file is the input to LINK
 linker links mulitple .obj files to create .exe file ( executable file)
 linker produces .MAP file

.MAP file:
 It is optional file, It contains the following
1. name of each segment
2. start of segment
3. end of segment
4. size of segment
CONTROL Transfer Instructions:
There are three control transfer instructions
1. Conditional Jump
2. Unconditional Jump
3. Call
Conditional jump instructions:
• Conditional jump instructions transfers program control to the target location if some specified
condition is satisfied.
Following are the conditional Jump instructions

Unconditional jump:
There are three types of unconditional jumps.
1. Short jump
2. Near jump
3. Far jump
Short jump:
• JMP is the opcode for the short jump.
• Short jump is 2-byte instruction.
• The short jump displacement is a distance represented by a 1-byte signed number whose value
ranges between -128 and -+27.
• Jump to a memory location in same segment is called intrasegment jump, short jump is
intrasegment
Near jump:
• JMP is the opcode for the near jump.
• Near jump is 3-byte instruction, that contains an opcode followed by a signed 16-bit
displacement.
• Near jump transfers control to an instruction in the current code segment located within ± 32
Kbytes from the near jump instruction.
• Signed displacement is added to instruction pointer to generate the target address.
Far jump:
• JMP is the opcode for the FAR jump.
• FAR jump is 5-byte instruction, bytes 2 and 3 contains new offset address and bytes 4 and 5
contain the new segment address.
• Jump from one segment to another segment is called intersegment jump, Far Jump is
intersegment.
CALL:
Call instruction transfers control to the procedure.
There are two types of call.
1. Near call
2. Far call
Near call:
• Near call instruction is 3 bytes long.
• First byte contains the opcode, and the second and third bytes contain the displacement.
• Near call instruction pushes the offset address of the next instruction onto the stack.
• After saving return address in stack it adds the displacement to IP to transfer control to the
procedure.
Far call:
• Far call is 5-byte instruction.

• First byte contains opcode.
• Second and third bytes contain the new contents of IP.
• Bytes 4 and 5 contain new contents for CS.
• The far call instruction places the contents of both IP and CS on stack before jumping to the
procedure.
Rules for names in Assembly Language:
 Each label name must be unique
 The first character of the name must be an alphabetic character or special character but not digit.
Data types and Data definition:
Data types of 8086 processor are
1. 8-bit (byte)
2. 16-bit (word)
3. 32-bit (double word)
4. 64-bits (Quad word)
Assembler Data directives:
To define data, following assembler directives are used
1. DB (define Byte)
2. DW ( Define Word)
3. DD ( Define Double Word)
4. DQ (define Quad Word)
5. DT (define Ten Bytes)
DB (define byte):
 It defines the variable of type BYTE.
 It reserves one or more byte locations in memory.
Format: variable-name DB Initialization values
E.g. NUM DB 10H; this statement reserves one byte location for a variable name NUM
and initialize the value 10.
NUM
NUM DB ? ; this statement reserves one byte location for variable NUM and not initialized.
10

DW (define word):
 It defines a variable of type word.
 Word ( two bytes).
 It reserves one or more word locations in memory.
Format: variable-name DW initialization values
E.g. DATA DW 1234H; this statement reserves one word location and initializes the
the value 1234H.
DATA
DD (define double word):
• It defines a variable of type double word.
• Double word (4 bytes)
• It reserves one or more double word locations in memory .
Format: variable-name DD initialization values
e.g. DATA DD 12345678H; it reserves double word location and initializes with
12345678H.
DATA
DT (define ten bytes):
• This directive defines a variable of type ten bytes.
Format : variable-name DT initialization values
e.g. TOTAL DT 0; this statement reserves ten bytes and initializes with 0.
DQ (define quad word):
• It defines a variable of type quad word.
• Quad Word ( 8 bytes).
• It reserves one or more quad word locations in memory.
Format : variable-name DQ initialization values
12
34
34
12
34
56
78

e.g. TOTAL DQ 0
TOTAL
DUP:
• It creates an array of size n.
e.g. LIST DB 10 DUP (?)  reserves 10 byte locations
DATA DW 100 DUP (0)  reserve 100 word locations and
initializes with 0
EQU:
• This directive equates the constant value to the label.
• Each time the assembler finds the label in the program, it will replace the name with the value
equated to that label.
e.g. TEN EQU 10
NINE EQU 9
MOV AL, TEN; AL =10
MOV BL, NINE; AL=9
ORG (origin):
• This directive assigns the starting OFFSET address.
Format: ORG OFFSET address.
e.g. ORG 100H; this statement assigns 100 as starting offset address.
00
00
00
00
00
00
00
00

Full Segment Definition:
This is another method to define the segments in the program.
Segment definition
To define the segment, directives SEGMENT and ENDS are used.
Segment Directive
• This directive is used to indicate the beginning of a logical segment.
• This directive follows the name of the segment.
Format: Segment-name SEGMENT
e.g. MYDATA SEGMENT; MYDATA is the segment name.
ENDS:
ENDS:
• This directive indicates the end of the segment.
• This directive follows the name of the segment.
Format: Segment-name ENDS
e.g. MYDATA ENDS
Example: defining the data segment using full segment definition method
MYDATA SEGMENT
LIST DB 10H
STRING DB “Welcome to MP lab$”
MYDATA ENDS
Example: defining the code segment using full segment definition method
MYCODE SEGMENT
MOV AX,@DATA
MOV DS, AX
MYCODE ENDS

Flow Charts and Pseudocode:
Flowchart:
 Flowchart uses graphical symbols to represent different types of program operations.
 Symbols are connected together into flow chart to show the flow of program.
 The figure below shows most commonly used symbols
Limitations of flowchart:
 We cannot write much information in little boxes
 Flowchart is bigger for big programs
Commonly used flow chart symbols are

Control Structures:
Structured programming uses three types of program structures
1. Sequence programming structure
2. Control programming structure
3. Iteration programming structure
Control programming structure:
Two types
i) IF – THEN
ii) IF – THEN - ELSE

Flow chart and pseudo code for IF- THEN:
Flow chart and pseudo-code for IF-THEN-ELSE

Iteration programming structure:
Two types
1) REPEAT – UNTIL
2) WHILE-DO
REPEAT -UNTIL
WHILE-DO:

Draw flow chart and write pseudocode to add 5 bytes
Program to add 5 bytes of data

Important Questions
1. Explain the evolution (history) of Intel processor
2. Draw and explain internal block diagram of 8086/ 8088 CPU
3. Explain the flag register of 8086
4. distinguish between Logical address, Physical address and OFFSET address
Logical address is shown as Segment register value : Offset address
Physical address is the address of the physical location, it is calculated by shifted segment register value
left by one hex digit and adding offset value to shifted segment value
Offset address : it is distance of particular location from the base of the segment
5. what is segment override prefix, explain
6. what are assembler directives? Explain the following assembler directives i) .MODEL ii) .STACK
iii) .DATA
Assembler directives (pseudo instructions):
 Assembler directives are the instructions to the assembler.
 Assembler directives are not translated into the machine language.
 Directives control the generation of machine code and organisation of the program.
7. with flow chart and pseudocode write an ALP to add 5 bytes of data
8. What is stack? Exaplain pushing and popping data from stack
9. if SS= 3500H and SP = FFFEH, find physical address, lower range, upper range, Logical address
10. Explain pipelining
11. IF CS=24F6H and IP=634AH, find logical address, offset address, physical address, Lower range and
upper range of code segment
12. Explain short, near and Far unconditional jump instructions with examples.

15CS44 MP & MC Module 1

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15CS44 MP & MC Module 1