3D-DRESD CiTiES
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The document discusses different communication infrastructures (CIs) like point-to-point, bus, and Network-on-Chip (NoC). It then proposes an approach that has a fixed part and reconfigurable slots that can be configured with computational or CI modules at runtime to adapt the CI. The approach can adapt to different CIs and is demonstrated with a complete example. Future work includes exploring the sizes of the fixed part, slots, and CIs.
3D-DRESD CiTiES
- 1. CITiES .:: Project Presentation ::.
- 2. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 3. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 4. Point-to-Point Point-to-point interconnections Regular/Uniform Well-defined interconnection topology (e.g. full connected graph) Flexibility and regularity, but area overhead Custom Ad-hoc interconnection: high-performance and low overhead Point-to-point do not scale well, since adding channels requires adding more physical wires 4
- 5. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 6. Bus (1/3) A bus is a set of spatially adjacent links They define a single , shared communication channel ( bus transparency ) Access to a bus is concurrent, thus contention resolution is required An arbiter manages concurrent access requests and assigns the resource to the user Area and computational overhead Different kind of bus Hierarchical e.g. IBM CoreConnect Split-bus Reduce capacity load 5
- 7. Bus (2/3) Hierarchical bus The logical communication infrastructure is divided into subdomains Each domain is independent to the others A bridge is used to connect different, independent domains 6
- 8. Bus (3/3) Split bus Reduce capacity load seen from the user interface Each segment can be used to address different domains in the system 7
- 9. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 10. Network-on-Chip (1/4) GENERAL IDEA : borrow theories and applications from the well-known data communication field, e.g. LAN, WAN, MAN... On-chip network RATIONALE : to achieve high-performance communication we need Reliability Scalability Flexibility Adaptability Repeatability, ease-to-reuse approach Regular structures and concepts 8
- 11. Network-on-Chip (2/4) XPIPES , first true NoC architecture used for multiprocessing elements based SoC Highly-parameterizable static NoC with several high-performance issues Pipelined inter-router connections IN/OUT buffering Reliable communication through communication protocols It is defined by a library of network element macros (SystemC defined) XPIPES COMPILER , reads the library, reads the user inputs and generate a Verilog instantiable NoC architecture 9
- 12. Network-on-Chip (3/4) Layered approach to design allows independent optimization Separation of concerns Flexibility XPIPES is based on the Smart Stack Assumptions The physical layer has non-zero probability of error We have to achieve a threshold of reliability Packet-switched network End-to-end delivery control based on the use of network elements 10
- 13. Network-on-Chip (4/4) Smart Stack layered structure ( bottom-up ) 11 DATA LINK LAYER NETWORK LAYER TRANSPORT LAYER Increase reliability of the link (ARQ, FEC) End-to-end delivery control Decomposes messages into packets
- 14. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 15. General overview The proposed approach consists of: a fix part a set of reconfigurable slots
- 16. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 17. Fix part The fix part consists of: a set of computational components a set of CI components These components cannot be reconfigure at run time, since they have to provide a reliable communication channel between the reconfigurable slots
- 18. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 19. Reconfigurable slots Each slot can be filled with: a computational module a communication module Both these two kind of slot share the same interface, since they have to be interchangeable at run time
- 20. Computational modules Computational modules do not interfere with the communication infrastructure wires This is possible thanks to the Early Access Partial Reconfiguration (EAPR) flow Computational module logic can use all the resources that are not occupied by the CI logic
- 21. CI modules CI modules can either use the CI wires in order to change their routing or leave them unchanged In this way it is possible to dynamically change the CI in order to achieve the desired configuration of communication channels
- 22. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 24. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 26. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 28. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 30. Outline Standard Communication Infrastructures (CIs): Point-to-point Bus Network-on-Chip (NoC) The proposed approach: General overview Fix part Reconfigurable slots A complete example Adaptation to point-to-point Adaptation to bus Adaptation to NoC Conclusions and future work
- 31. Conclusions and future work The proposed approach is just a draft In order to use the proposed ideas, it is necessary to explore: the size of the fix part of the architecture the size of each reconfigurable slot the number of slices occupied for the CI for each reconfigurable slot
- 32. The end Thank you for your attention Do you have any questions?