This document presents a new adaptive phase locked loop (PLL) scheme that controls the loop bandwidth according to the locking status. It has two modes - a wide bandwidth mode for fast locking and a narrow bandwidth mode for minimizing output jitter. It achieves this by adaptively controlling the charge pump current, increasing it for wide bandwidth and decreasing it for narrow bandwidth. Simulation results show the adaptive PLL locks faster than a standard PLL and has lower phase noise. The adaptive scheme provides benefits of both fast locking and low noise with a simple design.