The document discusses the Pisces lightweight co-kernel architecture designed to achieve performance isolation in high-performance computing (HPC) environments by enabling multiple independent software stacks on the same hardware node. It addresses challenges related to massive data movement and OS noise in traditional HPC setups, and introduces techniques for dynamic resource assignment and communication between different kernels. The evaluation shows that the Pisces architecture provides optimized execution environments for in situ processing and maintains consistent performance across workloads.