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EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 1 of 12 2007/09/12
FEATURES
• Wide supply voltage range 6.5V ~ 18V
• Rail-to-rail output swing (The highest two
stage & lowest two stage)
• High slew rate 1V/µs
• GBWP 1 MHz
• 2 MHz -3dB Bandwidth
• Large Vcom Drive Current: ±100mA(Max)
• Ultra-small Package TQFP-48
APPLICATIONS
• TFT-LCD Reference Driver
GENERAL DESCRIPTION
The EC5575 is a 14+1 channel voltage
buffers that buffers reference voltage for
gamma correction in a thin film transistor
liquid crystal display (TFT LCD). This
device incorporating a Vcom amplifier
circuits, four rail to rail buffer amplifier
circuits (the highest two stage and lowest
two stage) and 10 buffer amplifiers circuits.
The EC5575 is available in a space saving
48-pin TQFP package, and the operating
temperature is from –20°C to +85°C.
PIN ASSIGNMENT ( E Type )
Li Ki Ji Ii Hi Vss VDD Gi Fi Ei Di Ci
Bi
Ai
VDD
Vss
Ao
Vss
Bo
N.C
N.C
VDD
N.C
Co
DoEoFoGoVDDVssHoIoJoKoLoMo
No
Vcomo
Vss
VDD
N.C
N.C
N.C
Vss
VDD
Mi
Ni
Vcomi
Ai
Ao
Bi
Bo
Ci
Co
Di
Do
Ei
Eo
Fi
Fo
Gi
Go
Hi
Ho
Ii
Io
Ji
Jo
Ki
Ko
Li
Lo
Mi
Mo
Ni
No
ComiComo
1 2 3 4 5 6 7 8 9 10 11 12
13
14
15
16
17
18
19
20
21
22
23
24
252627282930313233343536
37
38
39
40
41
42
43
44
45
46
47
48
A, B, M, N: Rail to Rail OPAMPs
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 2 of 12 2007/09/12
PIN ASSIGNMENT ( E2 Type )
Ordering Information
Part No. Top Mark Package Description
EC5575-F AS15-F TQFP48 14+1 lead-free
EC5575-G AS15-G TQFP48 14+1 Green Package
EC5575-FR AS15-F TQFP48 14+1 lead-free; (R) : Tape & reel
EC5575-GR AS15-G TQFP48 14+1 Green Package; (R) : Tape & reel
EC5575-HF AS15-HF TQFP48 14+1 lead-free ( H )
EC5575-HG AS15-HG TQFP48 14+1 Green Package ( H )
EC5575E2-F AS15E2-F TQFP48 14+1 (pin40 is Vcom-) lead-free
EC5575E2-G AS15E2-G TQFP48 14 channel (pin40 is Vcom-)Green Package
EC5575E2-HF AS15E2-HF TQFP48 14+1 (pin40 is Vcom-) lead-free ( H )
EC5575E2-HG AS15E2-HG TQFP48 14 channel (pin40 is Vcom-)Green Package (H)
Note: (H): Exposed pad (3.05x3.05 mm) ; (R) : Tape & reel
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 3 of 12 2007/09/12
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)
Values beyond absolute maximum ratings may cause permanent damage to the
device. These are stress ratings only; functional device operation is not implied.
Exposure to AMR conditions for extended periods may affect device reliability.
Supply Voltage between VS+ and VS-
Input Voltage (For rail-to-rail ) VS--0.5V,
Maximum Continuous Output Current (A ~ N uffers)
Maximum Continuous Output Current(Com Buffer)
Maximum Die Temperature
+18V
VS ++0.5V
30mA
100mA
+150°C
Storage Temperature
Operating Temperature
Lead Temperature
ESD Voltage
-65°C to +150°C
-20°C to +85°C
260°C
2kV
Important Note:
All parameters having Min/Max specifications are guaranteed. Typical values are for information
purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests,
therefore: TJ = TC = TA
ELECTRICAL CHARACTERISTICS
VS+= +5V, VS - = -5V, RL = 10kΩ and CL = 10pF to 0V, TA = 25°C unless otherwise specified.
Parameter Description Condition Min Typ Max Units
Input Characteristics
VOS Input Offset Voltage VCM= 0V 2 12 mV
TCVOS Average Offset Voltage Drift [1] 5 µV/°C
IB Input Bias Current VCM= 0V 2 50 nA
RIN Input Impedance 1 G 
CIN Input Capacitance 1.35 pF
Output Characteristics
VOL Output Swing Low IL= -5mA (A, B, M, N rail-to-rail Buffers) -4.92 -4.85 V
VOH Output Swing High IL= 5mA (A, B, M, N rail-to-rail Buffers) 4.85 4.92 V
VOL Output Swing Low IL= -5mA (C ~ L Buffers) -3.5 V
VOH Output Swing High IL= 5mA (C ~ L Buffers) 3.5 V
ISC Short Circuit Current (A ~ N Buffers) ±120 mA
IOUT Output Current (A ~ N Buffers) ±30 mA
ISC(Com) Short Circuit Current (Com Buffer) ±300 mA
IOUT(Com) Output Current (Com Buffer) ±100 mA
Power Supply Performance
PSRR Power Supply Rejection Ratio VS is moved from ±3.25V to ±7.75V 60 80 dB
IS Supply Current (Per Amplifier) No Load (A ~ N Buffers) 500 750 µA
IS(Com) Supply Current (Com Buffer) 5 mA
Dynamic Performance
SR Slew Rate [2] -4.0V≦VOUT≦4.0V, 20% to 80% 1 V/µs
tS Settling to +0.1% (AV = +1) (AV = +1), VO=2V Step 5 µs
BW -3dB Bandwidth RL = 10KΩ, CL = 10PF 2 MHz
PM Phase Margin RL = 10KΩ, CL = 10PF 60 Degrees
CS Channel Separation f = 1 MHz 75 dB
1. Measured over operating temperature range
2. Slew rate is measured on rising and falling edges
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 4 of 12 2007/09/12
TYPICAL PERFORMANCE CURVES
0
250
500
750
1000
1250
1500
1750
-15
-13
-11
-9
-7
-5
-3
-1
1
3
5
7
9
11
13
15
Input Offset(mV)
Quantity(Amplifiers)
Figure (a) Input Offset Voltage Distribution Figure (b) Input beyond the rails
Figure (c) Rail to Rail Capability igure (d) Large Signal Transient Response
Figure (e) Large Signal Transient Response Figure (f) Small Signal Transient Response
VCC = 10V , F :10K
VCC = 10V , F :10K VCC = 10V , F :1K
VCC = 10V , F :1K VCC = 10V , F :1K
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 5 of 12 2007/09/12
TYPICAL PERFORMANCE CURVES
Figure (g) Open Loop Gain & Phase vs. Frequency Figure (h) Frequency Response for Various CL
Figure (h) Frequency Response for Various RL
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 6 of 12 2007/09/12
APPLICATIONS INFORMATION
Product Description
The EC5575 rail-to-rail quad channels amplifier is
built on an advanced high voltage CMOS process. It’s
beyond rails input capability and full swing of output
range made itself an ideal amplifier for use in a wide
range of general-purpose applications. The features
of 1µS high slew rate, fast settling time, 2MHz of
GBWP as well as high output driving capability have
proven the EC5575 a good voltage reference buffer in
TFT-LCD for grayscale reference applications. High
phase margin and extremely low power consumption
(500µA per amplifier) make the EC5575 ideal for
Connected in voltage follower mode for low power
high drive applications
Supply Voltage, Input Range and Output Swing
The EC5575 can be operated with a single nominal
wide supply voltage ranging from 6.5V to 18V with
stable performance over operating temperatures of
-20 °C to +85 °C.
With 500mV greater than rail-to-rail input common
mode voltage range and 75dB of Common Mode
Rejection Ratio, the EC5575 allows a wide range
sensing among many applications without having any
concerns over exceeding the range and no
compromise in accuracy. The output swings of the
EC5575 typically extend to within 80mV of positive
and negative supply rails with load currents of 5mA.
The output voltage swing can be even closer to the
supply rails by merely decreasing the load current.
Figure 1 shows the input and output waveforms for
the device in the unity-gain configuration. The
amplifier is operated under ±5V supply with a 10k.
load connected to GND. The input is a 10Vp-p
sinusoid. An approximately 9.985 Vp-p of output
voltage swing can be easily achieved.
Figure 1. Operation with Rail-to-Rail Input and Output
Output Short Circuit Current Limit
A +/-120mA short circuit current will be limited by the
EC5575 if the output is directly shorted to the positive
or the negative supply. For an indefinitely output short
circuit, the power dissipation could easily increase
such that the device may be damaged. The internal
metal interconnections are well designed to prevent
the output continuous current from exceeding +/-30
mA such that the maximum reliability can be well
maintained.
Output Phase Reversal
The EC5575 is designed to prevent its output from
being phase reversal as long as the input voltage is
limited from VS--0.5V to VS+ +0.5V. Figure 2 shows
a photo of the device output with its input voltage
driven beyond the supply rails. Although the phase of
the device's output will not be reversed, the input's
over-voltage should be avoided. An improper input
voltage exceeds supply range by more than 0.6V may
result in an over stress damage.
Figure 2. Operation with Beyond-the Rails Input
Power Dissipation
The EC5575 is designed for maximum output current
capability. Even though momentary output shorted to
ground causes little damage to the device.
For the high drive amplifier EC5575, it is possible to
exceed the 'absolute-maximum junction temperature'
under certain load current conditions. Therefore, it is
important to calculate the maximum junction
temperature for the application to determine if load
conditions need to be modified for the amplifier to
remain in the safe operating area. The maximum
power dissipation allowed in a package is determined
according to:
JA
AmaxJmax
Dmax
T-T
P
Θ
=
Where:
TJmax = Maximum Junction Temperature
TAmax= Maximum Ambient Temperature
ΘJA = Thermal Resistance of the Package
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 7 of 12 2007/09/12
PDmax = Maximum Power Dissipation in the Package.
The maximum power dissipation actually produced by
an IC is the total quiescent supply current times the
total power supply voltage, plus the power in the IC
due to the loads, or:
PDmax =∑i[VS * ISmax + (VS+ – VO) * IL]
When sourcing, and
PDmax = ∑i[VS * ISmax + (VO – VS-) * IL]
When sinking.
Where:
i = 1 to 4
VS = Total Supply Voltage
ISmax = Maximum Supply Current Per Amplifier
VO = Maximum Output Voltage of the Application
IL= Load current
RL= Load Resistance = (VS+ – VO)/IL = (VO – VS-)/ IL
A calculation for RL to prevent device from overheat
can be easily solved by setting the two PDmax
equations equal to each other.
Pin
Count
Θja
(oC/W)
Θjc
(C/W)
TQFP-48 67 31 Normal
TQFP-48 31 15 EXPOSED PAD
1V
Driving Capacitive Loads
The EC5575 is designed to drive a wide range of
capacitive loads. In addition, the output current
handling capability of the device allows for good
slewing characteristics even with large capacitive
loads. The combination of these features make the
EC5575 ideally for applications such as TFT LCD
panel grayscale reference voltage buffers, ADC input
amplifiers, etc.
As load capacitance increases, however, the -3dB
bandwidth of the device will decrease and the
peaking increase. The amplifiers drive 10pF loads in
parallel with10KΩ. with just 1.5dB of peaking, and
100pF with 6.4dB of peaking. If less peaking is
desired in these applications, a small series resistor
(usually between 5Ωand 50Ω) can be placed in
series with the output. However, this will obviously
reduce the gain slightly. Another method of reducing
peaking is to add a "snubber" circuit at the output. A
snubber is a shunt load consisting of a resistor in
series with a capacitor. Values of 150Ω and 10nF
are typical. The advantage of a snubber is that it
improves the settling and overshooting performance
while does not draw any DC load current or reduce
the gain.
Power Supply Bypassing and Printed Circuit
Board Layout
With high phase margin, the EC5575 performs stable
gain at high frequency. Like any high-frequency
device, good layout of the printed circuit board usually
comes with optimum performance. Ground plane
construction is highly recommended, lead lengths
should be as short as possible and the power supply
pins must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, where
the VS- pin is connected to ground, a 0.1 µF ceramic
capacitor should be placed from VS+ pin to VS- pin as
a bypassing capacitor. A 4.7µF tantalum capacitor
should then be connected in parallel, placed in the
region of the amplifier. One 4.7µF capacitor may be
used for multiple devices. This same capacitor
combination should be placed at each supply pin to
ground if split supplies are to be used.
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 8 of 12 2007/09/12
Application Circuits
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 9 of 12 2007/09/12
PACKAGE MARKING INDICATION (PACKAGE TYPE TQFP 48)
LEAD FREE TQFP48 ( MAKING )
1
13
25
37
1
37
AS15
DATE CODE
Lot. Number
AS15-F
DATE CODE
Lot. Number
13
25
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 10 of 12 2007/09/12
OUTLINE DIMENSIONS (Dimensions shown in millimeters)
7.0 ± 0.10
9.0 ± 0.20
7.0±0.10
9.0±0.20
1 12
13
24
48
37
36 25
0.50
0.21 ± 0.04
1.0±0.06
1.2max.
1.00 BSC.
0.6 ± 0.15
3.5o ± 3o
0.15 ± 0.05
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 11 of 12 2007/09/12
OUTLINE DIMENSIONS
H: Exposed pad (3.05x3.05 mm)
EC5575
14+1 Channel Voltage Buffers for TFT LCD
E-CMOS Corp. (www.ecmos.com.tw) Page 12 of 12 2007/09/12
General Disclaimer:
1. Product information and specifications furnished by E-CMOS in this data sheets are in effect
as of the publication date shown and are believed to be accurate and reliable. However, no
responsibility is assumed by E-CMOS for the use of any information shown herein, nor for
any patent or other rights infringement.
2. No license is granted by implication or otherwise under any patent or industrial properties
owned by E-CMOS or any third party through this document.
3. The information herein is subject to change at any time without notice.
4. Neither reproduction nor duplication of this document, in any form, the whole or part is
allowed without the prior written approval from E-CMOS.
5. Products of E-CMOS Corp., unless otherwise specified, are not authorized for use as critical
components of any device or equipment in applications that demand extremely high reliability
or where its failure or malfunction may directly threaten human life or cause risk of bodily
injury, such as aerospace, aircraft, vehicles, nuclear power, radiation resistant system,
transportation, disaster prevention equipment, gas related equipment, physical exercise
equipment, safety equipment and medical equipment for life support, etc.
6. Although E-CMOS makes every attempt to ensure that its products are of high quality and
reliability, thorough consideration of safety design and operating within the ranges
guaranteed are strongly recommended to prevent any accident and damage that may ensue.
E-CMOS bares no responsibility for failure or damage when abused or used beyond the
guaranteed ranges.
7. Products applied to life support devices and systems are strongly requested to contact
E-CMOS Corporation headquarter for the written approval to establish suitable terms &
conditions. E-CMOS’ warranty is limited to replacement of defective components. Any
personal injury or death or any other consequential damages of property are not covered.
Copyright © 2002 by E-CMOS Corporation.
E-CMOS CORPORATION IC DATASHEET
ADDRESS: NO.1, CREATION RD. 2ND
, SCIENCE-BASED INDUSTRIAL
PARK, HSIN-CHU 300, TAIWAN, R.O.C.
WEBSITE: http://www.ecmos.com.tw
E-MAIL: mailto:sales@ecmos.com.tw
TEL: 886-3-5785888
FAX: 886-3-5783630

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As15 f

  • 1. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 1 of 12 2007/09/12 FEATURES • Wide supply voltage range 6.5V ~ 18V • Rail-to-rail output swing (The highest two stage & lowest two stage) • High slew rate 1V/µs • GBWP 1 MHz • 2 MHz -3dB Bandwidth • Large Vcom Drive Current: ±100mA(Max) • Ultra-small Package TQFP-48 APPLICATIONS • TFT-LCD Reference Driver GENERAL DESCRIPTION The EC5575 is a 14+1 channel voltage buffers that buffers reference voltage for gamma correction in a thin film transistor liquid crystal display (TFT LCD). This device incorporating a Vcom amplifier circuits, four rail to rail buffer amplifier circuits (the highest two stage and lowest two stage) and 10 buffer amplifiers circuits. The EC5575 is available in a space saving 48-pin TQFP package, and the operating temperature is from –20°C to +85°C. PIN ASSIGNMENT ( E Type ) Li Ki Ji Ii Hi Vss VDD Gi Fi Ei Di Ci Bi Ai VDD Vss Ao Vss Bo N.C N.C VDD N.C Co DoEoFoGoVDDVssHoIoJoKoLoMo No Vcomo Vss VDD N.C N.C N.C Vss VDD Mi Ni Vcomi Ai Ao Bi Bo Ci Co Di Do Ei Eo Fi Fo Gi Go Hi Ho Ii Io Ji Jo Ki Ko Li Lo Mi Mo Ni No ComiComo 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 252627282930313233343536 37 38 39 40 41 42 43 44 45 46 47 48 A, B, M, N: Rail to Rail OPAMPs
  • 2. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 2 of 12 2007/09/12 PIN ASSIGNMENT ( E2 Type ) Ordering Information Part No. Top Mark Package Description EC5575-F AS15-F TQFP48 14+1 lead-free EC5575-G AS15-G TQFP48 14+1 Green Package EC5575-FR AS15-F TQFP48 14+1 lead-free; (R) : Tape & reel EC5575-GR AS15-G TQFP48 14+1 Green Package; (R) : Tape & reel EC5575-HF AS15-HF TQFP48 14+1 lead-free ( H ) EC5575-HG AS15-HG TQFP48 14+1 Green Package ( H ) EC5575E2-F AS15E2-F TQFP48 14+1 (pin40 is Vcom-) lead-free EC5575E2-G AS15E2-G TQFP48 14 channel (pin40 is Vcom-)Green Package EC5575E2-HF AS15E2-HF TQFP48 14+1 (pin40 is Vcom-) lead-free ( H ) EC5575E2-HG AS15E2-HG TQFP48 14 channel (pin40 is Vcom-)Green Package (H) Note: (H): Exposed pad (3.05x3.05 mm) ; (R) : Tape & reel
  • 3. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 3 of 12 2007/09/12 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C) Values beyond absolute maximum ratings may cause permanent damage to the device. These are stress ratings only; functional device operation is not implied. Exposure to AMR conditions for extended periods may affect device reliability. Supply Voltage between VS+ and VS- Input Voltage (For rail-to-rail ) VS--0.5V, Maximum Continuous Output Current (A ~ N uffers) Maximum Continuous Output Current(Com Buffer) Maximum Die Temperature +18V VS ++0.5V 30mA 100mA +150°C Storage Temperature Operating Temperature Lead Temperature ESD Voltage -65°C to +150°C -20°C to +85°C 260°C 2kV Important Note: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA ELECTRICAL CHARACTERISTICS VS+= +5V, VS - = -5V, RL = 10kΩ and CL = 10pF to 0V, TA = 25°C unless otherwise specified. Parameter Description Condition Min Typ Max Units Input Characteristics VOS Input Offset Voltage VCM= 0V 2 12 mV TCVOS Average Offset Voltage Drift [1] 5 µV/°C IB Input Bias Current VCM= 0V 2 50 nA RIN Input Impedance 1 G  CIN Input Capacitance 1.35 pF Output Characteristics VOL Output Swing Low IL= -5mA (A, B, M, N rail-to-rail Buffers) -4.92 -4.85 V VOH Output Swing High IL= 5mA (A, B, M, N rail-to-rail Buffers) 4.85 4.92 V VOL Output Swing Low IL= -5mA (C ~ L Buffers) -3.5 V VOH Output Swing High IL= 5mA (C ~ L Buffers) 3.5 V ISC Short Circuit Current (A ~ N Buffers) ±120 mA IOUT Output Current (A ~ N Buffers) ±30 mA ISC(Com) Short Circuit Current (Com Buffer) ±300 mA IOUT(Com) Output Current (Com Buffer) ±100 mA Power Supply Performance PSRR Power Supply Rejection Ratio VS is moved from ±3.25V to ±7.75V 60 80 dB IS Supply Current (Per Amplifier) No Load (A ~ N Buffers) 500 750 µA IS(Com) Supply Current (Com Buffer) 5 mA Dynamic Performance SR Slew Rate [2] -4.0V≦VOUT≦4.0V, 20% to 80% 1 V/µs tS Settling to +0.1% (AV = +1) (AV = +1), VO=2V Step 5 µs BW -3dB Bandwidth RL = 10KΩ, CL = 10PF 2 MHz PM Phase Margin RL = 10KΩ, CL = 10PF 60 Degrees CS Channel Separation f = 1 MHz 75 dB 1. Measured over operating temperature range 2. Slew rate is measured on rising and falling edges
  • 4. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 4 of 12 2007/09/12 TYPICAL PERFORMANCE CURVES 0 250 500 750 1000 1250 1500 1750 -15 -13 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 13 15 Input Offset(mV) Quantity(Amplifiers) Figure (a) Input Offset Voltage Distribution Figure (b) Input beyond the rails Figure (c) Rail to Rail Capability igure (d) Large Signal Transient Response Figure (e) Large Signal Transient Response Figure (f) Small Signal Transient Response VCC = 10V , F :10K VCC = 10V , F :10K VCC = 10V , F :1K VCC = 10V , F :1K VCC = 10V , F :1K
  • 5. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 5 of 12 2007/09/12 TYPICAL PERFORMANCE CURVES Figure (g) Open Loop Gain & Phase vs. Frequency Figure (h) Frequency Response for Various CL Figure (h) Frequency Response for Various RL
  • 6. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 6 of 12 2007/09/12 APPLICATIONS INFORMATION Product Description The EC5575 rail-to-rail quad channels amplifier is built on an advanced high voltage CMOS process. It’s beyond rails input capability and full swing of output range made itself an ideal amplifier for use in a wide range of general-purpose applications. The features of 1µS high slew rate, fast settling time, 2MHz of GBWP as well as high output driving capability have proven the EC5575 a good voltage reference buffer in TFT-LCD for grayscale reference applications. High phase margin and extremely low power consumption (500µA per amplifier) make the EC5575 ideal for Connected in voltage follower mode for low power high drive applications Supply Voltage, Input Range and Output Swing The EC5575 can be operated with a single nominal wide supply voltage ranging from 6.5V to 18V with stable performance over operating temperatures of -20 °C to +85 °C. With 500mV greater than rail-to-rail input common mode voltage range and 75dB of Common Mode Rejection Ratio, the EC5575 allows a wide range sensing among many applications without having any concerns over exceeding the range and no compromise in accuracy. The output swings of the EC5575 typically extend to within 80mV of positive and negative supply rails with load currents of 5mA. The output voltage swing can be even closer to the supply rails by merely decreasing the load current. Figure 1 shows the input and output waveforms for the device in the unity-gain configuration. The amplifier is operated under ±5V supply with a 10k. load connected to GND. The input is a 10Vp-p sinusoid. An approximately 9.985 Vp-p of output voltage swing can be easily achieved. Figure 1. Operation with Rail-to-Rail Input and Output Output Short Circuit Current Limit A +/-120mA short circuit current will be limited by the EC5575 if the output is directly shorted to the positive or the negative supply. For an indefinitely output short circuit, the power dissipation could easily increase such that the device may be damaged. The internal metal interconnections are well designed to prevent the output continuous current from exceeding +/-30 mA such that the maximum reliability can be well maintained. Output Phase Reversal The EC5575 is designed to prevent its output from being phase reversal as long as the input voltage is limited from VS--0.5V to VS+ +0.5V. Figure 2 shows a photo of the device output with its input voltage driven beyond the supply rails. Although the phase of the device's output will not be reversed, the input's over-voltage should be avoided. An improper input voltage exceeds supply range by more than 0.6V may result in an over stress damage. Figure 2. Operation with Beyond-the Rails Input Power Dissipation The EC5575 is designed for maximum output current capability. Even though momentary output shorted to ground causes little damage to the device. For the high drive amplifier EC5575, it is possible to exceed the 'absolute-maximum junction temperature' under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if load conditions need to be modified for the amplifier to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to: JA AmaxJmax Dmax T-T P Θ = Where: TJmax = Maximum Junction Temperature TAmax= Maximum Ambient Temperature ΘJA = Thermal Resistance of the Package
  • 7. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 7 of 12 2007/09/12 PDmax = Maximum Power Dissipation in the Package. The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the loads, or: PDmax =∑i[VS * ISmax + (VS+ – VO) * IL] When sourcing, and PDmax = ∑i[VS * ISmax + (VO – VS-) * IL] When sinking. Where: i = 1 to 4 VS = Total Supply Voltage ISmax = Maximum Supply Current Per Amplifier VO = Maximum Output Voltage of the Application IL= Load current RL= Load Resistance = (VS+ – VO)/IL = (VO – VS-)/ IL A calculation for RL to prevent device from overheat can be easily solved by setting the two PDmax equations equal to each other. Pin Count Θja (oC/W) Θjc (C/W) TQFP-48 67 31 Normal TQFP-48 31 15 EXPOSED PAD 1V Driving Capacitive Loads The EC5575 is designed to drive a wide range of capacitive loads. In addition, the output current handling capability of the device allows for good slewing characteristics even with large capacitive loads. The combination of these features make the EC5575 ideally for applications such as TFT LCD panel grayscale reference voltage buffers, ADC input amplifiers, etc. As load capacitance increases, however, the -3dB bandwidth of the device will decrease and the peaking increase. The amplifiers drive 10pF loads in parallel with10KΩ. with just 1.5dB of peaking, and 100pF with 6.4dB of peaking. If less peaking is desired in these applications, a small series resistor (usually between 5Ωand 50Ω) can be placed in series with the output. However, this will obviously reduce the gain slightly. Another method of reducing peaking is to add a "snubber" circuit at the output. A snubber is a shunt load consisting of a resistor in series with a capacitor. Values of 150Ω and 10nF are typical. The advantage of a snubber is that it improves the settling and overshooting performance while does not draw any DC load current or reduce the gain. Power Supply Bypassing and Printed Circuit Board Layout With high phase margin, the EC5575 performs stable gain at high frequency. Like any high-frequency device, good layout of the printed circuit board usually comes with optimum performance. Ground plane construction is highly recommended, lead lengths should be as short as possible and the power supply pins must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to ground, a 0.1 µF ceramic capacitor should be placed from VS+ pin to VS- pin as a bypassing capacitor. A 4.7µF tantalum capacitor should then be connected in parallel, placed in the region of the amplifier. One 4.7µF capacitor may be used for multiple devices. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used.
  • 8. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 8 of 12 2007/09/12 Application Circuits
  • 9. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 9 of 12 2007/09/12 PACKAGE MARKING INDICATION (PACKAGE TYPE TQFP 48) LEAD FREE TQFP48 ( MAKING ) 1 13 25 37 1 37 AS15 DATE CODE Lot. Number AS15-F DATE CODE Lot. Number 13 25
  • 10. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 10 of 12 2007/09/12 OUTLINE DIMENSIONS (Dimensions shown in millimeters) 7.0 ± 0.10 9.0 ± 0.20 7.0±0.10 9.0±0.20 1 12 13 24 48 37 36 25 0.50 0.21 ± 0.04 1.0±0.06 1.2max. 1.00 BSC. 0.6 ± 0.15 3.5o ± 3o 0.15 ± 0.05
  • 11. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 11 of 12 2007/09/12 OUTLINE DIMENSIONS H: Exposed pad (3.05x3.05 mm)
  • 12. EC5575 14+1 Channel Voltage Buffers for TFT LCD E-CMOS Corp. (www.ecmos.com.tw) Page 12 of 12 2007/09/12 General Disclaimer: 1. Product information and specifications furnished by E-CMOS in this data sheets are in effect as of the publication date shown and are believed to be accurate and reliable. However, no responsibility is assumed by E-CMOS for the use of any information shown herein, nor for any patent or other rights infringement. 2. No license is granted by implication or otherwise under any patent or industrial properties owned by E-CMOS or any third party through this document. 3. The information herein is subject to change at any time without notice. 4. Neither reproduction nor duplication of this document, in any form, the whole or part is allowed without the prior written approval from E-CMOS. 5. Products of E-CMOS Corp., unless otherwise specified, are not authorized for use as critical components of any device or equipment in applications that demand extremely high reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aircraft, vehicles, nuclear power, radiation resistant system, transportation, disaster prevention equipment, gas related equipment, physical exercise equipment, safety equipment and medical equipment for life support, etc. 6. Although E-CMOS makes every attempt to ensure that its products are of high quality and reliability, thorough consideration of safety design and operating within the ranges guaranteed are strongly recommended to prevent any accident and damage that may ensue. E-CMOS bares no responsibility for failure or damage when abused or used beyond the guaranteed ranges. 7. Products applied to life support devices and systems are strongly requested to contact E-CMOS Corporation headquarter for the written approval to establish suitable terms & conditions. E-CMOS’ warranty is limited to replacement of defective components. Any personal injury or death or any other consequential damages of property are not covered. Copyright © 2002 by E-CMOS Corporation. E-CMOS CORPORATION IC DATASHEET ADDRESS: NO.1, CREATION RD. 2ND , SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU 300, TAIWAN, R.O.C. WEBSITE: http://www.ecmos.com.tw E-MAIL: mailto:[email protected] TEL: 886-3-5785888 FAX: 886-3-5783630