Basic logic gates
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The document discusses basic logic gates and digital design. It covers the NOT, AND, and OR gates, as well as NAND and NOR gates. It explains DeMorgan's Theorem and how it can be used to transform expressions between AND/OR and NAND/NOR forms. The XOR and XNOR gates are also covered. Finally, it discusses multiple-input gates such as AND, OR, NAND, and NOR gates with more than two inputs.
Basic logic gates
- 2. Basic Logic Gates and Basic Digital Design • NOT, AND, and OR Gates • NAND and NOR Gates • DeMorgan’s Theorem • Exclusive-OR (XOR) Gate • Multiple-input Gates
- 3. NOT Gate -- Inverter X Y 0 1 1 0
- 4. NOT • Y = ~X (Verilog) • Y = !X (ABEL) • Y = not X (VHDL) • Y = X’ •Y = X •Y = X (textook) • not(Y,X) (Verilog)
- 5. NOT X ~X ~~X = X X ~X ~~X 0 1 0 1 0 1
- 6. AND Gate AND X Y Z X 0 0 0 0 1 0 Z 1 0 0 Y 1 1 1 Z = X & Y
- 7. AND •X & Y (Verilog and ABEL) • X and Y (VHDL) V •X Y U •X Y •X * Y • XY (textbook) • and(Z,X,Y) (Verilog)
- 8. OR Gate OR X Y Z X 0 0 0 Z 0 1 1 Y 1 0 1 1 1 1 Z = X | Y
- 9. OR •X | Y (Verilog) •X # Y (ABEL) • X or Y (VHDL) •X + Y (textbook) •X V Y •X U Y • or(Z,X,Y) (Verilog)
- 10. Basic Logic Gates and Basic Digital Design • NOT, AND, and OR Gates • NAND and NOR Gates • DeMorgan’s Theorem • Exclusive-OR (XOR) Gate • Multiple-input Gates
- 11. NAND Gate NAND X Y Z X 0 0 1 0 1 1 Z 1 0 1 Y 1 1 0 Z = ~(X & Y) nand(Z,X,Y)
- 12. NAND Gate NOT-AND X Y W Z X 0 0 0 1 W 0 1 0 1 Z 1 0 0 1 Y 1 1 1 0 W = X & Y Z = ~W = ~(X & Y)
- 13. NOR Gate NOR X Y Z X 0 0 1 Z 0 1 0 Y 1 0 0 1 1 0 Z = ~(X | Y) nor(Z,X,Y)
- 14. NOR Gate NOT-OR X Y W Z X 0 0 0 1 W Z 0 1 1 0 Y 1 0 1 0 1 1 1 0 W = X | Y Z = ~W = ~(X | Y)
- 15. Basic Logic Gates and Basic Digital Design • NOT, AND, and OR Gates • NAND and NOR Gates • DeMorgan’s Theorem • Exclusive-OR (XOR) Gate • Multiple-input Gates
- 16. NAND Gate X Z X Z = Y Y Z = ~(X & Y) Z = ~X | ~Y X Y W Z X Y ~X ~Y Z 0 0 0 1 0 0 1 1 1 0 1 0 1 0 1 1 0 1 1 0 0 1 1 0 0 1 1 1 1 1 0 1 1 0 0 0
- 17. De Morgan’s Theorem-1 ~(X & Y) = ~X | ~Y • NOT all variables • Change & to | and | to & • NOT the result
- 18. NOR Gate X X Z Z Y Y Z = ~(X | Y) Z = ~X & ~Y X Y Z X Y ~X ~Y Z 0 0 1 0 0 1 1 1 0 1 0 0 1 1 0 0 1 0 0 1 0 0 1 0 1 1 0 1 1 0 0 0
- 19. De Morgan’s Theorem-2 ~(X | Y) = ~X & ~Y • NOT all variables • Change & to | and | to & • NOT the result
- 20. De Morgan’s Theorem • NOT all variables • Change & to | and | to & • NOT the result • -------------------------------------------- • ~X | ~Y = ~(~~X & ~~Y) = ~(X & Y) • ~(X & Y) = ~~(~X | ~Y) = ~X | ~Y • ~X & !Y = ~(~~X | ~~Y) = ~(X | Y) • ~(X | Y) = ~~(~X & ~Y) = ~X & ~Y
- 21. Basic Logic Gates and Basic Digital Design • NOT, AND, and OR Gates • NAND and NOR Gates • DeMorgan’s Theorem • Exclusive-OR (XOR) Gate • Multiple-input Gates
- 22. Exclusive-OR Gate XOR X Y Z X Z 0 0 0 Y 0 1 1 Z = X ^ Y 1 0 1 xor(Z,X,Y) 1 1 0
- 23. XOR •X ^ Y (Verilog) •X $ Y (ABEL) •X @ Y gX ⊕ Y (textbook) • xor(Z,X,Y) (Verilog)
- 24. Exclusive-NOR Gate XNOR X Y Z X Z 0 0 1 Y 0 1 0 Z = ~(X ^ Y) 1 0 0 Z = X ~^ Y 1 1 1 xnor(Z,X,Y)
- 25. XNOR • X ~^ Y (Verilog) • !(X $ Y) (ABEL) •X @ Y gX e Y • xnor(Z,X,Y) (Verilog)
- 26. Basic Logic Gates and Basic Digital Design • NOT, AND, and OR Gates • NAND and NOR Gates • DeMorgan’s Theorem • Exclusive-OR (XOR) Gate • Multiple-input Gates
- 27. Multiple-input Gates Z1 Z2 Z3 Z4
- 28. Multiple-input AND Gate Z1 Output Z 1 is HIGH only if all inputs are HIGH An open input will float HIGH
- 29. Multiple-input OR Gate Z2 Output Z 2 is LOW only if all inputs are LOW
- 30. Multiple-input NAND Gate Z3 Output Z 3 is LOW only if all inputs are HIGH
- 31. Multiple-input NOR Gate Z4 Output Z 4 is HIGH only if all inputs are LOW