Basics of SVPWM technique by Hardik Panyda

Prerequisite
 Knowledge of …..
– Working of inverter
– Basics of PWM and
– Basics of SPWM

Outlines
 Overview of Inverter
 Overview of PWM
 Space Vector Modulation
 Switching States
 Dwell Time Calculation
 Modulation Index
 Switching Sequences
 References

Three Phase Inverter with Load

PWM
Pulse Width Modulation (PWM)
(Chopping control)
DC/DC AC/AC
DC/AC AC/DC

Waveforms of three-phase sine PWM inverter

Space Vector Modulation
 Space vector modulation (SVM) is one of the preferred real-time modulation
techniques and is widely used for digital control of voltage source inverters.
 This section presents the principle and implementation of the space vector
modulation for the two-level inverter.

Switching States
 The operating status of the switches in the two-level inverter can be represented by
switching states.
 As indicated in Table 1, switching state ‘P’ denotes that the upper switch in an inverter
leg is on and the inverter terminal voltage (VAN, VBN, or VCN) is positive (+Vd) while ‘O’
indicates that the inverter terminal voltage is zero due to the conduction of the lower switch.
 The switching state [POO], for example, corresponds to the conduction of S1, S6, and S2
in the inverter legs A, B, and C, respectively.
 Among the eight switching states, [PPP] and [OOO] are zero states and the others are
active states.

Switching States
Figure : 1
Space vector diagram for
the two-level inverter

Switching States
 To derive the relationship between the space vectors and switching states, assuming that
the operation of the inverter is three-phase balanced, we have
 where VAO, VBO, and VCO are the instantaneous load phase voltages.
 From mathematical point of view, one of the phase voltages is redundant since given any
two phase voltages, the third one can be readily calculated.
 Therefore, it is possible to transform the three-phase variables to equivalent two-phase
variables
.…………. (1)

Switching States
 A space vector can be generally expressed in terms of the two-phase voltages in the α-β
plane.
.…………. (2)
……...…………. (3)

Switching States
 Substituting (2) into (3), we have
• Where, ejx = cosx + jsinx and x=0,2π/3, or 4π/3
 For active switching state [POO], the generated load phase voltages are
…... (4)
……...…………. (5)

Switching States
 The corresponding space vector, denoted as V1, can be obtained by substituting
(5) into (4):
V0(t) =2/3*[2/3*Vd - 1/3*Vd(-0.5 + j0.866)-1/3*Vd(-0.5 - j0.866)]
=2/9*Vd[2 + 0.5 - j0.866 + 0.5 + j0.866]
=2/9*Vd*3
 Following the same procedure, all six active vectors can be derived
 The relationship between the space vectors and their corresponding switching states is given
in Table 2.
.……………........ (6)
……...………… (7)

Switching States
 Note that the zero and active vectors do not move in space, and thus they are
referred to as stationary vectors. On the contrary, the reference vector Vref in Fig. 1
rotates in space at an angular velocity
 where f1 is the fundamental frequency of the inverter output voltage. The angular
displacement between Vref and the α-axis of the α-β plane can be obtained by
…..………........ (8)
……...………… (9)

Switching States
 For a given magnitude (length) and position, Vref can be synthesized by three
nearby stationary vectors, based on which the switching states of the inverter can be
selected and gate signals for the active switches can be generated.
 When Vref passes through sectors one by one, different sets of switches will be
turned on or off.
 As a result, when Vref rotates one revolution in space, the inverter output voltage
varies one cycle over time.
 The inverter output frequency corresponds to the rotating speed of Vref, while its
output voltage can be adjusted by the magnitude of Vref.

Dwell Time Calculation
 As mentioned earlier, the reference Vref can be synthesized by three stationary
vectors.
 The dwell time for the stationary vectors essentially represents the duty-cycle time
(on-state or off-state time) of the chosen switches during a sampling period Ts of the
modulation scheme.
 The dwell time calculation is based on ‘volt-second balancing’ principle.
 Vref can be approximated by two adjacent active vectors and one zero vector.
 For example, when Vref falls into sector I as shown in Fig. 2, it can be synthesized
by V1, V2, and V0.

Figure 2 : Vref synthesized by V1, V2 and V0
The volt-second balancing equation is
Ta, Tb, and T0 are dwell times for the
vectors V1, V2 and V0, respectively.
(10)

Vref
V1 V2
T1 T2 T0
TS
t
Total area of = Area of
v

 The space vectors in equation (10) can be expressed as
 Substituting Eq.(11) into Eq. (10) and then splitting the resultant equation into the
real (-axis) and imaginary (-axis) components in the α-β plane , we have
 Solving Eq.(12) together with Ts = Ta + Tb + T0 yields
..……(11)
……..…………… (12)

 Solving Eq.(12) together with Ts = Ta + Tb + T0 yields
 Eq. (13) is derived when Vref is in sector I, for other sectors Eq.(14 ) will be used
where k = 1, 2, . . . , 6 for sectors I, II, . . . , VI, respectively. For example,
when Vref is in sector II, the calculated dwell times Ta, Tb, and T0 based on Eq. (13)
and (14) are for vectors V2, V3, and V0, respectively.
……..…………… (13)
……….….… (14)

 Eq. (13) is derived when Vref is in sector I, for other sectors Eq.(14 ) will be used
where k = 1, 2, . . . , 6 for sectors I, II, . . . , VI, respectively. For example,
when Vref is in sector II, the calculated dwell times Ta, Tb, and T0 based on Eq. (13)
and (14) are for vectors V2, V3, and V0, respectively.
……….….… (14)
[Table 3 : Vref Location and Dwell Times]

Modulation Index
 Eq. (13) can be also expressed in terms of modulation index ma
where,
For
and
….……….….… (15)
……….……….….… (16)
………..……….….… (17)
………..……….….… (18)

Modulation Index
 The maximum fundamental line-to-line voltage (rms) produced by the SVPWM
scheme can be calculated by
 With the inverter controlled by the SPWM scheme, the maximum fundamental line-
to-line voltage is
from which
Equation (21) indicates that for a given dc bus voltage the maximum
inverter line-to-line voltage generated by the SVPWM scheme is 15.5% higher than
that by the SPWM scheme.
….….… (19)
..………….….… (20)
……..…..….… (21)

Switching Sequence
 The switching sequence should satisfy the following two requirements for the
minimization of the device switching frequency:
 Fig. 3 shows a typical seven-segment switching sequence and inverter output voltage
waveforms for Vref in sector I, where Vref is synthesized by V1, V2 and V0.
 The sampling period Ts is divided into seven segments for the selected vectors.

Switching Sequence
Figure 3:
Seven-segment switching
sequence for Vref in sector I.

Switching Sequence
The following pints can be observed from Fig. 3 :

Switching Sequence
Figure 4: Undesirable seven-segment switching sequence.
 Let us now examine a case given in Fig. 4,
where the vectors V1 and V2 in Fig. 3 are
swapped.
 Some switching state transitions, such as
the transition from [OOO] to [PPO], are
accomplished by turning on and off four
switches in two inverter legs
simultaneously.
 As a consequence, the total number of
switchings during the sampling period
increases from six in the previous case to ten.
 Obviously, this switching sequence does
not satisfy the design requirement and thus
should not be adopted.

Switching Sequence
 Table 4 gives the seven-segment switching sequences for Vref residing in all six sectors.
 Note that all the switching sequences start and end with switching state [OOO], which
indicates that the transition for Vref moving from one sector to the next does not require any
switchings which satisfies the sequence design requirement (b)
Table 4

References
• N. Mohan, W. P. Robbin, and T. Undeland, Power Electronics: Converters, Applications, and
Design, 2nd ed. New York: Wiley, 1995.
• B. K. Bose, Power Electronics and Variable Frequency Drives: Technology and Applications.
IEEE Press, 1997.
• H.W. van der Broeck, H.-C. Skudelny, and G.V. Stanke, “Analysis and realization of a
pulsewidth modulator based on voltage space vectors,”IEEE Transactions on Industry
Applications, vol.24, pp. 142-150, 1988.
• “High-Power Converters and AC Drives” by Bin Wu.

Basics of SVPWM technique by Hardik Panyda

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