Coa module1

COMPUTER ORGANIZATION
AND ARCHITECTURE
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Textbooks
•“Computer Organization,” by Carl Hamacher, Zvonko
Vranesic and Safwat Zaky. Fifth Edition McGraw-Hill,
2002.

MODULE 1
BASIC STRUCTURE OF
COMPUTERS
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TOPICS COVERED
 INTRODUCTION
 FUNCTIONAL UNITS
 BASIC OPERATIONAL CONCEPTS
 BUS STRUCTURES
 SOFTWARE
 MEMORY OPERATIONS
 INSTRUCTIONS
 ADDRESSING MODES
 ARM
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Overview
 Computer organization
 Encompasses all physical aspects of computer systems.
 E.g., circuit design, control signals, memory types.
 How does a computer work?
 Computer architecture
 Logical aspects of system implementation as seen by
the programmer.
 E.g., instruction sets, instruction formats, data types,
addressing modes.
 How do I design a computer?
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Historical Development
 Generation Zero: Mechanical Calculating Machines (1642
- 1945)
 Calculating Clock - Wilhelm Schickard (1592 - 1635).
 Pascaline - Blaise Pascal (1623 - 1662).
 Difference Engine - Charles Babbage (1791 - 1871),
also designed but never built the Analytical Engine.
 Punched card tabulating machines - Herman
Hollerith (1860 - 1929).

– Abacus
– Slide Rule
– Difference Engine
– Mechanical Calculators
– Differential Analyzer
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 The First Generation: Vacuum Tube Computers (1945 - 1953)
–
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– Atanasoff Berry
Computer (1937 - 1938)
solved systems of linear
equations.
– John Atanasoff and
Clifford Berry of Iowa
State University.

• The First Generation: Vacuum Tube Computers (1945 -
1953)
– Electronic Numerical
Integrator and Computer
(ENIAC)
– John Mauchly and J.
Presper Eckert
– University of
Pennsylvania, 1946

• The First Generation: Vacuum Tube Computers (1945 -
1953)
– IBM 650
(1955)
– Phased out in
1969.
The first mass-produced computer.

• The Second Generation: Transistorized Computers (1954
- 1965)
– IBM 7094 (scientific) and
1401 (business)
– Digital Equipment
Corporation (DEC) PDP-1
– Univac 1100
– . . . and many others.

• The Third Generation: Integrated Circuit Computers (1965
- 1980)
IBM 360
Cray-1
– IBM 360
– DEC PDP-8 and
PDP-11
– Cray-1
supercomputer
– . . . and many
others.

• The Fourth Generation: VLSI Computers (1980 - ????)
– Very large scale integrated circuits (VLSI) have
more than 10,000 components per chip.
– Enabled the creation of microprocessors.
– The first was the 4-bit Intel 4004.
• Intel
• 4004
8080, 8086, and 8088 spawned the idea of
“personal computing

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What is a computer?
 a computer is a sophisticated electronic calculating machine that:
 Accepts input information,
 Processes the information according to a list of internally stored
instructions and
 Produces the resulting output information.
 Functions performed by a computer are:
 Accepting information to be processed as input.
 Storing a list of instructions to process the information.
 Processing the information according to the list of instructions.
 Providing the results of the processing as output.
 What are the functional units of a computer?

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Functional units of a computer
I/O Processor
Output
Memory
Input
Control
Arithmetic
& LogicInstr1
Instr2
Instr3
Data1
Data2
Input unit accepts
information:
•Human operators,
•Electromechanical devices (keyboard)
•Other computers
Output unit sends
results of processing:
•To a monitor display,
•To a printer
Arithmetic and logic unit(ALU):
•Performs the desired
operations on the input
information as determined
by instructions in the memory
Control unit coordinates
various actions
•Input,
•Output
•Processing
Stores
information:
•Instructions,
•Data

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Information in a computer -- Instructions
 Instructions specify commands to:
 Transfer information within a computer (e.g., from memory to ALU)
 Transfer of information between the computer and I/O devices (e.g., from
keyboard to computer, or computer to printer)
 Perform arithmetic and logic operations (e.g., Add two numbers, Perform
a logical AND).
 A sequence of instructions to perform a task is called a program,
which is stored in the memory.
 Processor fetches instructions that make up a program from the
memory and performs the operations stated in those instructions.

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Information in a computer -- Data
 Data are the “operands” upon which instructions operate.
 Data could be:
 Numbers,
 Encoded characters.
 Data, in a broad sense means any digital information.
 Computers use data that is encoded as a string of binary digits called
bits.

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Input unit
Input Unit
Processor
Memory
ComputerReal world
Keyboard
Audio input
……
Binary information must be presented to a computer in a specific format. This
task is performed by the input unit:
- Interfaces with input devices.
- Accepts binary information from the input devices.
- Presents this binary information in a format expected by the computer.
- Transfers this information to the memory or processor.

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Memory unit
 Memory unit stores instructions and data.
 Recall, data is represented as a series of bits.
 To store data, memory unit thus stores bits.
 Processor reads instructions and reads/writes data from/to the memory
during the execution of a program.
 In theory, instructions and data could be fetched one bit at a time.
 In practice, a group of bits is fetched at a time.
 Group of bits stored or retrieved at a time is termed as “word”
 Number of bits in a word is termed as the “word length” of a computer.
 In order to read/write to and from memory, a processor should know
where to look:
 “Address” is associated with each word location.

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Memory unit (contd..)
 Processor reads/writes to/from memory based on the memory address:
 Access any word location in a short and fixed amount of time based on
the address.
 Random Access Memory (RAM) provides fixed access time independent
of the location of the word.
 Access time is known as “Memory Access Time”.
 Memory and processor have to “communicate” with each other in
order to read/write information.
 In order to reduce “communication time”, a small amount of RAM
(known as Cache) is tightly coupled with the processor.
 Modern computers have three to four levels of RAM units with different
speeds and sizes:
 Fastest, smallest known as Cache
 Slowest, largest known as Main memory.

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Memory unit (contd..)
 Primary storage of the computer consists of RAM units.
 Fastest, smallest unit is Cache.
 Slowest, largest unit is Main Memory.
 Primary storage is insufficient to store large amounts of data and
programs.
 Primary storage can be added, but it is expensive.
 Store large amounts of data on secondary storage devices:
 Magnetic disks and tapes,
 Optical disks (CD-ROMS).
 Access to the data stored in secondary storage in slower, but take
advantage of the fact that some information may be accessed infrequently.
 Cost of a memory unit depends on its access time, lesser access time
implies higher cost.

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Arithmetic and logic unit (ALU)
 Operations are executed in the Arithmetic and Logic Unit (ALU).
 Arithmetic operations such as addition, subtraction.
 Logic operations such as comparison of numbers.
 In order to execute an instruction, operands need to be brought into the
ALU from the memory.
 Operands are stored in general purpose registers available in the ALU.
 Access times of general purpose registers are faster than the cache.
 Results of the operations are stored back in the memory or retained in
the processor for immediate use.

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Output unit
•Computers represent information in a specific binary form. Output units:
- Interface with output devices.
- Accept processed results provided by the computer in specific binary form.
- Convert the information in binary form to a form understood by an
output device.
Output Unit
Processor
Memory
Computer Real world
Printer
Graphics display
Speakers
……

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Control unit
 Operation of a computer can be summarized as:
 Accepts information from the input units (Input unit).
 Stores the information (Memory).
 Processes the information (ALU).
 Provides processed results through the output units (Output unit).
 Operations of Input unit, Memory, ALU and Output unit are
coordinated by Control unit.
 Instructions control “what” operations take place (e.g. data transfer,
processing).
 Control unit generates timing signals which determines “when” a
particular operation takes place.

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How are the functional units connected?
•For a computer to achieve its operation, the functional units need to
communicate with each other.
•In order to communicate, they need to be connected.
MemoryInput Output Processor
•Functional units may be connected by a group of parallel wires.
•The group of parallel wires is called a bus.
•Each wire in a bus can transfer one bit of information.
•The number of parallel wires in a bus is equal to the word length of
a computer
Bus

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Organization of cache and main memory
Main
memory Processor
Bus
Cache
memory
Why is the access time of the cache memory lesser than the
access time of the main memory?

Computer Components: Top-Level View
Interconnection between Processor and Memory

Registers
 Registers are fastest and alone storage locations that hold data
temporarily. Multiple registers are needed to facilitate the operation of
the CPU. Some of these registers are
 �Two registers-MAR (Memory Address Register) and MDR
(Memory Data Register): To handle the data transfer between main
memory and processor. MAR- Holds addresses, MDR-Holds data
 �Instruction register (IR): Hold the Instructions that is currently
being executed.
 �Program counter (PC): Points to the next instructions that is to
be fetched frommemory.
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 •(PC) (MAR) ( the contents of PC transferred to
MAR)
 •(MAR) (Address bus) Select a particular memory
location
 Issues RD control signals
 •Reads instruction present in memory and loaded into
MDR
 •Will be placed in IR (Contents transferred from MDR to
IR)
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 •Instruction present in IR will be decoded by which
processor understand what operation it has to perform
 •Increments the contents of PC by 1, so that it points to the
next instruction address
 •If data required for operation is available in register, it
performs the operation
 •If data is present in memory following sequence is
performed
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 •Address of the data MAR
 •MAR Address bus select memory location
where is issued RD signal
 •Reads data via data bus MDR
 •From MDR data can be directly routed to ALU or it can
be placed in register and then operation can be performed
 •Results of the operation can be directed towards output
device, memory or register
 •Normal execution preempted (interrupt)
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A Partial Program Execution Example

Interrupt
 Normal execution of programs may be interrupted if some device requires
urgent servicing
 To deal with the situation immediately, the normal execution of the
current program must be interrupted
 Procedure of interrupt operation
 The device raises an interrupt signal
 The processor provides the requested service by executing an
appropriate interrupt-service routine
 The state of the processor is first saved before servicing the interrupt
• Normally, the contents of the PC, the general registers, and some
control information are stored in memory
 When the interrupt-service routine is completed, the state of the
processor is restored so that the interrupted program may continue

Classes of Interrupts
 Program
 Generated by some condition that occurs as a result of an instruction
execution such as arithmetic overflow, division by zero, attempt to
execute an illegal machine instruction, or reference outside a user’s
allowed memory space
 Timer
 Generated by a timer within the processor. This allows the operating
system to perform certain functions on a regular basis
 I/O
 Generated by an I/O controller, to signal normal completion of an
operation or to signal a variety of error conditions
 Hardware failure
 Generated by a failure such as power failure or memory parity error

Bus Structures
 A group of lines that serves a connecting path for several devices is
called a bus
 In addition to the lines that carry the data, the bus must have lines for
address and control purposes
The connections can be made in several ways using a Bus.
 Data Bus: it is used for transmission of data. The number of data lines
corresponds to the number of bits in a word.
 Address Bus: it carries the address of the main memory location from
where the data can be accessed

 Control Bus: it is used to indicate the direction of data transfer and to
coordinate the timing of events during the transfer.
The different functional units of a computer can be connected through a
bus structure such as:
 A Single-bus structure
 A Two-bus structure
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SINGLE-BUS STRUCTURE:
 The simplest way to interconnect functional units is to use a single
bus, as shown below
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Drawbacks of the Single Bus Structure
 The devices connected to a bus vary widely in their speed of operation
 Some devices are relatively slow, such as printer and keyboard
 Some devices are considerably fast, such as optical disks
 Memory and processor units operate are the fastest parts of a computer
 Efficient transfer mechanism thus is needed to cope with this problem
 A common approach is to include buffer registers with the devices to
hold the information during transfers
 An another approach is to use two-bus structure and an additional
transfer mechanism
• A high-performance bus, a low-performance, and a bridge for
transferring the data between the two buses. ARMA Bus belongs to
this structure

TWO-BUS STRUCTURE:
 The processor interacts with the memory through a
memory bus and handles input/output functions over I/O
bus.
 The I/O transfers are always under the direct control of
the processor, which initiates transfer and monitors their
progress until completion.
 The main advantage of this structure is good operating
speed but on account of more cost.
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AN ALTERNATIVE TWO-BUS STRUCTURE:
 the positions of memory and processor are interchanged.
I/O transfers are directly made to or from the memory.
 special purpose processor called peripheral processor is
used for providing the necessary controls over the actual
data transfer.
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Software
 In order for a user to enter and run an application program, the
computer must already contain some system software in its memory
 System software is a collection of programs that are executed as
needed to perform functions such as
 Receiving and interpreting user commands
 Running standard application programs such as word processors,
etc, or games
 Managing the storage and retrieval of files in secondary storage
devices
 Controlling I/O units to receive input information and produce
output results

Software
 Translating programs from source form prepared by the user
into object form consisting of machine instructions
 Linking and running user-written application programs with
existing standard library routines, such as numerical
computation packages
 System software is thus responsible for the coordination of all
activities in a computing system

Performance
 The speed with which a computer executes programs is
affected by the design of its hardware and its machine
language instructions
 Because programs are usually written in a high-level language,
performance is also affected by the compiler that translates
programs into machine languages
 For best performance, the following factors must be
considered
 Compiler
 Instruction set
 Hardware design

Performance
 Processor circuits are controlled by a timing signal called a
clock
 The clock defines regular time intervals, called clock cycles
 To execute a machine instruction, the processor divides the
action to be performed into a sequence of basic steps, such that
each step can be completed in one clock cycle
 Let the length P of one clock cycle, its inverse is the clock rate,
R=1/P
 Basic performance equation
 T=(NxS)/R, where T is the processor time required to execute a
program, N is the number of instruction executions, and S is the average
number of basic steps needed to execute one machine instruction

Performance Improvement
 Pipelining and superscalar operation
 Pipelining: by overlapping the execution of successive instructions
 Superscalar: different instructions are concurrently executed with
multiple instruction pipelines. This means that multiple functional units
are needed
 Clock rate improvement
 Improving the integrated-circuit technology makes logic
circuits faster, which reduces the time needed to complete a
basic step

Performance Improvement
 Reducing amount of processing done in one basic step also
makes it possible to reduce the clock period, P.
 However, if the actions that have to be performed by an
instruction remain the same, the number of basic steps
needed may increase
 Reduce the number of basic steps to execute
 Reduced instruction set computers (RISC) and complex instruction
set computers (CISC)

MEMORY LOCATIONS AND ADDRESSES
 The memory consists of many millions of storage cells,
each of which can store a bit of information having the
value 0 or 1
 the bits are normally not handled individually.
 deal with them in groups of fixed size.
 the memory is organized so that a group of m bits can be
stored or retrieved in a single, basic operation.
 Each group of m bits is referred d to as a word of
information, and m is called the word length
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The memory of a computer can be schematically
represented as a collection of words
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 word lengths that typically range from 16 to 64 bits.
 If the word length of a computer is 32 bits,
-can store a 32-bit 2’s-complement number
-four ASCII characters, each occupying 8 bits
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 Accessing the memory to store or retrieve a single item of information,
either a word or a byte, requires distinct names or addresses for each
item location.
 to use numbers from 0 through 2k
-1, for some suitable value of k.
 The 2k
addresses constitute the address space of the computer.
 Eg: a 24-bit address generates an address space of 224
(16,777,216)
locations.
This is usually written as 16M (16 mega)

BYTE ADDRESSABILITY:
 three basic information quantities to deal with: the bit, byte and word.
 A byte is always 8 bits, but the word length typically ranges from 16
to 64 bits.
 The most practical assignment is to have successive addresses refer to
successive byte.
 Contents of the memory locations can represent either instructions or
operands.
 Operands can be either numbers or characters.
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Representation of Numbers in main memory:
 a 32 bit pattern to represent a signed integer.
 Sign bit:
b31 = 0 for positive numbers
b31 = 1 for negative numbers
Magnitude:=
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b31 b30 … b1 b0

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 Magnitude can range from 0 to 231
-1 and the numbers are said to be in
binary positional notation.
 The above encoding format is called Signed Magnitude representation.
 The other two binary representations are 1‘s compliment and 2‘s
compliment representations.
 Representation of positive numbers is the same in the three cases.
 The difference is only in the negative number.
 In all the three methods the left most bit is the sign bit (i.e.0 represents
positive number and 1 represents negative number).
 2‘s compliment method is the most suitable one and is used in all
modern computers.

BIG- ENDIAN AND LITTLE ENDIAN
ASSIGNMENTS
 Little and big-endian are two ways of storing multibyte data-types
( int, float, etc).
 In little-endian machines, last byte of binary representation of the
multibyte data-type is stored first.
 In big-endian machines, first byte of binary representation of the
multibyte data-type is stored last.
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MEMORY OPERATIONS
 To execute an instruction the instructions must be transferred from the
main memory to the CPU.
 This is done by the CPU control circuits. Operands and results must
also be moved between the main memory and the CPU.
 Thus two basic operations involving the memory are needed namely,
Load (or Fetch or Read) and Store (or Write).
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 Load operation: Transfers a copy of the contents of a specific
memory location to the CPU.
 The Word in the main memory remains unchanged.
 To start a Load or Fetch operation, CPU sends the address of the
desired location to the main memory and requests to read its contents.
 The main memory reads the data stored at that address and sends them
to the CPU
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 Store operation: Transfers a word of information from the CPU to a
specific main memory location, destroying the former contents of that
location.
 The CPU sends the address of the desired location to the main
memory, together with the data to be written to that location
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INSTRUCTIONS AND INSTRUCTION
SEQUENCING
 A computer must have instructions capable of performing four types
of operations:
1. Data transfers between the main memory and the CPU registers
2. Arithmetic and logic operations on data
3. Program sequencing and control
4. I/O transfers
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Notations used:-
a) Register Transfer Notation (RTN):- Possible locations involved in
transfer of information are memory location, CPU registers or registers
in the I/O subsystem.
 We identify the names for the addresses of memory location as LOC,
PLACE, A, VAR2 etc and the names for CPU registers as R0, R5 etc.
 The contents of a location or a register are denoted by placing the
corresponding name between square brackets.
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 E.g. i) R1  [LOC] means that the contents of memory location LOC
are transferred into register R1.
ii) R3  [R1] + [R2] adds the contents of registers R1 and R2
and then places their sum into register R3.
b) Assembly Language Notation:- The same operations can be
represented in assembly language format as shown below.
 E.g. i) Move LOC, R1
ii) Add R1,R2,R3
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BASIC INSTRUCTION TYPES
 There are five types of instruction formats in a computer that are
commonly used, namely:
1. Three-address instruction format
2. Two-address instruction format
3. One-address instruction format
4. Zero-address instruction format
5. One-and-half address instruction format
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Three-address instruction
 C = A + B is a high level instruction to add the values of the two
variables A and B and to assign the sum to a third variable C.
 When this statement is compiled, each of these variables is assigned to
a location in the memory.
 The contents of these locations represent the values of the three
variables. Hence the above instruction requires the
 Action: C  [A] + [B]
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 To carry out this instruction, the contents of the memory locations A
and B are fetched from the main memory and transferred into the
processor – sum is computed – result is sent back to memory and
stored in location C.
 The same action is performed by a single machine instruction (three
address instruction)
Add A,B,C
 Operands A and B are called the source operands, C is called the
destination operand, and Add is the operation to be performed on the
operands.

 The general format is
Operation Source1,Source2, Destination
 If k bits are needed to specify the memory address of each operand,
the encoded form of the above instruction must contain 3k bits for
addressing purposes + the bits needed to denote the Add operation
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Two-address instruction
 An alternative method is to use two address instruction of the form
Operation Source, Destination
 E.g. Add A,B which perform the operation
B [A] + [B]
 Here the sum is calculated and the result is stored in location B
replacing the original contents of this location. i.e. operand B acts as
source as well as destination.
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 In the former case (three address instruction) the contents of A and B
were not destroyed.
 But here the contents of B are destroyed. This problem is solved by
using another two-address instruction to copy the contents of one
memory location into another location.
C [A] + [B] is equivalent to
Move B,C
Add A,C
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One-address instruction
 Instead of mentioning the second operand, it is understood to be in a
unique location.
 A processor register usually called the Accumulator is used for this
purpose.
E.g.
i) Add A means that the contents of the memory location A is added to
the contents of accumulator and places the sum in the accumulator.
ii) Load A copies the contents of memory location A into accumulator
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iii) Store A copies the contents of accumulator to the location A
 Depending on the instruction, the operand may be source or
destination.
 Now the operation C [A] + [B] can be performed by executing the
following instructions
Load A
Add B
Store C
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 The above mentioned instructions can also be handled by using
general purpose registers.
Let Ri represent a general purpose register.
Move A,Ri
Move Ri,A
Add A,Ri
 They are generalizations of Load, Store and Add instructions of the
single accumulator case in which register Ri performs the functions of
accumulator.
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 When a processor has several general-purpose registers, then many
instructions involve only operands that are in registers
E.g., Add Ri, Rj
Add Ri, Rj, Rk
 In the first instruction, Rj acts as both source and destination. In the
second instruction, Ri And Rj are source and Rk is the destination
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 Advantages of using CPU registers:
i) Data access from these registers is faster than that of main memory
locations; because these registers are inside the processor.
ii) Only few bits are needed to specify the register; because the
number of registers is very less.
 For example, only 5 bits are needed to specify 32 registers.
iii) Instructions, where only register names are contained, will
normally fit into one word of memory
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Zero-address instruction
 Here locations of all operands are defined implicitly. Such instructions
are found in machines that store operands in a structure called a
pushdown stack.
 A stack is a list of data elements, usually words or bytes, in which
these elements can be added or removed through the top of the stack
by following the LIFO (last-in-first-out) storage mechanism.
 A processor register called stack pointer. (SP) is used to keep track
of the address of the element at the top of the stack at any given time.
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 The terms push and pop are used to describe placing a new item on
the stack and removing the top item from the stack respectively.
One and half-address instruction
 An instruction that specifies one operand in memory and one operand
in a CPU register is referred to as one-and-half address instruction.
 Using registers it is possible to increase the speed of processing
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INSTRUCTIONS EXECUTION AND
STRAIGHT LINE SEQUENCING
 Let us take the operation C [A] + [B]. The Example shows the
program segment as it appears in the main memory of a computer that
has a two-address instruction format and a number of general purpose
CPU registers
Example : A program for C [A] + [B]
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 Steps for executing this program,:
1. CPU contains the register called PC which holds the address of the
instruction to be executed next.
To begin execution, the address of the first instruction ’i’ must
be placed in PC.
2. CPU control circuits use the information in the PC to fetch and
execute the instructions one at a time in the increasing order of
addresses. This is called straight line sequencing.
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 As each instruction is executed, the PC is incremented by 4 to point to
the next instruction.
 Executing a given instruction is a two-phase procedure
 First Phase - Instruction Fetch: Instruction is fetched from the main
memory location whose address is in the PC and is placed in the
Instruction Register (IR)
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 Second Phase – Instruction Execute: Instruction in the IR is
examined to determine which operation is to be performed.
 The specified operation is performed by the processor.
 This may involve fetching operands from main memory (or processor
registers), performing an arithmetic or logic operation and storing the
result in the destination location.
 At some point during this two-phase procedure, the contents of the PC
are advanced to point to the next instruction.
 After the execution phase is over, new instruction fetch can begin.
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BRANCHING
 Consider the task of adding ‘n‘ numbers.
 Let the address of memory locations containing n numbers are NUM1,
NUM2,…NUMn.
 Separate Add instruction is used to add each number to the contents of
register R0.
 After all the numbers have been added, the result is placed in the
memory location SUM.
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 Instead of using long list of Add instruction, it is possible to place a
single Add instruction in a loop.
 This loop causes a straight line sequence of instructions to be executed
repeatedly.
 The loop starts at location LOOP and ends at the instruction
Branch>0.
 During each pass through this loop, the address of the next entry is
determined and that entry is fetched and added to R0.
 Assume that the number of entries in the list ‘n‘ is stored in location N
88

 Register R1 is used as a counter to determine the number of time the
loop is to be executed.
 Hence the contents of the location N are loaded in register R1 at the
beginning of the program.
 Then within the body of the loop the instruction Decrement R1
reduces the contents of R1 by 1 each time through the loop.
 This means that execution of the loop must be repeated as long as the
result of the decrement operation is greater than 0.
89

 This type of instruction loads a new value into the program counter.
 As a result, the processor fetches and executes the instruction at this
new address.
 A conditional branch instruction causes a branch only if a specified
condition is satisfied.
 If the condition is not satisfied, the PC is incremented in the normal
way and the next instruction in sequential address order is fetched and
executed
91

CONDITION CODES
 The processor keeps track of some information about the results of
various operations for use by subsequent conditional branch
instructions.
 This is done by recording the required information into individual bits
called as condition code flags.
 In some processors, theseflags are grouped together in a special
register called the condition code register or status register.
92

 Four commonly used flags are:-
N (negative) Sets to 1 if the result is negative; otherwise, cleared
to 0
Z (zero) Sets to 1 if the result is 0; otherwise, cleared to 0
V (overflow) Sets to 1 if arithmetic overflow occurs; otherwise,
cleared to 0
C (carry) Sets to 1 if carry-out results from the operation;
otherwise, cleared to 0
93

ADDRESSING MODES AND ASSEMBLY
LANGUAGE
 The term addressing mode refers to the way in which the operand of
an instruction is specified.
1. Register mode: The operand is the contents of a CPU register; the
name of register is given in the instruction
E.g. Move R1,R2 The contents of R1 is transferred to R2
2. Absolute mode (Direct mode): The operand is in a memory location.
 The address of the memory location is explicitly given in the
instruction.
E.g. Add A,B
94

 The contents of the memory location A is added to the contents of the
memory location B.
 The addresses of A and B are given in the instruction itself.
3. Immediate mode: The operand is given explicitly in the instruction.
 This mode is used in specifying address and data constants in
programs
E. g. Move #200, R0
 This instruction places the value 200 in register R0.
4. Indirect mode: Here the instruction does not give the operand or its
address explicitly.
95

 Instead it provides the effective address of the operand. Effective
address of the operand is the contents of a register or main memory
location, whose address appears in the instruction.
 We denote indirection by placing the name of the register or the
memory address given in the instruction in parenthesis
 Let us consider two cases:
i) Add (A), R0
ii) Add (R1), R0
 In the first case, when the instruction is executed, CPU starts by
fetching the contents of location A in the main memory.
96

 Since indirect addressing is used, the value B stored in A is not the
operand, but the address of the operand.
 Hence CPU requests another read operation from the main memory
and this is to read the operands (contents of location B).
 The CPU then adds the operand to the contents of R0
 In the second case, the operand is accessed indirectly through register
R1 which contains the value B.
97

 5. Index mode: In this mode, the effective address of the operand is
generated by adding a constant value to the contents of a register.
 There are two ways of using the index mode.
1. Offset is given as a constant: Here the index register R1 contains the
address of a memory location and the value X defines an offset called
displacement
Add 20(R1),R2
2. Offset is in the index register: Here the constant X corresponds to a
memory address and the contents of the index register define the offset
to the operand.
Add 1000(R1),R2
101

 The register used may be a special register provided for this purpose
or may be any one of the general purpose register – referred to as an
Index Register.
 Index mode is indicated symbolically as X(Ri), where X denotes a
constant value contained in the instruction and Ri is the name of the
register involved.
 The effective address of the operand is given by EA or Aeff = X + [Ri]
 In assembly language program, the constant X may be given either as
an explicit number or as a name representing a numerical value.
102

 In either case, the effective address is the sum of two values; one is
given explicitly in the instruction and the other is in a register.
 5. Relative mode: The effective address is determined by the index
mode.
 But here the program counter (PC) is used in place of the general
purpose register Ri.
 i.e. X(PC) can be used to address a memory location that is X bytes
away from the location presently pointed by the program counter.
 Since the addressed location is identified ―relative to the program‖
counter, which always identifies the current execution point in a
program, this mode is called as Relative mode. 104

 This mode is used to access data operands. It is commonly used to
specify the target address in branch instruction.
 6. Autoincrement mode: The effective address of the operand is the
contents of a register specified in the instruction.
 After accessing the operand, the contents of the register is
automatically incremented to point to the next item in a list.
 We denote the auto increment mode by putting the specified register in
parenthesis to show that the contents of register is used as the effective
address, followed by a plus (+) sign to indicate that these contents are
to be incremented after the operand is accessed.
 105

 Thus the auto increment mode is written as (Ri) +. If we use auto
increment mode, it is possible to eliminate the increment instruction
 7. Auto decrement mode: The contents of a register specified in the
instruction are decremented.
 These contents are then used as the effective address of the operand.
We denote the auto decrement mode by putting the specified register
in the parenthesis, preceded by a minus (-) sign to indicate that the
contents of the register are to be decremented before being used as the
effective address.
 Thus we write − (R4).
 This mode allows accessing of operands in the direction of descending
address
106

BASIC INPUT/OUTPUT OPERATIONS
 Data are transferred between the memory of a computer and the
outside world.
 The way they are performed can have significant effect on the
performance of a computer.
 Program controlled I/O
 Simple method used to perform I/O task
 The rate of data transfer from the keyboard to the computer and from
the computer to the display is still much slower than the speed of the
processor.
 The mechanism used to synchronize the transfer of data between them
is:
 On Input
 Moving a character code from the keyboard to the processor
107

 Striking a key stores the corresponding code in an 8-bit buffer
register(DATAIN) associated with the keyboard.
 To inform the processor that a valid character is in DATAIN, a
status control flag, SIN, Is set to 1.
 A program monitors SIN, and when SIN is set to 1,processor reads
the contents of DATAIN.
 When the character is transferred to the processor ,SIN is
automatically cleared to 0.
 Second character is entered, SIN is again set to 1. and the process
repeats.
109

 When the characters are transferred from processor to the display, a
buffer Register, DATAOUT, and a status control flag, SOUT, are
used.
 When SOUT equals 1, the display is ready to receive a character.
 The processor monitors SOUT, and when SOUT is set to 1,the
processor transfers a character code to DATAOUT.
 The transfer of a character to DATAOUT clears SOUT to 0.
 When the display device is ready to receive a second character, SOUT
is again set to 1
110

 The buffer registers and status flags are part of device interfaces.
 To perform I/O operations Machine Instructions are needed.
 That check the state of status flags and transfer data between the
processor and I/O devices.
 Input to Processor
 Eg:
 READWAIT Branch to READWAIT if SIN=0
Input from DATAIN to R1
111

 Output to the Display
 Eg:
 WRITEWAIT Branch to WRITEWAIT if SOUT=0
Output from R1 to DATAOUT
112

 When I/O device and memory share the same address space, the
arrangement is called-memory –mapped I/O
 Some memory address values are used to refer to peripheral device
buffer registers ,such as DATAIN and DATAOUT.
 no special instructions are needed to access the contents of these
registers.
 Eg:
• MoveByte DATAIN,R1
113

STACKS
 Data structure-Used to control and information linkage between the
main program and subroutine
 Is a list of data elements, usually words or bytes.
 The elements can be added or removed at one end of the list only.
 This end is called the top of the stack.
 Other end is called bottom of the stack.
 Structure is also known as pushdown stack.
114

 Last-in-First-out(LIFO) stack.
 The last data item placed on the stack is the first one removed
when retrieval begins.
 Push and Pop are the terms used for placing a new item on the stack
and removing the top item from the stack.
115

A stack of words in the memory
116

 A stack of word data item in the memory of a computer
 It contains numerical values with 43 at the bottom and -28 at the top.
 Stack pointer is a processor register used to keep track of the address
of the element of the stack that is at the top at any given time.
 Assume a byte addressable memory with 32- bit word length
 Push operation can be implemented as:
Subtract #4,SP
Move NEWITEM,(SP)
 Where, the subtract instruction subtract the source operand 4 from the
destination operand contained in SP and places the result in SP.
117

 Move the word from location NEWITEM into the top of the stack,
decrementing the stack pointer by 4 before the move
 The Pop operation:
Move(SP),ITEM
Add #4,SP
 Move the top value from the stack into location ITEM and then
increment the stack pointer by 4 so that it points to the new top
element
118

 If the processor has the Auto increment and Auto decrement
addressing modes, the push operation can be performed by a single
instruction
Move NEWITEM,-(SP)
 Pop operation can be performed by
Move (SP)+,ITEM
120

SUBROUTINE
 In a given program, it is often necessary to perform a
particular subtask many times on different data-values.
Such a subtask is usually called a subroutine.
 For example, a subroutine may evaluate the sine function or
sort a list of values into increasing or decreasing order.
 It is possible to include the block of instructions that
constitute a subroutine at every place where it is needed in
the program
121

 The way in which a computer makes it possible to call and
return from subroutines is referred to as its subroutine
linkage method. The simplest subroutine linkage method is to
save the return address in a specific location, which may be
a register dedicated to this function. Such a register is
called the link register. When the subroutine completes its
task, the Return instruction returns to the calling program
by branching indirectly through the link register
122

 The Call instruction is just a special branch instruction that
performs the following operations • Store the contents of
the PC in the link register • Branch to the target address
specified by the instruction The Return instruction is a
special branch instruction that performs the operation •
Branch to the address contained in the link register .
123

Subroutine linkage using a link register
124

SUBROUTINE NESTING AND THE PROCESSOR
STACK
 A common programming practice, called subroutine nesting,
is to have one subroutine call another. In this case, the
return address of the second call is also stored in the link
register, destroying its previous contents. Hence, it is
essential to save the contents of the link register in some
other location before calling another subroutine. Otherwise,
the return address of the first subroutine will be lost.
125

 Subroutine nesting can be carried out to any depth.
Eventually, the last subroutine called completes its
computations and returns to the subroutine that called it.
The return address needed for this first return is the last
one generated in the nested call Memory location Subroutine
SUB 1000 first instruction …. …. Return 204 Return
sequence. That is, return addresses are generated and used
in a last-in-first-out order. This suggests that the return
addresses associated with subroutine calls should be pushed
onto a stack. A particular register is designated as the stack
pointer, SP, to be used in this operation. The stack pointer
points to a stack called the processor stack
126

 The Call instruction pushes the contents of the PC onto the
processor stack and loads the subroutine address into the
PC. The Return instruction pops the return address from the
processor stack into the PC.
127

PARAMETER PASSING
 When calling a subroutine, a program must provide to the
subroutine the parameters, that is, the operands or their
addresses, to be used in the computation. Later, the
subroutine returns other parameters, in this case, the
results of the computation. This exchange of information
between a calling program and a subroutine is referred to as
parameter passing. Parameter passing may be accomplished
in several ways. The parameters may be placed in registers
or in memory locations, where they can be accessed by the
subroutine. Alternatively, the parameters may be placed on
the processor stack used for saving the return address
128

 The purpose of the subroutines is to add a list of numbers.
Instead of passing the actual list entries, the calling
program passes the address of the first number in the list.
This technique is called passing by reference. The second
parameter is passed by value, that is, the actual number of
entries, n, is passed to the subroutine
129

THE STACK FRAME:-
 Now, observe how space is used in the stack in the example.
During execution of the subroutine, six locations at the top
of the stack contain entries that are needed by the
subroutine. These locations constitute a private workspace
for the subroutine, created at the time the subroutine is
entered and freed up when the subroutine returns control to
the calling program. Such space is called a stack frame. Fig a
A subroutine stack frame example
130

 fig b shows an example of a commonly used layout for
information in a stack frame. In addition to the stack
pointer SP, it is useful to have another pointer register,
called the frame pointer (FP), for convenient access to the
parameters passed to the subroutine and to the local
memory variables used by the subroutine. These local
variables are only used within the subroutine, so it is
appropriate to allocate space for them in the stack frame
associated with the subroutine. We assume that four
parameters are passed to the subroutine, three local
variables are used within the subroutine, and registers R0
and R1 need to be saved because they will also be used within
the subroutin
132

 The pointers SP and FP are manipulated as the stack frame
is built, used, and dismantled for a particular of the
subroutine. We begin by assuming that SP point to the old
top-of-stack (TOS) element in fig b. Before the subroutine
is called, the calling program pushes the four parameters
onto the stack. The call instruction is then executed,
resulting in the return address being pushed onto the stack.
Now, SP points to this return address, and the first
instruction of the subroutine is about to be executed. This
is the point at which the frame pointer FP is set to contain
the proper memory address. Since FP is usually a general-
purpose register, it may contain information of use to the
Calling program. Therefore, its contents are saved by
pushing them onto the stack. Since the SP now points to this
position, its contents are copied into FP
133

 Thus, the first two instructions executed in the subroutine
are Move FP, -(SP) Move SP, FP After these instructions are
executed, both SP and FP point to the saved FP contents.
Subtract #12, SP Finally, the contents of processor
registers R0 and R1 are saved by pushing them onto the
stack. At this point, the stack frame has been set up as
shown in the fig.
134

 The subroutine now executes its task. When the task is
completed, the subroutine pops the saved values of R1 and
R0 back into those registers, removes the local variables
from the stack frame by executing the instruction. Add
#12, SP And pops the saved old value of FP back into FP. At
this point, SP points to the return address, so the Return
instruction can be executed, transferring control back to
the calling program
135

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