EC 8691 Microprocessor and Microcontroller.pptx

EC 8691 Microprocessor and
Microcontroller
A.Gobinath
Assistant Professor/IT
Velammal College of Engineering and Technology

Course Outline
UNIT I - THE 8086 MICROPROCESSOR (9)
Introduction to 8086 – Microprocessor architecture – Addressing modes -
Instruction set and assembler directives – Assembly language programming –
Modular Programming - Linking and Relocation - Stacks - Procedures – Macros –
Interrupts and interrupt service routines – Byte and String Manipulation.
UNIT II - 8086 SYSTEM BUS STRUCTURE (9)
8086 signals – Basic configurations – System bus timing –System design using
8086 – IO programming – Introduction to Multiprogramming – System Bus
Structure - Multiprocessor configurations – Coprocessor, Closely coupled and
loosely Coupled configurations – Introduction to advanced processors.

UNIT III - I/O INTERFACING (9)
Memory Interfacing and I/O interfacing - Parallel communication interface – Serial
communication interface – D/A and A/D Interface - Timer – Keyboard /display
controller – Interrupt controller – DMA controller – Programming and applications
Case studies: Traffic Light control, LED display , LCD display, Keyboard display
interface and Alarm Controller.
UNIT IV - MICROCONTROLLER (9)
Architecture of 8051 – Special Function Registers(SFRs) - I/O Pins Ports and
Circuits - Instruction set - Addressing modes - Assembly language programming.
UNIT V - INTERFACING MICROCONTROLLER (9)
Programming 8051 Timers - Serial Port Programming - Interrupts Programming –
LCD & Keyboard Interfacing - ADC, DAC & Sensor Interfacing - External
Memory Interface- Stepper Motor and Waveform generation.

Unit 1 - The 8086 Microprocessor
Introduction
• Mp is a brain of Microcomputer
• It is a single chip which is capable of processing data
• It Control all components in computer
• It executes sequence of instruction
Program controlled semiconductor device (IC) which fetches (from
memory), decodes and executes instructions.

used to write a program for a microcomputer
1. Machine Language
 Binary form of program (Instructions / data in1’ and 0’s form)
 Difficult for programmer to memorize
 Error occurs easily
2. Assembly Language
 More readable form of machine language
 Uses mnemonic codes
 Assembler needed to translate to machine code
3. High Level Language
 Uses English-like program statements
 Programs can usually be written faster & easily
 Compiler needed to translate high-level language statement to machine code
 Executed slowly ; Require more memory
Three Levels of Programming

Evaluation of Microprocessor
First Generation
Between 1971 – 1973
PMOS technology, non compatible with TTL
4 bit processors  16 pins
8 and 16 bit processors  40 pins
Due to limitations of pins, signals are multiplexed
Second Generation
During 1973
NMOS technology  Faster speed, Higher density, Compatible with
TTL
4 / 8/ 16 bit processors  40 pins
Ability to address large memory spaces and I/O ports
Greater number of levels of subroutine nesting
Better interrupt handling capabilities
Intel 8085 (8 bit processor)
Third Generation
During 1978
HMOS technology  Faster speed, Higher packing density
16 bit processors  40/ 48/ 64 pins
Easier to program
Dynamically relatable programs
Processor has multiply/ divide arithmetic hardware
More powerful interrupt handling capabilities
Flexible I/O port addressing
Intel 8086 (16 bit processor)
Fourth Generation
During 1980s
Low power version of HMOS technology (HCMOS)
32 bit processors
Physical memory space 224 bytes = 16 Mb
Virtual memory space 240 bytes = 1 Tb
Floating point hardware
Supports increased number of addressing modes
Intel 80386

Microprocessor is scaling from 4004 to Pentium 4
Microprocessor is identified with Word size of data

Functional blocks
Flag Register
Timing and
control unit
Register array or
internal memory
Instruction
decoding unit
PC/ IP
ALU
Control Bus Address Bus
Data Bus

Operation of Microprocessor
1. Fetch 2. Decode
3. Execute

8086 Microprocessor
 It is enhanced version of 8085 MP designed by Intel in 1976
 Powerful instruction set
 Its 16 bit MP, its send 16 bit data at a time
Operation Modes:
 Maximum mode
 Minimum mode

• 8086 is a 40 bin IC
• Its operation volts is 5 volt
• Operating frequency is 5MHz
• Total memory addressing capacity is 1MB
• 16 bit data bus and 20 bit address bus
• It has 14 – 16bit resisters
• Higher throughput
• Approximately 29, 000 transistors, 40 pin DIP, 5V supply
• 20-bit address to access memory  can address up to 220 = 1
megabytes of memory space

Pins and Signals of 8086
AD0-AD15 (Bidirectional)
Address/Data bus
Low order address bus; these are multiplexed with data.
When AD lines are used to transmit memory address the symbol A is
used instead of AD, for example A0-A15.
When data are transmitted over AD lines the symbol D is used in place
of AD, for example D0-D7, D8-D15 or D0-D15.
A16/S3, A17/S4, A18/S5, A19/S6
High order address bus. These are multiplexed with status signals

BHE (Active Low)/S7 (Output)
Bus High Enable/Status
It is used to enable data onto the most significant half of
data bus, D8-D15. 8-bit device connected to upper half of the
data bus use BHE (Active Low) signal. It is multiplexed with
status signal S7.
MN/ MX
MINIMUM / MAXIMUM
This pin signal indicates what mode the processor
is to operate in.
RD (Read) (Active Low)
The signal is used for read operation.
It is an output signal.
It is active when low.

READY
This is the acknowledgement from the
slow device or memory that they have
completed the data transfer.
The signal made available by the devices
is synchronized by the 8284A clock
generator to provide ready input to the
8086.
The signal is active high.

Architecture of 8086 Microprocessor

Execution Unit (EU)
EU executes instructions that have already been
fetched by the BIU.
BIU and EU functions separately.
Bus Interface Unit (BIU)
BIU fetches instructions, reads data from memory
and I/O ports, writes data to memory and I/ O
ports.

Bus Interface Unit (BIU)
The Bus Interface Unit (BIU) manages the data, address and control buses.
The BIU functions in such a way that it:
 Fetches the sequenced instruction from the memory,
 Finds the physical address of that location in the memory where the
instruction is stored and
 Manages the 6-byte pre-fetch queue where the pipelined instructions are
stored.

Instruction Pointer (IP)
The IP register is a 16-bit register which contains the address of the next
instruction to be executed.
Instruction pointer values get incremented automatically after every instruction
is executed.
In 80386 and the latest versions, the size of this register is extended to 32-bits
and is known as the EIP register.
You cannot change the content of this register or access it directly.
Only instructions like branching, jump, loops, interrupts or stacks-related
instructions can change the IP.

Prefetch Queue ( Pipelining)
 8086 microprocessor implements basic pipelining with the help of 6 bytes prefetch
queue. This is a first-in-first-out queue.
 It fetches the next instruction from the code segment at the same time the execution
unit executes the current instruction.
 The fetching and executing stage works in parrel. Hence, 8086 supports 2 steps
pipelining.

Execution Unit (EU)
The Execution Unit (EU) performs the decoding and execution of the
instructions that are being fetched from the desired memory location.
Arithmetic and Logic Unit ( ALU)
16-bit General Purpose Registers
16-bit Special Purpose Registers
Instruction Register
Instruction Decoder Circuit
Flag/Status Register

• Various methods used to access instruction operands is called asAddressing Mode
• General Instruction Format
• Operands may be contained in
• Registers,
• Memory
• I/O ports.
• Three basic modes of addressing are
• Immediate
• Register
• Memory
ADDRESSING MODES
OPCODE Operand       Operand

Memory Segmentation
 The memory in an 8086 based system is organized as segmented memory
 The CPU 8086 is able to access 1MB of physical memory. The complete 1MB of memory can be
divided into 16segments, each of 64KB size and is addressed by one of the segment register.
 The 16-bit contents of the segment register actually point to the starting location of a particular
segment.
 The address of the segments may be assigned as 0000H to F000h respectively
 To address a specific memory location within a segment, we need an offset address.
 The offset address values are from 0000H to FFFFH so that the physical addresses range from
00000H to FFFFFH

1MB Memory Space divided into
non-overlapping segments
           
Seg-1
Seg-2
Seg-3
Seg-4
Seg-5
Seg-6
Seg-7
Seg-8
Seg-15
Seg-16
64 KB
00000
0FFFF
10000
1FFFF
20000
2FFFF
EFFFF
FFFFF

• The BIU has a dedicated adder for determining Physical memory
addresses
Physical Memory Address Generation
Physical Address (20 Bits)
Adder
Offset Value or Effective address (16 bits)
Segment Register (16 bits) 0 0 0 0

1. Even though addresses associated with the instructions are
16 bits only, allows the memory capacity to be 1MB
2. More than one Code, Data or Stack segment can be used for
programs more than 64KB long.
3. Facilitates, use of separate memory areas for a program, its
data and the stack.
4. Permit a program and/or its data to be put into different
areas of memory each time the program is executed.
Advantages of using Segment Registers

Assembly Language Programming
High Level language Assembly Programming
Assembler
[1200] -> Address
1200 -> Register

Modular Programming
Reasons for breaking a program into small parts:
1. Modules are easy to comprehend
2. Different modules can be assigned to different programmers
3. Debugging and testing done in orderly fashion
4. Documentation – easily understood
5. Modifications – localized
6. Frequently used tasks can be programmed into modules that are stored in
libraries and used by several programs

Assembler does the following in steps:
• Decides the address of each label
• Substitutes the values for each of the constants and variables
• Forms the machine code for mnemonics and data in the
assembly language program
ASSEMBLER
A Program that converts assembly language program into
equivalent machine codes, which may further be converted to
executable codes
During the above process, assembler finds out syntax errors, but
logical errors are not found

For completing these tasks assembler needs hints from the
programmer ; like -
• Storage required for a particular constant or a variable,
• Logical names of the segment
• Types of the different routines and modules,
• End of files, etc.

• An assembler translates the assembly language program into
machine language program
• Assembly language program  source codes
• Machine language program object codes
• Assembler converts Source code into Object code
• Linker converts Object code into executable code

Assembler works in passes:
1. In the first pass, it determines the displacement of the named
data items, the offset of labels etc. and puts this information to
in a symbol table.
2. In the second pass, it produces the binary codes for each
instructions and inserts the offsets etc. that it calculated in the
first pass.
3. It generates two files namely object file (.OBJ) and assembler
list file (.LST).

Linker is a program used to join several object files into one large object file.
1. While writing large programs it is good to divide them into modules so that
each modules can be written, tested, debugged independently and then use
linker to combine the modules to form the actual program.
2. It produces two files - link file which contains the binary codes of all the
combined modules and a link map file which contains the address information
about the linked files.
Linker

Locator
A locator is the program used to assign the specific
addresses of where the segments of object code are to be
loaded in to main memory.
1. Examples include EXE2BIN which comes with the
IBM PC DOS.
2. Converts .exe to .bin files which has physical
addresses

Debugger
A debugger is the program which allows to load the object code program in to system
memory.
1. It allows to look at the contents of the registers and memory locations after a
program is run.
2. It also allows to set breakpoints at any points in the program.
3. It allows to find the source of the problem into the program.
4. There are lots of debuggers available like Borland Turbo Debugger, Microsoft’s
Code view debugger etc.

• A STACK is a Last-Input-First-Output (LIFO) read/write memory (i.e) data
segment
• It is a top-down data structure, whose elements are accessed using SS and SP
registers
• Stack pointer is decremented by 2 while ‘pushing into’ the stack
• Stack pointer is incremented by 2 while ‘poping off’ the stack
Stack
Stack is used to:
• Store return addresses whenever a procedure is called
 Save contents of registers / register status of the processor while calling a procedure
 Hold data or addresses that will be acted upon by the procedure

– A procedure is a sequence of instructions written to perform a particular task
– Replacing a set of frequently used instructions by a procedure saves program
memory space
– A CALL instruction in the main program causes 8086 to the execute the set of
instructions contained in a procedure
– A RET instruction at the end of procedure returns execution to the next
instruction in the main program
Procedures

• A macro is the repeatedly appearing group of instructions, that is given a name
at the start of the program.
• A macro can be defined anywhere in a program using the directives MACRO
and ENDM
Defining a Macro:
name MACRO [optional arguments]
statements..
statements..
ENDM
Macro

• Capability to suspend the execution of running program and execution of
another program to fulfill specific requirement upon request
• After finishing the second program, automatically return to the first
program and start execution from where it was left
WHAT IS AN INTERRUPT?

SOURCES OF 8086 INTERRUPTS
8086 interrupts can be classified into two types:
 1) Predefined interrupt
Some error condition produced by execution of an instruction, e.g., trying to
divide some number by zero. (Interrupt due to exceptions)
 2) User defined interrupt
i) Hardware interrupt
An external signal applied to NMI, INTR pins
ii) Software interrupt
Execution of interrupt instruction INT

NMI (Non Maskable Interrupt):
Any interrupt request at NMI input pin cannot be masked or disabled by any means; type is
implicit
INTR:
This hardware interrupt can be masked using Interrupt Flag (IF); 256 Types (00h to FFh); to
handle more than one interrupts that occur at a time, Programmable Interrupt Controller is
required.
INT:
This is a software interrupt; the type is specified in the instruction
At the end of each instruction cycle, 8086 checks if any interrupt service has been requested.
If yes, then 8086 responds to the interrupt by stepping through the following series of actions:

String
• A string is a series of bytes or words stored in successive
memory locations
• 8086 can perform the following operations on strings
– Moving a string from one place in memory to another
– Compare two strings
– Search a string for a specified character

EC 8691 Microprocessor and Microcontroller.pptx

EC 8691 Microprocessor and Microcontroller.pptx

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EC 8691 Microprocessor and Microcontroller.pptx