Field Programmable Gate Array (FPGA) - Based Pulse Width Modulation for Single Phase Hybrid Active Power Filters

IJSRD - International Journal for Scientific Research & Development| Vol. 3, Issue 10, 2015 | ISSN (online): 2321-0613
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Field Programmable Gate Array (FPGA) – Based Pulse Width
Modulation for Single Phase Hybrid Active Power Filters
U. Krishna Reddy1
Ch. Sujatha2
1
P.G Scholar 2
Associate Professor
1,2
Department of Electrical & Electronic Engineering
1,2
Gudlavalleru Engineering College, Gudlavalleru, (A.P.), India
Abstract— Active filtering of electric power has now
become a mature technology for harmonic and reactive
power compensation in two-wire (single phase), three-wire
(three phase without neutral), and four-wire (three phase
with neutral) ac power networks with nonlinear loads. This
paper presents the simulations of Field programmable gate
array (FPGA) - based single phase hybrid active power
filters of two different configurations using Xilinx system
generator. The former one with the hybrid combination of
series active power filter and shunt passive filter is designed
to mitigate the distortions in source voltage and source
current due to the voltage source type harmonic load and the
latter one with the hybrid combination of shunt active power
filter and shunt passive filter is designed to mitigate the
harmonics in source current due to the current source type
harmonic load.
Key words: Xilinx System Generator, Voltage Source Type
of Harmonic Load, Series Active Power Filter, Current
Source Type Harmonic Load, Shunt Active Power Filter,
Shunt Passive Filter, PWM, FPGA, Power Quality
I. INTRODUCTION
Pulse width modulation techniques have been intensively
researched in the past few years. Methods, of various
concept and performance, have been developed and
described. Their design implementation depends on
application type, power level, semiconductor devices used in
the power converter, performance and cost criteria, all
determining the PWM method.
Two classes of PWM techniques have been
identified: optimal PWM and carrier PWM. The optimal
PWM technique for producing switching pattern is based on
the optimization of specific performance criteria [4]. In this
case, the switching patterns are calculated a priori for given
operating conditions and are then stored in memory (look-up
tables) for use in real time. Higher gain, from over
modulation, is possible when compared with the
conventional PWM scheme. However, considerable
computational effort of solving nonlinear equations to derive
the switching angles, the large memory required to store the
information for various modulation indexes and the
relatively sophisticated control to allow smooth transient
pattern changes, are considered to be serious practical
difficulties [5]. Most analogue circuits implementing PWM
control schemes are based on “natural” sampled switching
strategies. More recently, a switching strategy proposed,
referred to as “regular sampling”, is considered to have a
number of advantages when implemented digitally. They are
immune to noise and are less susceptible to voltage and
temperature changes, hence, the digital implementation [6-
9].
Generation of PWM gating signals requires a high
sampling rate, for wide-bandwidth performance. Therefore,
most computation resources of a microprocessor‟s DSP
must be devoted to generating PWM signals. Tasks could be
segregated by a combination of microprocessor and DSP. A
DSP handles the PWM generation while the processor feeds
the DSP - required information. Although this method
resolves sampling-rate proablems, it complicates design [7].
FPGA is a Programmable Logic Device (PLD),
comprising thousands of logic gates. Some of them are
combined to form a configurable logic block (CLB). A CLB
simplifies high-level circuit design. SRAM or ROM defines
software interconnections between logic gates, providing
flexible modification of the designed circuit, without
altering the hardware. Concurrent operation, less hardware,
easy and fast circuit modification, comparatively low cost
for complex circuitry and rapid prototyping make it the
favourite choice for prototyping an Application Specific
Integrated Circuit (ASIC). The advent of FPGA technology
has enabled rapid prototyping of the digital system [10].
II. TYPES OF NONLINEAR LOADS
The various loads in domestic consumer voltage distribution
system (DCVDS) may be linear as well as nonlinear. The
nonlinear loads present in DCVDS are classified into two
main categories. They are current source type of harmonic
loads and voltage source type of harmonic loads.
A. Voltage Source Harmonic Loads:
The voltage source type harmonic loads are having diode
rectifier with smoothing capacitor in their output circuit. The
harmonic amplitude of these loads is highly affected by the
impedance of the ac side. Such loads are more common in
DCVDS. The loads falling under this category are
computers, electronic lamp ballasts, compact fluorescent
lamp (CFL), video monitors, television (TV) sets, etc. A
bridge rectifier with resistance (R) and capacitor (C) in
parallel in the output circuit. The ac side of the rectifier is
connected in series with a smoothing inductor.
B. Current Source Harmonic Loads:
The appliances using Thyristor converters are the current
source type of harmonic loads. The harmonics are generated
from the switching operation. The loads falling under such
category in DCVDS are motor drives, transformers, air
conditioning devices, refrigerator, etc. A bridge rectifier
with resistance (R) and inductor (L) in series in the output
circuit.
III. SINGLE - PHASE HYBRID CONFIGURATION OF SERIES
ACTIVE FILTER AND SHUNT PASSIVE FILTER
The single phase hybrid active filter is shown in Fig. 1. In
this configuration, the passive filter bypasses the current
harmonic component, according to the designed value of the
passive element.

Field Programmable Gate Array (FPGA) – Based Pulse Width Modulation for Single Phase Hybrid Active Power Filters
(IJSRD/Vol. 3/Issue 10/2015/027)
The active filter acts as a voltage compensator and
a harmonic isolator for the source and for the load. Voltage
compensation is by injecting to the line, the in-phase
voltage. The harmonic isolation is also by the series
compensation, behaving as active impedance, not causing
voltage drop for the fundamental component, but forcing the
current harmonic component to pass through the passive
filter. Thus, the active filter improves both the filtering
characteristics of the passive filter and the power factor of
the load, by compensating the reactive power required by
the load [9]. Fig. 2 is the block diagram of the active power
filter control.
Fig. 1: System configuration of the hybrid active filter
Fig. 2: Block diagram of an active power filter control
A sinusoidal reference waveform is compared with
a triangular carrier waveform, to generate gate signals for
the inverter‟s switches. The amplitude of the modulating
wave (the reference waveform) is obtained by multiplying a
sample based fixed amplitude sine wave with the amplitude
of a variable processed signal, which, in shape and in
amplitude, is the key parameter for the inverter‟s output
voltage control. The processed signal is extracted by
comparing with a reference DC value, the DC bus capacitor
voltage.
A. PWM Generation:
The control of the active filter is digitally implemented in
Xilinx FPGA controller. PWM generation is achieved by an
SPWM generator. However, the real time generation of a
sine wave through FPGA is time consuming. It is, therefore,
inappropriate in PWM applications to calculate the
modulating wave values, as they are required in „real time‟.
An alternative approach is to store the sine values in the
look-up table, which is programmed in permanent memory.
The sine values are calculated first by this method. Memory
requirements, operation efficiency and output waveform
accuracy depend on the number of samples defining a sine -
wave cycle and their resolution.
Determination of carrier frequency is the first step
in design, needing precise calculation of clock frequency.
The carrier frequency (fc) was decided to be 19.2 kHz, the
decision based on various factors such as inverter topology,
acoustic radiations, type of power switching devices used
and the limitation of peripheral components. High-frequency
operation is better than a low-frequency one as harmonic
components can be moved to high orders. However, at high
frequency, switching stresses and power losses increase [9].
Fig. 3 shows the developed triangular wave from
an up-down counter and some peripheral logic gates.
Fig. 3: Pattern of a carrier wave
The counters are clocked by the help of Xilinx
System Generator. The main clock frequency (fclk)
determines the up-down counter‟s rate of increment or of
decrement. When the counter starts up-counting and goes to
maximum, some logic gates monitor it and generate a signal
for down-counting; similarly, when the counter reaches
minimum counting value, the monitoring logics interrupt the
counting and the counter changes it‟s counting direction.
The process repeats continuously.
The carrier frequency relates with the main clock
frequency and the up-down counter, through:
( )
(1.1)
Where:
fc = Carrier frequency
fclk = Main clock frequency
n = Bit size of the up-down counter
Every step of the carrier wave is compared with the
multiplied modulating signal as shown in Fig. 4.
Fig. 4: Pulse generation technique
In its implementation, the counter‟s clock must be
fed with a correct frequency (fclk), for the output designed.
Comparison between the carrier and the modulating signal
must be done such that when the carrier value is less than, or
equal to, the modulating signal, the PWM output level is
HIGH and when the carrier value is greater than the
modulating value, the PWM output level is LOW. This
process is continuous. Every 10 ms, the process repeats. For
a four-switch bridge, two sets of out-of-phase pulses are

needed. To develop the two sets, the PWM pulse train must
be logical - AND, with two sets of continuous 10 ms ON
and OFF pulses, exactly opposite in phase, synchronized in
phase with one complete cycle of up-down counting.
IV. SINGLE PHASE HYBRID CONFIGURATION OF SHUNT
ACTIVE FILTER AND SHUNT PASSIVE FILTER
The single phase hybrid active filter is shown in fig. 5. In
this configuration, shunt passive filter consists of tuned LC
circuits that are used to suppress harmonics in power
system. Shunt passive filters exhibit lower impedance at the
tuned harmonic frequency than the source impedance. This
diverts the harmonic current to the tuned filter thereby,
reducing the harmonic currents flowing into the source.
Fig. 5: System configuration of the hybrid active filter
In principle, the characteristics of the shunt passive
filters are determined by the impedance ratio of the source
and the filter. Shunt active power filter compensate current
harmonics by injecting equal but opposite harmonic
compensating current. In this case, a simple control scheme
for harmonic and reactive power compensation of non -
linear load is proposed. Proposed APF consists of two major
parts; power circuit and control circuit. Power circuit
comprises a voltage source single phase converter that
works bi-directionally in two modes; inverter and charger,
an energy storage capacitor at the DC side and a filter
inductor with internal resistance at the AC side. Control
circuit is implemented using FPGA based Xilinx blocks.
The reference current estimation is achieved by sine
multiplication theorem and the gating signals are generated
by using Xilinx based Hysteresis controller.
The shunt active power filter operates as a current
source injecting the harmonic components generated by the
load but phase shifted by 1800
. This principle is applicable
to any type of load considered a harmonic source. Moreover,
with an appropriate control scheme, the active power filter
can also compensate the load power factor. In this way, the
power distribution system can treat the nonlinear load and
the active power filter as an ideal resistor.
A. Reference Source Current Estimation:
In order to determine harmonic and reactive component of
load current, reference source current generation is needed.
Thus, reference filter current can be obtained when it is
subtracted from total load current. For better filter
performance, generation of reference source current should
be done properly. For this purpose, several methods such as
pq – theory, dq – transformation, multiplication with sine
function and Fourier transform can be used. In this paper,
multiplication with sine function method is used for
extraction of reference current.
V. SPECIFICATIONS OF THE SYSTEM
The system parameters are shown in Table 1 - 4.The source
voltage wave shape is detected from the source end before
the active and passive filter by using voltage measurement
and the source current is detected at the source end before
the active and passive filter by using current measurement.
The capacitors are selected from the rated value
and the inductances are designed. For a higher value of
inductance it produces the noise and humming sound, which
may produce more loss. A lot of trail tuning makes it
possible to adjust the inductance value for the better
harmonic compensation.
The specifications of single phase distribution
system, high pass filter, series active filter and shunt active
filter parameters are designed as follows:
Source and Load Parameters
Voltage (RMS Value) 162.6 V
Power source frequency 50 Hz
Source impedance inductance 3 mH
Source impedance resistance 0.8 Ω
Load inductance 3 H
Load capacitance 100 µF
Load resistance 200 Ω
Table 1: Specifications of Single Phase Distribution System
Passive filter parameters
Inductance 0.2125 H
Capacitance 75 µF
Resistance 100 Ω
Table 2: Specifications of High Pass Filter
Active Power Filter Parameters
Inductance (AC low pass filter) 0.2701 H
Capacitance (AC low pass filter) 150 µF
Switching frequency 19.2 kHz
Transformer coefficient 1.0
DC side capacitor 500 µF
Table 3: Specifications of Series Active Power Filter
Active Power Filter Parameters
Smoothing Inductance 4.75 mH
Smoothing Resistance 70 Ω
DC side capacitor 600 µF
Table 4: Specifications of Shunt Active Power Filter
VI. SIMULATIONS AND RESULTS
Fig. 6 shows the simulation circuit of single phase
distribution system and fig. 7 shows the source voltage and
the source current before compensation by active and
passive filters. Fig. 8 and fig. 9 show the harmonic spectrum
of the source voltage and source current without
compensation respectively. Fig. 10 shows the Simulation
diagram of Hybrid configuration of series active filter and
shunt passive filter. Fig. 11 and fig. 12 show the simulation
circuits of SPWM generator and Carrier signal generator
respectively. Fig. 13 shows the source voltage and the
source current after compensation by active and passive
filters. Fig. 16 and fig. 17 show the harmonic spectrums of

the source voltage; the THD, 0.41% and source current with
compensation; the THD, 3.24%.
Fig. 6: Simulation Diagram of Single Phase distribution
system with Voltage source type Harmonic Load before
compensation
Fig. 7: Waveforms of Source Voltage and Source Current
before compensation
Fig. 8: Harmonic Spectrum of Source Voltage before
compensation
Fig. 9: Harmonic Spectrum of Source Current before
compensation
Fig. 10: Simulation diagram of Hybrid configuration of
series active filter and shunt passive filter
Fig. 11: Simulation diagram of Carrier Signal Generator
Fig. 12: Simulation diagram of Sinusoidal Pulse Width
Modulator

after compensation
Fig. 14: Waveform of Compensating Voltage
Fig. 15: Waveform of Current drawn by Load
Fig. 16: Harmonic Spectrum of Source Voltage after
compensation
Fig. 17: Harmonic Spectrum of Source Current after
compensation
Configuration
Vs
(%THD)
Is
(%THD)
Before compensation 5.59 103.62
After compensation by passive
filter only
4.73 23.64
After compensation by active
and passive filters
0.41 3.24
Table 5: Total Harmonic Distortion
Fig. 18 shows the simulation circuit of single phase
distribution system and fig. 19 shows the source voltage and
the source current before compensation by active and
passive filters. Fig. 20 and fig. 21 show the harmonic
spectrums of the source voltage and source current without
compensation respectively. Fig. 22 shows the Simulation
diagram of Hybrid configuration of series active filter and
shunt passive filter. Fig. 24 and fig. 25 show the simulation
circuits of Reference Source Current Estimation and
Hysteresis Controller respectively. Fig.26 shows the source
voltage and the source current after compensation by active
and passive filters. Fig. 29 and fig. 30 show the harmonic
spectrums of the source voltage; the THD, 1.18% and source
current with compensation; the THD, 4.17%.
Fig. 18: Simulation Diagram of Single Phase distribution
system with Current source type Harmonic Load before
compensation
Fig. 19: Simulation diagram of Current source type of
Harmonic load
before compensation

Fig. 21: Harmonic Spectrum of Source Voltage before
compensation
Fig. 22: Harmonic Spectrum of Source Current before
compensation
Fig. 23: Simulation diagram of Hybrid configuration of
shunt active filter and shunt passive filter
Fig. 24: Simulation diagram of Reference Source Current
Estimation
Fig. 25: Simulation diagram of Hysteresis Controller
after compensation
Fig. 27: Waveform of Compensating Current
Fig. 28: Waveform of Current drawn by Load
Fig. 29: Harmonic Spectrum of Source Voltage after
compensation
Fig. 30: Harmonic Spectrum of Source Current after
compensation
Configuration Vs (%THD) Is (%THD)
Before
compensation
1.28 43.88

After compensation by
active and passive filters
1.18 4.17
Table 6: Total Harmonic Distortion
VII. CONCLUSION
The single phase distribution system with non linear loads of
voltage source type harmonic load and current source type
harmonic load is implemented with two proposed hybrid
configurations which compensate the source voltage
distortions, the source current‟s harmonic components and
reactive power.
The % THD value of source current for the system
with VSHL before compensation is 103.62 and then
improved to 3.24 with series active filter and shunt passive
filter compensation. The % THD value of source current for
the system with CSHL before compensation is 43.88 and
then improved to 4.17 with shunt active filter and shunt
passive filter compensation.
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Field Programmable Gate Array (FPGA) - Based Pulse Width Modulation for Single Phase Hybrid Active Power Filters

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