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FLIP-FLOPS
PRESENTED BY
KOUSHIK DEY
Roll NO.: 11900315023
Dept.: ECE
Sequential Circuits
 The output of circuit depends on the
previous output and the present input.
 The input must follow a specific sequence to
produce a required output.
 In order to follow a sequence of input the
circuits must contain some form of memory
to retain knowledge of those inputs.
 This memory are obtained by feedback
connections.
 Most sequential systems are based on a small
number of simple sequential circuit elements
known as flip flops.
Flip-flop (Sequential Circuits)
 What is Flip flop?
 It is a Sequential circuits/an electronics circuit which has two stable states
and thereby is capable of storing as one bit of data, bit 1 or bit 0.
Introduction – flip-flop
 They are 1(HIGH) or 0 (LOW).
 Whenever we refer to the state of flip-flop, we
refer to the state of its normal output(Q).
 More complicated flip flop use a clock as the
control input. These clocked flip-flops are used
whenever the input and output signals must occur
within a particular sequence.
Normal output
Inverted Output
Inputs
They have two stable conditions and
can be switched from one to the other
by appropriate inputs. These stable
conditions are usually called the states
of the circuit.
Q
𝑄
Introduction: Types of Flip Flop
1. S-R latch
2. Clocked S-R Flip-Flop
3. J-K Flip Flop
4. D Flip Flop
5. T Flip Flop
6. Master-Slave J-K Flip Flop
Difference between flip flop and latch
 Flip flop and latch are two basic building blocks of sequential circuit but
there is suitable difference between the two is;
 A flip flop continuously checks its inputs and corresponding changes its
output only at times determined by clocking the signal.
 Where as latch is a device which continuously checks all its input and
correspondingly changes its output, independent of time determined by
clocking signal.
S-R Latch
 The most basic sequential circuit is called
SR latch.
 The basic SR latch is an asynchronous
device.
 In asynchronous device, the outputs is
immediately changed anytime one or more
of the inputs change just as an
combinational logic circuits.
 It does not operate in step with a clock or
timing.
S
R
Q
𝑄
S-R Latch
 The SR latch has two inputs, SET(S) and
RESET(R).
 The SR latch has two outputs Q and 𝑸.
 The Q output is considered the normal
output and is the one most used.
 The output 𝑸 is simply the compliment of
output 𝑸.
S R Q 𝑸 STATUS
0 0 1 1 INVALID
0 1 1 0 SET
1 0 0 1 RESET
1 1 Q 𝑄 HOLD
(NO
CHANGE)
S-R Latch : Timing Diagram
Clocked S-R Flip Flop
 Additional clock input is added to
change the SR latch from an element
used in asynchronous sequential circuits
to one, which can be used in
synchronous circuits.
 Its means that the flip flop can change
the output states only when clock signal
make a transition.
S
R
CLK
Q
𝑄
Clocked S-R Flip Flop
CLOCK S R Q 𝑸 STATUS
1 0 0 Q 𝑄 HOLD
(NO
CHANGE)
1 0 1 0 1 RESET
1 1 0 1 0 SET
1 1 1 0 0 INVALID
Truth Table: Logic Circuit:
Clocked S-R Flip Flop: Timing Diagram
JK Flip Flop – Symbol
 Another type of Flip flop is JK
FLIP FLOP.
 It differs from the SR flip flops
when J=K=1 condition is not
indeterminate but it is defined to
give a very useful changeover
(toggle) action.
 Toggle means that Q and 𝑸 will
switch to their opposite states.
 The JK flip flop has clock input
and two control inputs J and K.
 Operation of JK flip flop is
completely described by truth
table in figure:
J
K
CLK
Q
𝑄
JK Flip Flop – Truth Table And Logic circuit
CLOCK J K Q 𝑸 STATUS
1 0 0 Q 𝑄 HOLD
(NO
CHANGE)
1 0 1 0 1 RESET
1 1 0 1 0 SET
1 1 1 𝑄 Q TOGGLE
Truth Table: Logic Circuit:
Race around condition: As we know that during high clock whenever applied input
changes the output also changes. But in JK flip flop when J=K=1 ,without any change
in the input the output changes , this condition is called as race around condition.
J-K Flip Flop : Timing Diagram
D Flip flop
 Also known as Data Flip flop.
 Can be constructed from SR
flip flop or JK flip flop by
addition of an inverter.
 Inverter is connected so that
the R input is always the
inverse of S (or J input is
always complementary of K).
 The D flip flop will act as a
storage element for a single
binary digit(bit).
D Flip Flop- Logic circuit – Truth Table
D CLK Q 𝑸 STATUS
0 1 0 1 RESET
1 1 1 0 SET
Logic Circuit:
Truth Table:
T Flip Flop
 The T Flip flop has only
the TOGGLE and HOLD
operation.
 If Toggle mode operation
, the output will toggle
from 1 to 0 or vice versa. T CLK Q 𝑸 STATUS
0 1 Q 𝑄 HOLD
1 1 𝑄 Q TOGGLE
Truth Table:
Logic Symbol:
Master Slave JK Flip-Flop
 Master Slave JK flip flop is designed
using two separate flip flops. Out of
these, one acts as a MASTER and
other as a SLAVE.
 The output of master JK flip flop is
fed to the input of the slave JK flip
flop. The output of slave JK flip flop is
given as a feedback to the input of
master JK flip flop.
 The clock pulse is given to the master
JK flip flop and it is sent through a
NOT gate and thus inverted before
passing it to the slave JK flip flop.
Flip Flop : Application
 REGISTERS
 FREQUENCY DIVIDERS
 DIGITAL COUNTERS
Conclusion
 Flip flop is a basic memory element which store
one bit at a time and have two states set and
reset.
 There are different types of flip flop S-R, J-K, D, T,
Master Slave.
 The number of inputs and the way inputs are
given define the type of flip flop.
References
 Salivahana, S. Arivazhagan, S. 2012. Digital Circuits and Design: Flip-
flops. Vikas
Publishing House Pvt Ltd, New Delhi.
 DAEnotes. Flip-flops. http://www.daenotes.com/electronics/digital-
electronics/flip-flops-types-applications-woking
 Wikipedia. Flip-flops (electronics). https://en.wikipedia.org/wiki/Flip-
flop_(electronics)
Flip flop

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Flip flop

  • 1. FLIP-FLOPS PRESENTED BY KOUSHIK DEY Roll NO.: 11900315023 Dept.: ECE
  • 2. Sequential Circuits  The output of circuit depends on the previous output and the present input.  The input must follow a specific sequence to produce a required output.  In order to follow a sequence of input the circuits must contain some form of memory to retain knowledge of those inputs.  This memory are obtained by feedback connections.  Most sequential systems are based on a small number of simple sequential circuit elements known as flip flops.
  • 3. Flip-flop (Sequential Circuits)  What is Flip flop?  It is a Sequential circuits/an electronics circuit which has two stable states and thereby is capable of storing as one bit of data, bit 1 or bit 0.
  • 4. Introduction – flip-flop  They are 1(HIGH) or 0 (LOW).  Whenever we refer to the state of flip-flop, we refer to the state of its normal output(Q).  More complicated flip flop use a clock as the control input. These clocked flip-flops are used whenever the input and output signals must occur within a particular sequence. Normal output Inverted Output Inputs They have two stable conditions and can be switched from one to the other by appropriate inputs. These stable conditions are usually called the states of the circuit. Q 𝑄
  • 5. Introduction: Types of Flip Flop 1. S-R latch 2. Clocked S-R Flip-Flop 3. J-K Flip Flop 4. D Flip Flop 5. T Flip Flop 6. Master-Slave J-K Flip Flop
  • 6. Difference between flip flop and latch  Flip flop and latch are two basic building blocks of sequential circuit but there is suitable difference between the two is;  A flip flop continuously checks its inputs and corresponding changes its output only at times determined by clocking the signal.  Where as latch is a device which continuously checks all its input and correspondingly changes its output, independent of time determined by clocking signal.
  • 7. S-R Latch  The most basic sequential circuit is called SR latch.  The basic SR latch is an asynchronous device.  In asynchronous device, the outputs is immediately changed anytime one or more of the inputs change just as an combinational logic circuits.  It does not operate in step with a clock or timing. S R Q 𝑄
  • 8. S-R Latch  The SR latch has two inputs, SET(S) and RESET(R).  The SR latch has two outputs Q and 𝑸.  The Q output is considered the normal output and is the one most used.  The output 𝑸 is simply the compliment of output 𝑸. S R Q 𝑸 STATUS 0 0 1 1 INVALID 0 1 1 0 SET 1 0 0 1 RESET 1 1 Q 𝑄 HOLD (NO CHANGE)
  • 9. S-R Latch : Timing Diagram
  • 10. Clocked S-R Flip Flop  Additional clock input is added to change the SR latch from an element used in asynchronous sequential circuits to one, which can be used in synchronous circuits.  Its means that the flip flop can change the output states only when clock signal make a transition. S R CLK Q 𝑄
  • 11. Clocked S-R Flip Flop CLOCK S R Q 𝑸 STATUS 1 0 0 Q 𝑄 HOLD (NO CHANGE) 1 0 1 0 1 RESET 1 1 0 1 0 SET 1 1 1 0 0 INVALID Truth Table: Logic Circuit:
  • 12. Clocked S-R Flip Flop: Timing Diagram
  • 13. JK Flip Flop – Symbol  Another type of Flip flop is JK FLIP FLOP.  It differs from the SR flip flops when J=K=1 condition is not indeterminate but it is defined to give a very useful changeover (toggle) action.  Toggle means that Q and 𝑸 will switch to their opposite states.  The JK flip flop has clock input and two control inputs J and K.  Operation of JK flip flop is completely described by truth table in figure: J K CLK Q 𝑄
  • 14. JK Flip Flop – Truth Table And Logic circuit CLOCK J K Q 𝑸 STATUS 1 0 0 Q 𝑄 HOLD (NO CHANGE) 1 0 1 0 1 RESET 1 1 0 1 0 SET 1 1 1 𝑄 Q TOGGLE Truth Table: Logic Circuit: Race around condition: As we know that during high clock whenever applied input changes the output also changes. But in JK flip flop when J=K=1 ,without any change in the input the output changes , this condition is called as race around condition.
  • 15. J-K Flip Flop : Timing Diagram
  • 16. D Flip flop  Also known as Data Flip flop.  Can be constructed from SR flip flop or JK flip flop by addition of an inverter.  Inverter is connected so that the R input is always the inverse of S (or J input is always complementary of K).  The D flip flop will act as a storage element for a single binary digit(bit).
  • 17. D Flip Flop- Logic circuit – Truth Table D CLK Q 𝑸 STATUS 0 1 0 1 RESET 1 1 1 0 SET Logic Circuit: Truth Table:
  • 18. T Flip Flop  The T Flip flop has only the TOGGLE and HOLD operation.  If Toggle mode operation , the output will toggle from 1 to 0 or vice versa. T CLK Q 𝑸 STATUS 0 1 Q 𝑄 HOLD 1 1 𝑄 Q TOGGLE Truth Table: Logic Symbol:
  • 19. Master Slave JK Flip-Flop  Master Slave JK flip flop is designed using two separate flip flops. Out of these, one acts as a MASTER and other as a SLAVE.  The output of master JK flip flop is fed to the input of the slave JK flip flop. The output of slave JK flip flop is given as a feedback to the input of master JK flip flop.  The clock pulse is given to the master JK flip flop and it is sent through a NOT gate and thus inverted before passing it to the slave JK flip flop.
  • 20. Flip Flop : Application  REGISTERS  FREQUENCY DIVIDERS  DIGITAL COUNTERS
  • 21. Conclusion  Flip flop is a basic memory element which store one bit at a time and have two states set and reset.  There are different types of flip flop S-R, J-K, D, T, Master Slave.  The number of inputs and the way inputs are given define the type of flip flop.
  • 22. References  Salivahana, S. Arivazhagan, S. 2012. Digital Circuits and Design: Flip- flops. Vikas Publishing House Pvt Ltd, New Delhi.  DAEnotes. Flip-flops. http://www.daenotes.com/electronics/digital- electronics/flip-flops-types-applications-woking  Wikipedia. Flip-flops (electronics). https://en.wikipedia.org/wiki/Flip- flop_(electronics)