High-k für Alle - Beyond DRAM capacitors and HKMG
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This document discusses the history and applications of high-k dielectric materials. It begins by covering the early developments of atomic layer deposition (ALD) and its use in fabricating high-k metal-insulator-metal (MIM) capacitors in the 1990s. It then outlines several applications of high-k dielectrics in memory and logic devices, including DRAM, embedded memory, resistive RAM (RRAM), and ferroelectric memory (FRAM). The document proceeds to describe the work done with high-k materials at the Fraunhofer Institute, including integrated capacitors, system-on-chip (SoC) applications, and ferroelectric memory devices. It concludes by noting the potential for scaling ferro
![© Fraunhofer
Sven Lindfors (left)
Constructing ALD R&D and production tools since 1975
(Lohja Oy, Mikrokemia Oy, ASM Microchemistry Ltd.,
Picosun, …)
Dr. Tuomo Suntola (right) Demonstrated ALD 1974 at
Instrumentarium Oy, Finland Patented ALD (ALE) 1977 T.
Suntola, "Methods for producing compound thin films", US patent
4058430
ALD / ML – Historical background / Hall of fame
Prof. V.B. Aleskovskii (left) Proposed the
concept of the Matrix Theory in his Ph.D.
thesis published in 1952 [under
investigation].
Prof. S.I. Kol’tsov (right) First publications
as Molecular Layering (ML) in the 1960s from
Leningrad Technological Institute.
Join ALD History: www.aldpulse.com/node/189](https://image.slidesharecdn.com/high-kfrallebeyonddramcapacitorsandhkmg-150425160643-conversion-gate01/85/High-k-fur-Alle-Beyond-DRAM-capacitors-and-HKMG-4-320.jpg)
![© Fraunhofer
First application of High-k MIM capacitor 1992
1992 : Insulation in the form of a layer with high permittivity and method for the manufacture
thereof
The invention concerns an insulation comprising laminate construction 3
containing metal oxide and a method for the manufacture thereof. The laminate
construction 3 according to the invention contains a metal oxide in at least two
different tungsten groups, of which the first metal oxide has high
permittivity and the second metal oxide has low stray flux . Both the metal
oxides are at least essentially in amorphous form. Tantaloxide is
advantageously used as the first metal oxide and hafnium oxide as the second
metal oxide. According to the invention a film is achieved with high permittivity
and low losses in low manufacturing temperatures, for example 300 degrees
C, and treatment with after-heating is not required. The quality factor Q =
[omega] C/G of the insulation is better than 500 and the dielectric constant is
advantageously at least 15.; The layer of insulation can advantageously be
used in thin film condensers, for example.
Join ALD History: www.aldpulse.com/node/189
SEMICON Europa 1999 Thin-Film Capacitors with Tantalum-Hafnium Oxide Nanolaminate Insulator
H. Kattelus and H. Ronkainen, VTT Electronics, Finland
T. Kanniainen and J. Skarp, Microchemistry Ltd., Finland](https://image.slidesharecdn.com/high-kfrallebeyonddramcapacitorsandhkmg-150425160643-conversion-gate01/85/High-k-fur-Alle-Beyond-DRAM-capacitors-and-HKMG-6-320.jpg)
High-k für Alle - Beyond DRAM capacitors and HKMG
- 1. © Fraunhofer Beyond DRAM capacitors and HKMG J. Sundqvist, W. Weinreich, J. Müller, A. Naumann, S. Riedel, P. Polakowski, M. Drescher, K. Seidel, M. Czernohorsky, V. Beyer Fraunhofer Institute for Photonic Microsystems Business Unit Center Nanoelectronic Technologies Dresden (IPMS-CNT) HIGH-K FÜR ALLE! Achtung! High-k Material Fraunhofer IPMS-CNT Dresden www.cnt.fraunhofer.de
- 2. © Fraunhofer Outline Introduction – High-k for semicondcutor applications First High-k by ALD Introduction of High-k MIM Capacitors Memory and Logic devices High-k devices Fraunhofer CNT High-k Devices Group Integrated MIM Capacitors for SoC / SiP Ferroelectric High-k for FeFET / FRAM - CNT confidential -
- 3. © Fraunhofer First High-k on a silicon surface by ALD 1969 Join ALD History: www.aldpulse.com/node/189
- 4. © Fraunhofer Sven Lindfors (left) Constructing ALD R&D and production tools since 1975 (Lohja Oy, Mikrokemia Oy, ASM Microchemistry Ltd., Picosun, …) Dr. Tuomo Suntola (right) Demonstrated ALD 1974 at Instrumentarium Oy, Finland Patented ALD (ALE) 1977 T. Suntola, "Methods for producing compound thin films", US patent 4058430 ALD / ML – Historical background / Hall of fame Prof. V.B. Aleskovskii (left) Proposed the concept of the Matrix Theory in his Ph.D. thesis published in 1952 [under investigation]. Prof. S.I. Kol’tsov (right) First publications as Molecular Layering (ML) in the 1960s from Leningrad Technological Institute. Join ALD History: www.aldpulse.com/node/189
- 5. © Fraunhofer First application of High-k MIM capacitor 1992 SEMICON Europa 1999 Thin-Film Capacitors with Tantalum-Hafnium Oxide Nanolaminate Insulator H. Kattelus and H. Ronkainen, VTT Electronics, Finland T. Kanniainen and J. Skarp, Microchemistry Ltd., Finland Patented in Finland 1992 - Insulation in the form of a layer with high permittivity and method for the manufacture thereof Join ALD History: www.aldpulse.com/node/189
- 6. © Fraunhofer First application of High-k MIM capacitor 1992 1992 : Insulation in the form of a layer with high permittivity and method for the manufacture thereof The invention concerns an insulation comprising laminate construction 3 containing metal oxide and a method for the manufacture thereof. The laminate construction 3 according to the invention contains a metal oxide in at least two different tungsten groups, of which the first metal oxide has high permittivity and the second metal oxide has low stray flux . Both the metal oxides are at least essentially in amorphous form. Tantaloxide is advantageously used as the first metal oxide and hafnium oxide as the second metal oxide. According to the invention a film is achieved with high permittivity and low losses in low manufacturing temperatures, for example 300 degrees C, and treatment with after-heating is not required. The quality factor Q = [omega] C/G of the insulation is better than 500 and the dielectric constant is advantageously at least 15.; The layer of insulation can advantageously be used in thin film condensers, for example. Join ALD History: www.aldpulse.com/node/189 SEMICON Europa 1999 Thin-Film Capacitors with Tantalum-Hafnium Oxide Nanolaminate Insulator H. Kattelus and H. Ronkainen, VTT Electronics, Finland T. Kanniainen and J. Skarp, Microchemistry Ltd., Finland
- 7. © Fraunhofer First application of High-k MIM capacitor 1992 1992 : Insulation in the form of a layer with high permittivity and method for the manufacture thereof laminate construction the first metal oxide has high permittivity and the second metal oxide has low stray flux . amorphous form. Tantaloxide hafnium oxide low manufacturing temperatures dielectric constant is advantageously at least 15. Join ALD History: www.aldpulse.com/node/189 SEMICON Europa 1999 Thin-Film Capacitors with Tantalum-Hafnium Oxide Nanolaminate Insulator H. Kattelus and H. Ronkainen, VTT Electronics, Finland T. Kanniainen and J. Skarp, Microchemistry Ltd., Finland
- 8. © Fraunhofer High-k for Logic and Memory Applications FEOL HKMG Technologies 3D MIM Capacitor Replacement Gate, High-k First, FinFET Memory Samsung Stacked DRAM MIS 90 nm 2004 Intel 45 nm 2007 Al2O3 Infineon DT DRAM 70 nm 2005 AMD 32nm 2011 Intel 22nm 2011 STMicroelectronics 2003 TiN / Ta2O5 / TiN
- 9. © Fraunhofer High-k Devices : Integrated as System on Chip (SoC) Transistor Technology: Planar, FinFET, FDSOI, … Embedded Memory: DRAM RRAM FRAM FeFET Integrated Passives : Decoupling Capacitors
- 10. © Fraunhofer High-k for : eDRAM – Back End Via Technology STMicroelectronics, Renesas, Intel Renesas' capacitor in porous low-k (CAPL) eliminates W bypass contacts for reduced eDRAM delay (IEDM2010) Intel’s new embedded DRAM technology as presented at VLSI 2013 ads 128 MB Cache “A 22nm High Performance Embedded DRAM SoC Technology Featuring Tri-Gate Transistors and MIMCAP COB”
- 11. © Fraunhofer High-k for : eDRAM – Front End Deep Trench Technology ■ The embedded deep trench DRAM. IBM has a long history in the field and they have now brought it to the point where access time is shorter than SRAM ■ The trench capacitors are also used as decoupling capacitors ASMC 2012 http://electroiq.com/chipworks_real_chips_blog/author/insights-from-leading-edge/ eDRAM Decoupling Capacitors
- 12. © Fraunhofer High-k for: RRAM in high-density crossbar arrays Imec reported “smallest fully-functional HfO2- based Resistive RAM cell” 10-nm by 10-nm at IEDM 2011/2012 (www.imec.be) Samsung Advanced Institute of Technology and Sejong University published a RRAM cell using asymmetric Ta2O5−x/TaO2−x bilayer structures Myoung-Jae Lee et al, A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5−x/TaO2−x bilayer structures Nature Materials 10, 625–630 (2011)
- 13. © Fraunhofer High-k for: RRAM a promising alternative to EEPROM and Flash in embedded applications* The basic resistance switching memory cell in RRAM consists of an insulating or semiconducting material sandwiched between two highly conductive electrodes like a MIM (metal-insulator-metal) structure. Resistive switching property has been observed in most of the transition metal oxide materials: *Says Harry Luan, CTO Kilopass Technology Inc. TiOx, VOx, NiOx, CuOx, ZnOx, ZrOx, HfOx, TaOx, WOx, and SrTiOx. Even the prevalent SiOx can be set and reset into substantially different resistance states. It is this readily available material in standard CMOS fabs that makes RRAM particularly attractive for embedded NVM applications. RRAM provides a promising alternative to EEPROM and Flash in embedded applications especially at process geometries of 28nm and below.
- 14. © Fraunhofer Applications of High-K Materials at Fraunhofer CNT Transistor TechnologyFerroelectric Memory FeFET/FRAM Integrated Capacitors System in Package (SiP) System on Chip (SoC) Advanced CMOS Source : GF Metal High- k Si
- 15. © Fraunhofer High-k dielectrics Research & Development 3D High-k Material and Process Development Electrical Characterization Reliability and Test Technology Integration
- 16. © Fraunhofer FHR ALD 300® Jusung EUREKA® ASM Pulsar 3000® External Lab Process transfer ALD Experts ASM A412® High-k dielectrics Precursor & Process Development
- 17. © Fraunhofer Applications of High-K Materials at Fraunhofer CNT Integrated Capacitors System in Package (SiP) System on Chip (SoC) 2D / 3D Test chip on 300mm W. Weinreich et al - International Conference on Semiconductors Dresden-Grenoble 2013, Dresden
- 18. © Fraunhofer Applications of High-K Materials at Fraunhofer CNT Integrated Capacitors System in Package (SiP) System on Chip (SoC) W. Weinreich et al - International Conference on Semiconductors Dresden-Grenoble 2013, Dresden
- 19. © Fraunhofer Applications of High-K Materials at Fraunhofer CNT Integrated Capacitors System in Package (SiP) System on Chip (SoC) Demonstrator module 4 mm² with~80 million trenches CD/Pitch variation Planar vs. 3D benchmark W. Weinreich et al - International Conference on Semiconductors Dresden-Grenoble 2013, Dresden
- 20. © Fraunhofer Applications of High-K Materials at Fraunhofer CNT Integrated Capacitors System in Package (SiP) System on Chip (SoC) -4 -3 -2 -1 0 1 2 3 4 1E-10 1E-9 1E-8 1E-7 1E-6 AR 13:1 AR 15:1 AR 20:1 4mm² Demo AR20:1 J(A/µF) Bias (V) W. Weinreich et al - International Conference on Semiconductors Dresden-Grenoble 2013, Dresden
- 21. © Fraunhofer Applications of High-K Materials at Fraunhofer CNT Integrated Capacitors System in Package (SiP) System on Chip (SoC) Demonstrator module 4 mm² with~80 million trenches CD/Pitch variation Planar vs. 3D benchmark W. Weinreich et al - International Conference on Semiconductors Dresden-Grenoble 2013, Dresden
- 22. © Fraunhofer Applications of High-K Materials at Fraunhofer CNT Integrated Capacitors System in Package (SiP) System on Chip (SoC) • 100 nF/mm2 • Reliability pass for 10 years (3.5V) W. Weinreich et al - International Conference on Semiconductors Dresden-Grenoble 2013, Dresden
- 23. © Fraunhofer Applications of High-K Materials at Fraunhofer CNT Integrated Capacitors System in Package (SiP) System on Chip (SoC) Optimized electrical properties of planar capacitors by reduced deposition temperature for top electrode Overall thermal budget BEoL compatible Capacitor can be integrated both as SiP or SoC system 220 nF/mm2 capacitors for buffer application with operation voltage of 3.5 V by 3D structures and high-k dielectrics 10 years reliability pass at continuous 3.5 V Possible scaling towards >1µF/mm² and for various voltage ranges Process module available as demonstrator and for loop lots W. Weinreich et al - International Conference on Semiconductors Dresden-Grenoble 2013, Dresden
- 24. © Fraunhofer Applications of High-K Materials at Fraunhofer CNT Ferroelectric Memory FeFET/FRAM Perovskite based ferroelectrics (PZT or SBT) has fundamental shortcomings. Unlike the current-based STT-MRAM, RRAM, PCRAM and Flash technologies the ferroelectric approach is based on a field effect and consumes the lowest power during switching. Scalability and manufacturability on the other hand still remain a major issue when utilizing perovskite- based ferroelectrics. The world´s most aggressively scaled FeFETs Using a CMOS compatable ferroelectric Si:HfO2 In a 28 nm HKMG stack TiN/Si:HfO2/SiO2/Si
- 25. © Fraunhofer Applications of High-K Materials at Fraunhofer CNT Ferroelectric Memory FeFET/FRAM The world´s most aggressively scaled FeFETs Using a CMOS compatable ferroelectric Si:HfO2 In a 28 nm HKMG stack TiN/Si:HfO2/SiO2/Si
- 26. © Fraunhofer Thank You! Funding : 14
- 27. © Fraunhofer “Open Intro of the Virtual project on the history of ALD” by Riikka Puurunen in SlideShare 14.9.2013 Virtual Project on the History of ALD: Introduction • GOAL: generate a common view on the early evolution of ALD in a collaborative project by the whole ALD community • UNKNOWNS: ALD done under the name Molecular Layering (ML) made in the Soviet Union starting from 1960’s • INVITATION TO PARTICIPATE: www.aldpulse.com/node/189, signed by Riikka L. Puurunen VTT, Aziz Abdulagatov NIST, Jonas Sundqvist Fraunhofer IPMS-CNT, Annina Titoff aldpulse.com Anyone welcome to join! Participation: read & comment on the significance of at least one historical publication that interests you. You may also help building a complete list of early publications, here. Different backgrounds of the participants beneficial Open for contributions until the end of 2013 To be carried out in atmosphere of openness, respect and trust
- 28. © Fraunhofer “Open Intro of the Virtual project on the history of ALD” by Riikka Puurunen in SlideShare 14.9.2013 How will the results be published? • POSTER at the 12th Baltic ALD conference • Helsinki, Finland, May 12-13, 2014, see http://www.aldcoe.fi/bald2014/ • CONTENTS: Both the literature and the comments will be listed. • AUTHORSHIP: • Everyone, who contributed, will be an author • 10 to 100 authors expected, and even more would be ok • Author list will be alphabetical, on the basis of the last name, to highlight that everyone’s contribution is of equal value • POSTER also later at ALD 2014? • If you want to discuss how to publish the results, please join the ALD History subgroup in LinkedIn
- 29. © Fraunhofer “Open Intro of the Virtual project on the history of ALD” by Riikka Puurunen in SlideShare 14.9.2013 Additional material related to the “virtual project on the history of ALD”
- 30. © Fraunhofer “Open Intro of the Virtual project on the history of ALD” by Riikka Puurunen in SlideShare 14.9.2013 Timeline: • Public discussions in LinkedIn in the group “ALD – atomic layer deposition” • “ What are the "Molecular layering" papers by Koltsov from "early 1960's"? “ • Private discussions from May 2013 on by Riikka Puurunen and Aziz Abdulagatov, soon joined by Jonas Sundqvist and Annina Titoff • Planning how to realize a world-wide open effort • ALD History LinkedIn subgroup created June 20, 2013 • 35 members as of 14.9.2013 • ALD History Mendeley group opened June 25, 2013 • Introduction and Invitation to participate published July 25, 2013, link • Announcement of the project at ALD 2013, San Diego, July 30, 2013 • SlideShare for use August 18, 2013 (ALD 2013 presentation, link) • First Comment by a visitor in the Google file August 24, 2013 • Introduction slides uploaded for free use in SlideShare August 31, 2013, link • Includes description of the publication plan for BALD 2014 • Announcement of the project at MME 2013, Helsinki, Sept 2, 2013 • Announcement of the project at EuroCVD-19, Varna, Sept 5, 2013
- 31. © Fraunhofer “Open Intro of the Virtual project on the history of ALD” by Riikka Puurunen in SlideShare 14.9.2013 About the logo of the “virtual project” • Logo has been designed by Riikka Puurunen (June 2013) for use in the LinkedIn ALD History group as well as other communication related to the virtual project • The history of ALD is not black and white, but better described in shades of grey; thus, the logo was made in shades of grey. • With this virtual project, we are in practice (re-)writing the early history of ALD on the ML works, so “history” is in a handwriting-type font
- 32. © Fraunhofer “Open Intro of the Virtual project on the history of ALD” by Riikka Puurunen in SlideShare 14.9.2013 About how to use this file • This is a slide-formed introduction to the virtual project, to be kept and updated in SlideShare at least during fall 2013. • This is aimed for introducing the project in class, at conferences, …, and can be used by anyone interested • You may download a copy of the file and use it in the way you want (e.g. remove the for-your-purpose unnecessary slides) • If you see a need for change in the contents, please do not modify the contents yourself, but leave a comment to the file in Slideshare in the Comments section after this slide we can make and upload an improved version. • When there is new significant info that should be made available in this presentation, this slide set will be updated and re-loaded in SlideShare • Please consider the date indicated the “version number”