Journal new horizons volume 81-82

Smart Grid Capabilities, Infrastructure, Impact on Power Suppliers/Consumers and Concerns
Riaz Ahmad Rana, Dr. Umar Tabrez Shami, Muhammad Saleem and Nabeel Khalid
ABSTRACT
his paper dwells on the need to integrate existing
traditional sources of supply and the renewable
sources in order to establish a new energy system
which is energy efficient, reliable, controllable, secure,
compatible, economical and sustainable. Smart grid can
overcome existing and future challenges in a cost effective
manner. In this paper, the main focus is on the smart grid
infrastructure, its capabilities, communication scenarios,
technologies and energy management. The implementation
of the vision of modernized intelligent smart grid can
overcome problems and challenges of traditional electricity
grids and utilities. The paper also focuses on the services
and factors that attract the consumers and utilities to
change the way they operate in order to improve the current
services. Various measures are proposed to help in
implementation and adoption of smart grid vision in
Pakistan. Finally, paper presents smart grid research
programs, deployments, issues and concerns.
KEYWORDS – smart grid, renewable sources, load
patterns, infrastructure, utilities, compatible, sustainable,
scenarios.
1. INTRODUCTION
The term smart grid refers to the next generation electrical
power grid in which information, communication and
control technologies are used to collect process and transfer
data/information between utility companies and customers
in an automated manner with negligible delays [1]. A fully
automated smart grid as shown in figure-1 has the following
benefits over a traditional electric grid:
 Power flow is bi-directional in smart grid while uni-
directional in traditional grid [2].
 Power generation is distributed in smart grid while
centralized in traditional grid.
 Customers participate in smart grid as against in the
traditional grid.
 Smart grid accessibility is expandable while of traditional
grid is limited. e.g., enabling transition to plug-in-vehicles
[3]
 Smart grid is environmental friendly as against that
traditional girds.
 Power storage is possible in case of smart grid.
 Smart grid offers real time communication between
suppliers, consumers, smart devices and regulating
authorities as compared to traditional grid.
 Reliability, stability, controllability, efficiency and
economics of smart grid is higher than that of traditional
grid.
 Smart grid uses sensors throughout the network as against
in traditional grid.
Figure-1: Pictorial Concept of Automated Smart Grid [4]
2. CAPABILITIES OF SMART GRID
Reliability: Smart grid ensures the reliability of the system.
It detects and removes electrical faults automatically.
Network Flexibility & Integration: Smart grid facilitates
centralized as well as distributed energy sources. Traditional
energy generation units and distributed generation units like
solar systems, fuel cells, wind turbines, pumped
hydroelectric power plants and superconducting magnetic
coils may be integrated to improve system efficiency and
flexibility [5].
Transmission Enhancement: : Smart grid uses FACTS
(Flexible AC Transmission Systems), HVDC (High Voltage
DC Systems), DLR (Dynamic Line Rating Technology) and
HTS (High Temperature Superconductors) to improve
transmission efficiency [6].FACTS and HVDC technologies
are used to enhance the controllability of transmission line
and optimize power transfer capability.DLR indentifies
current carrying capability of a section of a network and
optimizes utilization of existing transmission assets.HTS are
used to reduce transmission losses and limit fault currents.
Load Management: In smart grid, efficiency of the power
usage can be increased by managing the load at consumer
side. Power plants do not need to produce extra energy
during peak-load hours.
Demand Response Program: Smart devices installed at
utility side and consumer side share information with each
T

other using communications technologies and remote
switching is made in accordance with the consumer choice.
Utility companies can reduce consumption by
communicating directly to devices installed at consumer end
in order to prevent system overloads [7].
Power Quality: Smart grid provides different grades and
prices of power to different customers. Customers get
uninterrupted supply with better rates. Faults can be cleared
in short time.
Environmental Capabilities: Smart grid helps to reduce
greenhouse gases and other pollutants by reducing
generation from inefficient energy sources and supporting
renewable energy resources. It also replaces gasoline-
powered vehicles with plug-in-electric vehicles.
3.HARDWARE INFRASTRUCTURE
Advanced Metering Infrastructure (AMI): Smart meter is
usually an electrical meter that records consumption of
electric energy in intervals of hours or less and
communicates that information at least daily back to the
utility for monitoring and billing purposes. AMI performs
the following functions:[8]
 Demand Response Program (DRP) to consumers to
reduce energy bills
 Smart metering to collect, store and report customer
energy consumption data to control centers for bill
generation
 Detection of losses and thefts
 Connection and disconnection of supply
Distributed Energy Storage Infrastructure: Distributed
energy sources like wind, solar, biomass etc are integrated
with traditional energy sources. Energy of renewable
sources is stored in batteries and used for dc as well as ac
loads. Addition of this energy optimizes efficiency,
reliability and stability of the power supply system. . Main
obstacle for employing additional flexible storage solutions
such as batteries or pumped storage is their relatively high
cost.
Electric Vehicle (EV) Charging Infrastructure: EV
infrastructure of smart grid handles charging, billing and
scheduling of electric vehicles. An electric vehicle is
defined as a vehicle with an electric battery that can be
charged from the network, i.e. Plug-in-Hybrid electric
vehicles.
Home Energy Management Systems (HEMS):Smart
appliances such as refrigerators ,air-conditioners, fans,
washing machines, etc offer great control and reduce overall
electricity consumption. Digital signal controllers deliver
precise control of all smart appliances. HEMS are the
interface between smart grid and domestic energy objects.
Home energy management collects real time energy
consumption data from smart meter and from various house
objects. Consumers can see how their energy usage affects
their costs and they can change their behavior.
Communication Infrastructure: Communication
infrastructure used in smart grid includes:
1. Wide Area Network
2. Field Area Network
3. Home Area Network
When control centers are located away from consumers and
substations, then wide area network (WAN) is used to
transport real-time measurements of electronic devices
to/from control centers and between different IEDs
(Intelligent Electronic Devices). Smart devices are installed
along power transmission lines, distribution lines,
intermediate stations and substations to get
messages/information and activate control as well as
protection commands received from control centers. IEDs
are micro-processor based smart electronic devices used for
protection, local and remote monitoring and controlling a
power station.
Field area network (FAN) is used to share and exchange
information between applications and control centers that
cover distribution domain. Field based applications like
transmission lines, transformers, circuit breakers, relays,
sensors, voltage regulators, etc use SCADA for exchange of
information or data.
Customer based applications (houses, buildings, industrial
users, etc) use AMI, DR (Demand Response), LMS (Load
Management System), MDMS (Metering Data Management
System), etc. for information and data exchange [5].
Home area networks (HAN) monitor and control smart
devices in the customer domain. In customer domain, ESI
(Energy Service Interface) is used between the utility and
the customers to share information. Customer devices like
fan, refrigerator, air-conditioner, etc are connected to smart
meter via ESI and smart meter communicates with the
utility to exchange information.
4. COMMUNICATION TECHNOLOGIES
Different communication technologies are used for message
and data transfer in transmission, distribution and customer
domains of smart grid. The available network technologies
are:
1. Power line communication technology
2. Dedicated wire line communication technology
3. Wireless communication technology
In power line communication, power lines are utilized for
electrical power transmission as well as data transmission.
Typically data signals cannot propagate through
transformers and hence the power line communication is
limited within each line segment between transformers.

Dedicated wire-line cables separate from electrical power
lines are used for data transmission. Dedicated transmission
medium may be copper wire, coaxial cable, SONET, SDH,
Ethernet and DSL. SONET (Synchronous Optical Network)
is the international transmission standard for optical
networks which gives much more data rates. SONET speeds
are classified as optical carriers 1 (OC-1) to optical carriers
192 (OC-192).
Wireless communication networks are generally employed
for short distance communication and transfer data at low
rate. A number of wireless network standards are available
to transfer data from utility to consumer and vice versa. The
standard802.11 is widely used for LAN which transfers data
at 150 Mbps up to 250 m. The standard 802.16 is used for
broadband wireless internet communication. It sends data
packets at data rate of up to 100 Mbps and covers 50
Km area. WiFi and ZigBee networks are used for home
applications [9].
5. COMMUNICATION SCENARIOS
Communication scenarios represent data flow in smart grid
infrastructure that may help for energy management.
Following communication scenarios are illustrated:
Substation Control Scenario: Real-time monitoring and
control of substation is achieved using local area networks
(LAN), wireless WAN and Ethernet as depicted in figure-2
[10]. Special sensors are installed to take the equipment
status samples, these samples are processed, digitized and
sent to control center of substation for appropriate action.
Each switch processes information and sends processed
message to control center. Network delay for maintenance
purpose is about 1 sec, for real-time monitoring and control
is about 10 ms and for equipment fault information is about
3 ms.
Figure-2: Substation Control Scenario
Transmission Line Monitoring Scenario: Sensors installed
along power lines collect real-time data for line monitoring
and control as laid out in figure-3 [10]. Data is digitized and
transmitted to control center through wide area network.
Transmission delay for fault message should not exceed 3
ms.
Figure-3: Transmission Line Monitoring Scenario
Automatic Meter Reading Scenario: Smart meters send
meter readings automatically to utility companies over
network for customer bill generation as shown in figure-4.
Communication delay for meter readings is acceptable for
few seconds.
Figure-4: Automatic Meter Reading Scenario
Demand Response Decision Making Scenario: In smart
grid, communication network will facilitate suppliers and
customers for energy trading as shown in figure-5[10].
Network delay of a few seconds is acceptable to catch up
with dynamic market states.

Figure-5: Demand Response Decision Making Scenario
Energy Usage Scheduling Scenario: Customers can take
advantage of dynamic energy prices to reduce energy cost
by scheduling time of low energy prices. Prices are low at
night because demand of energy decreases when factories,
schools, universities and office buildings are closed. Prices
are high during daytime because electricity is largely used.
This scenario is depicted below in figure-6 [10].
Figure-6: Energy Usage Scheduling Scenario
6. IMPACT OF OPTIMIZED AUTOMATED
SMART GRID ON SUPPLY COMPANIES
 Real time status monitoring of network and smart
devices
 Quick fault detection, location and troubleshooting
 Network self restoration and reconfiguration
 Direct reduction of energy usage having direct
control on consumer appliances
 Increased capability of distributed generation
 Reduced transport losses
 Reduction of carbon emissions
 Usage of energy storage options
 Increasing network power load factors
7. IMPACT OF AUTOMATED SMART GRID ON
POWER SUPPLY CONSUMERS
 Availability of uninterrupted quality supply
 Promotion of energy usage scheduling
 Plug-in-charging of hybrid vehicles
 Pollution free environment
 Mitigation of energy thefts
8. MAJOR RESEARCH PROGRAMS
IntelliGrid Program (U.S): Started by EPRI to replace
traditional grid system by smart grid in order to improve
quality, availability and controllability of supply delivery
system. IntelliGrid provides funds worldwide to promote
global research efforts and is also supplier of smart grid
components [11].
MGI - Modern Grid Initiative(U.S): A number of bodies like
DOE, NETL, utility companies, customers, and researchers
are doing efforts to develop a fully automated modern smart
grid [12].
Grid 2030 (U.S) Program: Joint program of government
and non-government bodies to improve existing grids
including generation, transmission, distribution and
utilization. The vision of Grid 2030 program is to develop a
more flexible, reliable, controllable and efficient electric
power delivery system for United States. Universities,
research laboratories, R&D departments, industries,
government departments and investors are doing efforts to
meet smart grid targets [13].
GridWise Program (U.S): This program facilitates utility
companies and consumers to modernize electric power
delivery system. It is a joint effort started by different
government and non-government departments to implement
the vision of smart grid in America. It provides funds,
technology, software and hardware infrastructure and
assistance to improve electric power delivery system [14].
GridWise Architecture Council (GWAC): Made by U.S,
DEO to enhance interoperability between different smart
devices in the electric supply system. GWAC provides
consultancy to industry and utility companies regarding
improvements in electric power delivery system [15].
GridWorks Program (U.S): The aim of this program is to
improve efficiency, reliability, controllability, availability
and safety of power electric system by optimizing the grid
components. GridWorks emphasis on high quality cables,
supper conductors, modern substations, reliable protective
systems, harmonic free power electronic devices, flexible
distribution systems, reliable transmission systems,
distributed integrated technologies and energy storage
technologies [16].

9. DEPLOYED SMART GRIDS
Enel (Italy) Smart Grid:1st
smart grid project, Completed in
2005, project cost – 2.1 billion euro, annual saving – 500
million euro [17].
Austin, Texas (U.S) Smart Grid: Working since 2003,
currently managing 500,000 real-time devices, servicing
1million consumers & 43000 businesses [18].
Boulder, Colorado Smart Grid:1st
phase completed in
August 2008 [19].
Hydro One Smart Grid: Ontario – Canada, servicing 1.3
million customers since 2010 [20].
10. ISSUES & CONCERNS
 New and immature technology
 Shortage of experts to implement smart grid
 High initial implementation cost
 No consumer privacy
 Complex (variable) rate systems
 Remotely-controlled supply concerns
 Emission of RF signals from smart meters
11. PROPOSALS FOR IMPLIMENTATION OF
SMART GRID VISIONIN PAKISTAN
Government of Pakistan has initiated various projects on
solar, wind and biomass power generation at different areas
to meet demands of increasing loads and this distributed
generation is to be added to national grid. In order to
implement vision of smart grid, following points needs to be
considered:
 Government must make effective and clear policies
on future energy supply.
 National and international investors must be
encouraged and facilitated in all respects to import
infrastructure, technology and standards.
 Small projects regarding renewable energy (solar,
wind, biomass, etc) be initiated and integrated to
overcome existing and future power shortage crisis.
 Power energy departments be headed by qualified,
eligible, dedicated, devoted and experienced
persons to manage and implement vision of smart
grid.
 Tax free import of hardware and technology be
ensured.
 Universities, researchers and R&D departments be
funded to carry out research projects to improve
power delivery system using smart grids.
12. CONCLUSIONS
It is concluded that smart grid is expected to relieve the
energy shortage problems by integrating renewable energy
resources and two-way communication network may help
for cost effective energy management.
Further, the issues of aging power infrastructure, work
manpower, power theft, pollution free environment, electric
power quality, availability, stability and controllability can
be solved by deploying smart grids.
Smart grid infrastructure, communication technologies,
communication scenarios, impact on utilities and
consumers, research programs and smart grid deployments
have produced new issues and concerns.
This work summarizes that fruitful collaborative efforts are
still required from industrialist, transmission and
distribution companies, power researchers, power
monitoring bodies, government officials, power traders,
policy makers, consumers, power equipment manufacturers
and software experts to integrate and optimize emerging
technologies for implementation of smart grid.
13. REFERENCES
[1] Ye Yan, ―A survey on smart grid communication
infrastructure: Motivations, Requirements and
Challenges‖ IEEE communications surveys & tutorials,
vol. 15, NO. 1, First Quarter 2013
[2] Xi Fang, ―Smart Grid – The New and Improved Power
Grid‖ IEEE communications surveys & tutorials, vol.
14, NO. 4, Fourth Quarter 2012
[3] Fangxing Li, ―Smart Transmission Grid: Vision and
Framework‖ IEEE transaction on smart grid, Vol.1,
September 2010.
[4] Xiang Lu, ―An Empirical Study of Communication
Infrastructures towards the Smart Grid‖, IEEE
transaction on smart grid, Vol-4, NO. 1, March 2013
[5] Xi Fang, ―Smart Grid – The New and Improved Power
Grid‖ ‖ IEEE communications surveys & tutorials, vol.
14, NO. 4, Fourth Quarter 2012
[6] Chun-Hao Lo, ―The Progressive Smart Grid System
from Both Power and Communications Aspects‖ IEEE
communications surveys & tutorials, vol. 14, NO. 3,
Third Quarter 2012
[7] Chun-Hao Lo, ―The Progressive Smart Grid System
from Both Power and Communications Aspects‖ IEEE
communications surveys & tutorials, vol. 14, NO. 3,
Third Quarter 2012
[8] Daojing H, ―An Enhanced Public Key Infrastructure to
Secure Smart Grid Wireless Communication Networks‖
IEEE networks January/February 2014
[9] Zhong Fan ―Smart Grid Communications: Overview of
Research Challenges, Solutions, and Standardization
Activities‖ IEEE communications surveys & tutorials,
vol. 15, NO. 1, First Quarter 2013

[10] Wenye Wang, Yi Xu, Mohit Khanna ―A survey on the
communication architectures in smart grid‖, computer
networks 55 (201) 3604-3629, www.elsevier.com
[11] ―Electric Power Research Institute (EPRI)‖
www.epri.com/IntelliGrid(online)
[12] U.S. Department of Energy, National Energy
Technology, Modern Grid Initiative,
www.netl.doe.gov (online)
[13] U.S. Department of Energy, Office of Electric
Transmission and Distribution, ―Grid 2030‖
www.oe.energy.gov
[14] U.S. Department of Energy, Office of
ElectricityDelivery and Energy Reliability,
GridWorkswww.gridwise.org
[15] GridWise Architecture Council Interoperability
Context Setting Framework, www.gridwiseac.org
[16] U.S. Department of Energy, Office of Electricity
Delivery and Energy Reliability, GridWorks
www.oe.energy.gov
[17] NETL Modern Grid Initiative-Powering Our 21 st
Century Economy, www.netl.doe.gov
[18] ―Building for the future‖: Interview with Andres
Carvallo, CIO-―Austin Energy
Utility‖www.nextgenpe.com
[19] Betsy Loeff (2008-03), ―AMI Anatomy: Core
Technologies in Advanced Metering‖ Ultrimetrics
Newsletter, www.mvv.de
[20] Best Loeff, Demanding Standards: Hydro One aims to
leverage AMI via interoperability www.elp.com
14. BIOGRAPHIES
****
Riaz Ahmad Rana is an Assistant
Professor in Electrical Engineering
Department, University of Central
Punjab Lahore Pakistan. He has eighteen
years field as well as academic
experience. His research interest includes
electrical machines, renewable energy
resources and smart grid.
rana.riaz@ucp.edu.pk
Nabeel Khalid is a lecturer in department of
Electrical Engineering, University of Central
Punjab Lahore. His research interest includes
electrical machines, renewable energy
resources, instrumentation & process control
and smart grid. nabeel..khalid@ucp.edu.pk
Dr. Umar Tabrez Shami is an Assistant
Professor in the department of Electrical
Engineering, University of Engineering &
Technology (UET) Lahore Pakistan. He
received his Ph. D. degree in Power
Electronics from Tokyo Institute of
Technology Japan. His research interest
includes electrical machines, power
electronics, renewable energy resources
and smart grid. ushami@ucp.edu.pk
Muhammad Saleem is currently working as
lecturer in Electrical Engineering Department,
University of Central Punjab Lahore. He
received his M. Sc. degree in power engineering
from University of Darmstadt Germany. His
research interest includes power systems, energy
storage technologies, renewable energy
resources and smart grid. He has been working
on smart grid project at HSE Germany.
m.saleem@ucp.edu.pk

Current Transformer Design Optimization
Muhammad Umar Aziz1
, Tahir Izhar2
and Sohail Mumtaz Bajwa3
1،3
National Transmission and Despatch Company Limited (NTDCL)
WAPDA, Lahore, Pakistan
2
Department of Electrical Engineering,
University of Engineering and Technology, Lahore, Pakistan
Abstract
his paper devises a computer-aided program to design an
optimized Current Transformer (CT) not only fulfilling the
basic requirements of the user/client but also presents the
most economical design. In the first step, basic equations for
designing the CT have been set up and a computer program has
been developed. Then a numerical optimizing technique i.e. pattern
search has been used for determining the most economical design
for a certain rating of a CT. To evaluate the workability and
practicability, a CT has been designed and manufactured using the
results obtained from the program. The results of this work have
been then compared with the locally manufactured CT of
same rating. Computer application has been developed
using MS Excel with background coding in Visual Basic
(VB).
Keywords— Current Transformer, CT Design,
Optimization, Computer, Visual Basic,
I. INTRODUCTION
A CT in many ways differs from a normal transformer. It is
connected in series with a circuit, whose current is needed to
measure, and its primary and secondary currents are
independent of the burden and these currents are of prime
interest. The voltage drops are only of interest for
determining exciting currents [1] - [3].
There are two types of CTs based on their application in
power system [1], [4], [5]:
i. Measuring CT to feed the current to meters / energy
meters
ii. Protection CT to feed current to protective relays.
The IEEE papers referred at [2] and [3] published in recent
year i.e. 2007 and 2011 respectively, only discusses the
performance and behaviour of a current transformer under
different operating conditions while the papers at [6] and [7]
published fifty years back, provide the basics calculation of
CT parameters.
In the forthcoming sections, the basic theory relating to a
current transformer, equations involved in the design
process and the outline of algorithm employed to obtain the
optimized solution will be discussed. In last two sections,
the physical and electrical parameters of the CT designed
using the developed program shall be compared with the CT
manufactured locally to conclude viability of the work-done.
For the purpose of this research work, a 12 kV, 800/5 A
metering current transformer of accuracy class 0.5 has been
selected. This type of CT is commonly used in 11 kV
incoming and outgoing feeders‘ panel in NTDC/
Distribution Companies‘ systems. In the first step, design
equations for the current transformers have been step up
then the numerical optimization technique has been used to
obtain the most economical design. The computer
application has been developed in a macro enabled EXCEL
workbook.
II. BASICS OF CURRENT TRANSFORMER
A. Working Principle of a Current Transformer
For a short circuited CT [1], [2], [8], the simplified
equivalent model of the CT is:
Figure 1: Simplified equivalent model of CT [1].
According to above,
(1)
I1 = Primary current
I2 = Secondary current
N1 = Number of primary turns
N2 = Number of secondary turns
Also, vector diagram for 1:1 current transformer, describing
the relation between current, voltage and flux may be
represented as follow:
Figure 2: Vector diagram showing the relation between
current, voltage and flux in a current transformer [9].
B. Determination of Ratio and Phase Errors
Ratio and phase error introduced by a CT in the secondary
current, are the function of the magnetizing
T
Eg = Induced Secondary Voltage
Φ = Flux
I1 = Primary Current
I2 = Secondary Current
Ie = Excitation Current
α = angle of excitation current
β = phase angle

current Ie. The error produced in magnitude is due to the
watt loss component of the excitation current Ie and the
phase error is proportional to the reactive component of this
current.
The phase error being the function of reactive component of
the excitation current which varies widely over the current
range, take the top priority in the design consideration of the
current transformer [8].
A vector diagram between primary and secondary of 1:1
current transformer is shown in Fig. 3 with making two
assumptions [1] and [8]:
a) The leakage reactance of the current transformer is
neglected
b) The burden is purely resistive.
Figure 3: Vector diagram showing relation between primary
and secondary current [1] & [8].
For above vector diagram;
(2)
(3)
However, in actual θ is so small that [8]
(4)
Also
(5)
Since θ is so small, hence the approximation [8]
(6)
and the ratio error as
(7)
III. CURRENT TRANSFORMER DESIGNING
The designing process of a CT consists of the following
step:
A. Core Design
It is first and the most essential design parameter of a CT.
Ratio and phase errors of a CT are directly dependent on
this.
For toroidal cores, following three parameters are selected
by the designer:
i) Internal diameter of the core (ID)
ii) Outer diameter of the core (OD)
iii) Step thickness or axial height of the core (HT)
Figure 4: Geometry of toroidal core
The selection of internal diameter (ID) of the core is
function of primary conductor size and Insulation class of
CT.
B. Winding Design
The designing of winding in the case of CTs is quite straight
forward and easy task as the maximum current flowing
through the secondary winding is independent of VA burden
on the current transformer.
The normally used secondary current ratings are of 1 A or 5
A, therefore, selection of the conductor depends upon the
type of insulation used i.e. oil type or cast resin and the short
circuit current capability of CT.
C. Error Calculation
After finalizing the core and winding design, the ratio and
phase error shall be calculated for the designed core-coil
assembly. The results should meet the error limits
mentioned in the IEC 60044-1. The steps involved in the
calculation are:
i. Calculation of secondary induced emf Esi(V):
(8)
where
Z is total secondary impedance
(9)
Where
Rb = Resistance of Burden in Ohm
Rwind = Resistance of Winding at 75o
C
I1
I2
I1 = Primary Current
I2 = Secondary Current
Ie = Excitation Current
θ = phase angle
Ir = reactive component of Ie
Iw = watt loss component of Ie
N2 = No. of Secondary turns
e = ratio error

Xb= reactance of Burden in ohm
ii. Determination of Flux density Bm(T) required to induce
Esi
(10)
Where
f = frequency in Hz
N2 = number of secondary turns
Acore = core area in mm2
iii. Calculation of reactive and watt loss current
The reactive (Hr) and watt-loss (Hw) component of
magnetizing force necessary to induce the flux density Bm
can be obtained from the magnetizing curve of the core and
consequently the Ir and Iw can be found as under:
Ir = Hr x Lm & Iw = Hw x Lm (11)
Where Lm = mean length of core in m.
iv. Determination of Ratio and phase errors
The error then calculated using equations (4) and (7).
D. Calculation of Instrument Security Factory (ISF)/
Accuracy Limit Factor (ALF)
The instrument primary current limit of metering CT is the
value primary current beyond which CT core becomes
saturated while the accuracy limit primary current of
protection CT is the value of primary current up to which
CT does not saturate. The ISF or ALF can be found using
following relations:
i. Calculation of secondary limiting EMF and
corresponding flux density:
Elimit = ISF x Is x Z or ALF x Is x Z (12)
(13)
ii. Determination of Ie(A) and subsequently calculation of
ISF/ALF:
Ie = Ho x Lm (14)
For measuring core:
(15)
For protection core:
(16)
IV.METHODOLOGY
Since it has been discussed in the above section, the core
design is the first and the most important step as it directly
affects the ratio and phase errors, therefore independent
variables which affect the CT performance are ID, OD and
HT. Other variable may be the diameter of the secondary
conductor, but this does not have much effect on the
performance of CTs. Only core design parameters have been
considered while writing the optimization code.
The algorithm used for the optimization uses the basic
blueprint of pattern search [10]. The flow chart of the
working of the algorithm is shown below:
Step-1: Input data
Step-2:
Estimate an initial design and stores it as
optimum solution and corresponding
material cost as minimum cost
Step-3: Generate discrete sets of each independent
variable using some step value X={…,xi+Δ,
xi, xi-Δ,…}
Step-4:
Using discrete sets of Step-3, generate
unique combinations independent variables
Step-5: Do design calculations for each
combination
Step-6: Find the combination giving minimum cost
and meeting requirement
Step-7: while material cost obtained in Step-6
<>material cost of Step-2
material cost obtained in Step-6 is new
optimum solution and go to Step-3
Step-8: Output the result
V. SIMULATION
Algorithm has been developed using macros of MS EXCEL.
The macro consists of three Sub routine. First sub routine
returns the initial solution, second Sub routine do the
calculations of the combinations while in third Sub routine,
main code is implemented. The graphical user interface has
been developed using worksheets of MS EXCEL.
As it mentioned in above sections, we have selected the CT
having characteristics as mentioned below:
i. Transformation ratio = 800 A / 5 A
ii. Type of CT = Metering (cast resin Box Type)
iii. Voltage class = 12kV
iv. Accuracy class = 0.5
v. Instrument security factor = 10
v. Short time withstand current = 12.5kA

In order to obtain the results from the program developed,
following steps are performed:
Step1: The above data is entered in the worksheet name
―Input‖. Also the other necessary inputs like clearance,
size of primary conductor, rate of copper and core are also
entered.
Step2: After providing the necessary inputs, push the
button ―Run optimization‖, and the ‗opt‘ worksheet is
appeared on which different calculation are being done by
the main code.
Step3: When the program finds the optimum solution, it
terminates the loop and the ‗output‘ sheet appears.
The snapshot of ‗output‘ sheet is shown below:
Figure 5: Snapshot of ―Output‖ Worksheet
The output result obtained using this program is as
under:
Table 1 PHYSICAL DIMENSION AND WEIGHTS
Dimensions in
mm
ID OD HT
75 85 35
ID_final OD_final HT_final
60 100 50
Weights in kg
Wcore Wcond Wcore+coil
0.35 0.422 0.772
Table 2 Errors calculation
Ip 5% 20% 100% 120%
40A 160A 800A 960A
Is 0.25A 1A 5A 6A
CALCULATED
Phase 31.748‘ 15.463‘ 5.304‘ 4.839‘
Ratio 0.628% 0.356% 0.250% 0.251%
REQUIRED
Phase 90‘ 45‘ 30‘ 30‘
Ratio 1.50% 0.75% 0.50% 0.50%
VI.VERIFICATION OF RESULTS & COMPARISON
Based upon output results, the core coil assembly of
the CT was manufactured and tested using the CT
accuracy test equipment in order to ascertain the
viability of the devised program for real world
implementation.
Figure 6: Picture of designed CT core and coil
assembly
The physical dimensions and results of manufactured
core coil assembly are summarized below:
Table 3 Physical Dimension and weights
Dimensions in
mm
ID OD HT
75 85 35
ID_final OD_final HT_final
62.4 106.3 43
Weights in kg
Wcore Wcond Wcore+coil
0.40 0.43 0.830
The graphical representation of ratio and phase errors‘
allowable limit, their calculated and measured value
are shown Figure 7 & 8.

Figure 7: Percentage rated primary current Vs % Ratio error
Figure 8: Percentage rated primary Current Vs % Phase
error
The weights and material cost of the designed CT has been
compared with the CT of same type manufactured locally.
The comparison showed that the cost of designed CT‘s core
coil assembly is 80% less than the locally manufactured CT.
The summary of the comparison made is shown below:
Figur
e 9: Graphical representation of weight and Price
Comparison
It should also be noted that above comparison only
considers the saving in secondary core coil assembly cost.
The saving in primary conductor and volume of epoxy resin
has not been considered in the comparison. If these are also
taken into consideration, it may be established that the
designed CT is not only economical but also it provides
saving in volume/ space.
VII. CONCLUSION
The devised computer aided program for the designing of
CT is not only easy and time saving but also provides the
best economical design possible keeping in view all the
practical constraints. The results obtained by using this
program not only conform to experimental data but also
provides economical solution as the saving in the copper
and core is 85 % and 75 % respectively as compared to the
locally manufactured CT which results in the cost of
reduction of more than 80%.
The program developed can be improved by considering the
industrial practices and also by including other features
which are not included in this work like consideration of
insulating resin and primary turn selections and its size and
their consideration in selection of optimal solution. This
program with slight change can also be applicable for
protection type current transformer.
This paper is based upon the Master’s thesis submitted in
the Eletrical Engineering Department University Of
Engineering And Technology Lahore.
REFERENCES
[1] Instrument Transformer Application Guide, ABB AB,
High Voltage products Department Marketing & Sales
Sweden
[2] M. Yahyavi, F. V Brojeni, M. Vaziri ―Practical
Consideration of CT Performance‖ 60th
Annual
Conference for Protective Relay Engineers, Texas
A&M University 27-29 March, 2007
[3] H. E. Mostafa, A. M. Shalltoot & K..M. Youssef
―Evaluation of Current Transformer Performance in
the Presence of Remnat Flux and Harmonics‖ IEEE
Jordan Conference on Applied Electrical Engineering
and Computing Technology (AEECT), 6-8 Dec 2011
[4] Instrument transformer Part-1 Current Transformer,
IEC Standard 60044-1, Edition 1.2, 2003-02.
[5] IEEE Standard Requirements For Instrument
Transformers, IEEE standard C.57.13,1993.
[6] J. Meisel, Member IEEE ―Current Instrument
Transformer Error Calculations‖ IEEE Transaction on
Power Apparatus and System, pp. 63-103, DEC. 1963.
[7] E.C Wentz, Associate AIEE, ―A Simple Method For
Determining Of Ratio Error And Phase Angle In
Current Transformers,‖ AIEEE Transaction, vol. 60,
OCT. 1941.
[8] Wound Cores-A transformer Designer Guide, 1st
Edition by WILTAN TELMAG
[9] Manual of Instrument Transformers - Operation
Principles and Application Information, General
Electric Edition GET-97D
[10] Virginia Torczon, Pattern Search Method for Non-
Linear Optimization (2014) The College of William &
Mary [Online]. Available:
http://www.cs.wm.edu/~va/articles/
***

Creep force analysis at wheel-rail contact patch to identify adhesion level
to control slip on railway track.
Zulfiqar Ali Soomro*
Imtiaz Hussain Kalwar Bhawani Shanker Chowdhary
PhD Scholar (Mech;Engg) Asstt.prof (Electronics) Emeritous Professor (Electronics)
Mehran University of Engineering and Technology Jamshoro (Sind) Pakistan
.Abstract:
reep forces and creepage has a huge weightage in
railway vehicle transport and wheel;-rail contact
dynamics for detecting adhesion level to avoid the
slippage of wheels from track for smooth running. In this
paper, the wheelset dynamics comprising the longitudinal,
lateral and spin moment creepage and creep forces along
with their respective creep co-efficient has been enumerated
and its mathematical modeling has been framed. The creep
forces and creepage are analyzed under different adhesion
levels to detect slip and slide of railway wheelset to prevent
derailment.
Keywords: creep, adhesion, creepage, slip
1. INTRODUCTION
The interactive forces of the rail and the wheel have a
significant effect on the dynamical behavior of the rail
vehicle. The creep, Adhesion and wear can significantly
affect the railway vehicle dynamics. The adhesion depends
on the rough surfaces and environmental conditions upon
rail runway. The concerned Creep forces depend on the
dimensional profile of the rail and the wheel like the
materials of the wheel and the rail. In order to calculate the
sliding forces on the wheel/rail contact mechanics must be
studied.[1]
There are various rolling contact theories in the literature
that calculate longitudinal and lateral creep forces at the
wheel/rail interface. Some of the more useful theories are
Kalker‘s linear theory, Kalker‘s empirical theory, Johnson
and Vermeulen‘s model, and the Heuristic nonlinear model
[2]. Kalker‘s theories are often used for rail dynamics
studies. Johnson and Vermeulen‘s theory is less accurate but
has greater simplicity [1].
Wheel/rail contact creepages and creep forces are important
in understanding the railway vehicle dynamics. For safe train
operations, wheel/rail adhesion conditions are very
important to consider when studying creep forces in order to
avoid wheel skid during braking. In [3], The Polach
(researcher) observed an advanced model of creep force for
railway dynamic vehicle when running on proper adhesion
limitation. He considered in his study, the influence of
lateral, longitudinal, spin creepages, and the shape of the
elliptical contact on the railway vehicle dynamic system. He
also considered the friction co-efficient for dry and wet
conditions and it is assumed that it is fixed for each
simulation.
*corresponding: zulfiqarali_s@yahoo.com.
In [4] rolling contact phenomena, creepages on wheel/rail
contact, and creep force models for longitudinal train
dynamics are presented. Matsumoto, Eguchi and awamura
[5] have presented a re-adhesion control method for train
traction. Watanabe and Yamashita [6] have presented an
anti-slip re adhesion control method using vector control
without speed sensor.
Mei, Yu, and Wilson have proposed a new approach for
wheel slip control [7]. The study is based on the detection of
torsional vibration of a wheelset when slipping. Considering
the shaft elasticity, a simplified model that consists of
dominant modes of the wheelset is developed to investigate
slip detection and re-adhesion scheme.
The de Beer et al. [8,9] searched a similar theoretical model
based upon the excitation by unstablity lateral creepage.
They have also invented an experimental rig based on a
reduced scale wheel and roller representing the rail
dynamics [10,11].
The Lateral creepage is thus likely to exist in combination
with longitudinal creepage and the influence of longitudinal
creepage on the mechanism of squeal noise behavior
specifically the creepage/creep force relationship is of
interest to learn. This paper presents some experimental
results obtained for combined longitudinal, lateral and spin
creepage. The correlation has been simulated to investigate
the relationship between creepages and creep forces in the
presence of 3-D creepages. Some of the simulated results
from this investigation are presented and discussed below.
2. RAIL WHEELSET DYNAMICS
2.1 Creepage Computation
The Creepages can be formed when the two bodies do not
have the exact same velocities. The term creepage or creep is
used to define the slip ratio. These creepages can be,
longitudinal creepage, lateral creepage and spin creepage.
Figure-1 below shows the graphical representation of
creepages and associated creep forces in longitudinal, lateral
and vertical directions. Since the wheel and rail are elastic
bodies, the contact ellipse has a slip region and adhesion
region.
C

Figure-1 creep and forces acting on wheelset
Sliding occurs when the contact ellipse entirely becomes a
slip region. In other words, when there is not enough
adhesion between the two bodies, they will slip with respect
to each other [2].
Following are the mathematical formulation is framed on
each wheel depending upon its dynamics in terms of creep
forces and total creepage of rail wheelset system.
2.1.1 Longitudinal creep on Rail wheelset
In case of rolling without slipping, the distance traveled by
the wheel in one revolution is equal to the circumference of
the wheel. But when torque is applied to the wheel, the
distance traveled by the wheel in the forward direction is
less than the circumference [12].
Above are angular/forward wheel velocities
Creepage of left wheel =
Creepage of right wheel=
Total longitd; creepage
2.1.2 Lateral creep on Rail wheelset
The Lateral creepage is likely to exist in the combination
with longitudinal creepage and the effect of longitudinal
creepage on the mechanism for created squeal noise
behavior, specifically the creepage and creep force
relationship, is of interest to study and work on. [13].
lateralvel= = Where
Creepage of left wheel (4)
Creepage of right wheel=Creep of left wheel
Total lateral creepage
2.1.3 Spin/moment creep on left/right wheels
The longitudinal creepage λx is related with the difference
between the rolling forward velocity and the circumferential
velocity |V − Vcir|, the lateral creepage λy characterize the
non alignment of the wheel with respect to the rail, while the
spin creepage λsp is related with the concity of the wheel
[14].
SpinL(ΩL and spinR
Total spin creepage (6)
Thus combining all above creepages we get total creepage of
rail wheelset as under.
 22
yx  (7)
2.2 Tangential contact forces
It may be possible to compute the tangential contact forces
using one of the models available in the literature with the
knowledge of the normal contact forces that procure
between the wheel and rail and its creepages, i.e., the
relative velocities. Three models arc presented here in order
to allow for a comparative study between them to be
developed. The Kalker linear evaluates the longitudinal and
lateral components of the creep force and the spin creep
moment, that develop in the wheel-rail contact region. The
figure-2, displays the forward (v), lateral velocity (y) along
with yaw motion (ψ), which have been used in calculating
the creep analysis above. The creep forces acting upon left
and right of rail wheelset in longitudinal, lateral and spin
moment creep directions have been shown and calculated as
under.
Figure-2 creep forces on left & right wheels
The longitudinal creep forces on right/left wheel are
xRxR fF 11 and xLxL fF 11
The lateral creep forces on right/left wheel are
yRyR fF 22 and yLyL fF 22
The Spin moment creep forces on right/left wheel are
RR fF   23 and LL fF   23
Total creep forces =
Where f11, f22 and f23 are the creep coefficient of longitudinal,
lateral and spin moment.
The tangential contact problem resolves the tangential creep
forces acting on the contact patch. A deviation from pure
rolling motion of the wheelset is caused by acceleration,
traction, braking and the presence of lateral forces acting on
the wheel-rail interface.

3. SIMULATION RESULTS
The mathematical model of wheelset dynamics presented in
section-2 has been simulated and the simulation results are
given as under
Fig-3 longitudinal forces on left/right wheels
In above figure-3, the relationship of longitudinal creep
forces on each left and right wheels of railway wheelset
contact have been shown. In this figure, left wheel creep
force denoted by blue diamond reacts upper the black+
representing right wheel creep force. Both lines start from
same origin point below 1 mN, then left wheel force
increases upward and ends on 7 mN, while right wheel force
increases but lower than that of left wheel ending at 4*10^6
N.
In the figure-4, the behavior of the lateral creep forces
relationship for left and right rail wheelset has been denoted
as under. Here lateral forces of left and right wheels start
nearly below 0.2 mN to 1.8*10-9
N. These both lines overlap
eachother as the lateral forces for left and right wheels is
same as their creepages are also same.
The spin moment forces of left and right wheels relationship
has been described as under.
Figure-4 lateral forces on left/right wheels
Here spin force of right wheel denoted by black+ line of
right wheel increases above spin force of left wheel
increment. Both start below 1000 mN, whereas creep force
of right wheel ends upto 6000 mN, while creep force ends
2000mN. From this diagram, it resembles differently as that
of longitudinal creep forces for right and left wheels, where
left wheel creep force is increasing above left wheel. While
here in spin creep force of right wheel is replacing it
Fig-5 Spin moments on left/right wheels
In above fig-6, the total creep forces are compared with total
creepage.
Fig-6 Relation of total creep force/creepage
Here the behavior of both has been shown in straight line,
which shows that there is no tension of slippage which is
ideal condition. Here total creep forces are increasing
upward vertically with rise of total creepage horizontally.
CONCLUSION
In this paper, the creep forces acting upon each wheel of
railway wheelset has been discussed, calculated and
simulated by its expected results. These creep forces are

determined by applying concerned creep coefficient f11= f22=
6.728e6 for longitudinal and lateral creepages while that of
spin creep co-efficient as 1000 N/m2
. The correlation of
these forces has been graphed and determined. However the
fig-6 is shows apparent importance as it enumerates that
creep forces and creepage behave linearly. This linearity of
curve shows that there is no any slip due to sufficient
adhesion level. This linear line proves the maximal of
columb‘s law of motion which states that if the tangential
forces (creep forces) are equal or greater than normal forces
(creepage,μN). This creepage is perpendicular to creep
forces giving relation creep coefficient.
REFERENCES
[1] Garg, V. K., & Dukkipati, R. V. Dynamics of Railway
Vehicle Systems. Ontario, Canada:Academic Press,
1984.
[2] Dukkipati, R. V. Vehicle Dynamics. Boca Raton,
Florida: CRC Press, 2000.
[3] Polach, O., ―Creep Forces in Simulations of Traction
Vehicles Running on Adhesion Limit,‖ Elsevier,
Wear 258, pp. 992 – 1000, 2005.
[4] Kung, C., Kim, H., Kim, M. & Goo, B., ―Simulations
on Creep Forces Acting on theWheel of a Rolling
Stock.‖ International Conference on Control,
Automation and Systems, Seoul, Korea. Oct. 14 – 17,
2008.
[5] Matsumoto, Y., Eguchi, N.& Kawamura, A. ―Novel
Re-adhesion Control for Train Traction Systems of
the ‗Shinkansen‘ with the Estimation of Wheel-to-
Rail Adhesive Force.‖ The 27th Annual Conference
of the IEEE Industrial Electronics Society. Vol. 2, pp.
1207 – 1212, 2001.
[6] Watanabe, T. & Yamashita, M. ―Basic Study of Anti-
slip Control without Speed Sensor for Multiple Drive
of Electric Railway Vehicles.‖ Proceedings of Power
Conversion Conference, Osaka, IEEE Vol. 3, pp.
1026 – 1032, 2002.
[7] Mei, T., Yu, J. & Wilson, D. ―A Mechatronic
Approach for Effective Wheel Slip Control in
Railway Traction.‖ Proceedings of the Institute of
Mechanical Engineers, Journal of Rail and Rapid
Transit, Vol. 223, Part. F, pp.295-304, 2009.
[8] F.G. de Beer, M.H.A. Janssens, P.P. Kooijman,
Squeal noise of rail-bound vehicles influenced by
lateral contact position, Journal of Sound and
Vibration (267) 497–507, 2003.
[9] F.G. de Beer, M.H.A. Janssens, P.P. Kooijman, W.J.
van Vliet, Curve squeal of rail bound vehicles—part
1: frequency domain calculation model, Vol. 3,
Proceedings of Inter noise, Nice, France, pp. 1560–
1563 2000.
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de Beer, Curve squeal of railbound vehicles—part 2:
set-up for measurement of creepage dependent
friction coefficient, Vol. 3, Proceedings of Inter noise,
Nice, France, pp. 1564–1567, 2000.
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de Beer, Curve squeal of rail bound vehicles—part 3:
measurement method and results, Vol. 3, Proceedings
of Internoise, Nice, France, pp. 1568–1571, 2000.
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body system approach for finite-element modelling of
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and M. H. A. Janssens. An investigation into the
influence of longitudinal creepage on railway squeal
noise due to lateral creepage. Journal of Sound and
Vibration, 293, 2006.
[14] J. J. Kalker. A fast algorithm for the simplified theory
of rolling-contact. Vehicle System Dynamics, 11(1),
1982.
****

Hand Structure Analysis for Finger Identification and Joints Localization
Mujtaba Hassan, Muhammad Haroon Yousaf
ABSTRACT
he development of kinematic model of hand can play
a vital role in hand gesture recognition and Human
Computer Interaction (HCI) applications. This paper
proposes an algorithm for finger identification and joints
localization, thus generating the kinematic model of human
hand by means of image processing techniques. Skin tone
analysis and background subtraction is carried out for hand
detection in the workspace. Geometric features of hand are
used for hand identification (left or right), finger
identification and joints localization. Proposed algorithm is
tested for diverse hand poses and remarkable results are
produced. Algorithm not only generates the kinematic model
for the different orientations of the hand but also have very
low computational cost.1
Index Terms — Gesture Recognition, Hand Kinematic
model, Finger detection, Joints Localization.
KEYWORDS – smart grid, renewable sources, load
patterns, infrastructure, utilities, compatible, sustainable,
scenarios.
I. INTRODUCTION
The hand has always been of significant importance to
humans. In everyday life many interactions are performed
by hand including object grasping, message conveying, and
numerous other tasks. Keyboard and mouse are currently the
main interfaces between man and computer. In recent years,
the application of hand gesture has become an important
element in the domain of Human Computer Interaction
(HCI) [1, 2, and 3] or Human Machine Interaction.
Two general approaches can be applied to classify and
analyze the hand gestures for HCI: contact and non-contact
.Contact-based approach consists of mounting a device
(usually gloves) to the hand which can capture the poses as
hand moves. However there are issues associated with
almost all glove - based techniques like portability, high
cost, and calibration or low resolution. A detailed analysis
and review has been done of glove-based techniques in [4]
.The non contact or vision-based techniques are glove-free
and can be divided into the three-dimensional (3-D) and the
two-dimensional (2-D) approaches. In the 3-D approach, 3-
D model of the human hand is developed and the parameters
are derived to classify hand gestures. As 3- D hand models
are quite complicated, as a consequence such models are
computationally extensive which makes real-time
classification difficult. Compared with 3-D models, the 2D
models are relatively less complex. However, 2-D models
are generally used with static hand gestures as they do not
contain information regarding hand and finger movement
for the classification of complex dynamic hand gestures.
This work was supported by the Directorate of Advance Studies, Research and
Technological Development, University of Engineering and Technology Taxila,
Pakistan and Higher Education Commission of Pakistan
Mujtaba Hassan is a Lecturer in Electrical Engineering Department, NWFP UET
Peshawar (Kohat Campus), Pakistan (Email: engr.mujtabahassan@gmail.com)
Issues and problems related to 2D vision based hand gesture
classification have been discussed, resolved and presented in
[5]–[8]
In virtual world, the role of human hand interaction with
virtual environment is escalating. A reasonable and precise
model of hand may be required to be applied in virtual
reality, medical simulation, animation, virtual prototyping,
special-effects and games. However, modeling an accurate
and realistic virtual human hand has always been a
challenging task, as great skills are required since the human
hand has a complex shape with many degrees of freedom
(DOF)
Fig. 1. Kinematic Model of Hand
Fig. 1 represents the kinematic model of hand, which
illustrates the naming and localization of fingers and joints.
As all ten fingers can take part in producing hand gestures,
so these fingers are named according to their anatomical
names as pinky, ring, middle, index and thumb. Joints in the
human hands are named according to their location on the
hand as metacarpophalangeal (MCP), Proximal
interphalangeal (PIP) and Distal interphalangeal (DIP). Fig.
1 shows that thumb has only metacarpophalangeal (MCP),
interphalangeal (IP) joints.
Many hand models are developed for HCI using vision-
based approaches. Rhee et. al. [9] developed a 3D hand
model from hand surface anatomy in which hand creases
were used to detect hand fingers and joints. Parida et. al.
[10] developed hand model for multi-fingered robotic hand
in which kinematic modeling and analysis has been done
[10]. Wu et. al. [11] contributed in detailed analysis of
various hand models.
This paper aims to describe a fast and reliable
algorithm, how kinematic model of hand based on 2D
vision can be developed. Algorithm helps to identify
and tag hand (right or left), hand
Muhammad Haroon Yousaf is Assistant Professor working with Video and Image
Processing Laboratory, Department of Computer Engineering, University of
Engineering and Technology Taxila, Pakistan. (E-mail:
haroon.yousaf@uettaxila.edu.pk).
T

IV. CONCLUSIONS AND FUTURE WORK
Research work aimed to develop Hand kinematic model
(HKM) for finger identification and joints localization,
which was achieved successfully. A 2D vision based
approach was adapted to hand tagging, finger identification,
joints localization. Algorithm presented a computationally
fast mechanism for the development of kinematic model for
static hand poses. Reliable results were observed by apply
algorithm on different hand poses of various persons.
In future, research work will be focused on developing
kinematic model of hand under diverse backgrounds,
cluttered environments and varying lightning conditions.
Finger identification and joints localization can be employed
in various hand recognition applications and can be taken
into account in HCI application as well. Research work can
be deployed in developing mechanism for non-contact
mouse, controlling of home appliances, vision based virtual
keyboard and in-car applications etc. Use of thermal images
or bone scans of hands for structural analysis can lead to
better medical diagnosis for the patients. Deployment of
joint shape and motion information of hands may reveal
new dimensions in human activity recognition.
ACKNOWLEDGMENT
Authors are thankful to Dr. Hafiz Adnan Habib for his
immense guidance. Authors are also thankful to the peers
involved in the images dataset collection for the project.
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―Human Hand Modeling from Surface Anatomy ‖
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Graphics and Games,2006.

[10] Parida, P K Biswal, B B Khan, M R , ―Kinematic
Modeling and Analysis of a Multifingered Robotic
Hand ―,Advanced Materials Research Vols. 383-
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****
 Adultery is the application of democracy to love.
H.L. Menchen
 There‘s nothing like a good dose of another woman to
make a man appreciate his wife.
Clare Boothe Luce
 No act of kindness, no matter how small, is ever
wasted.
Aesop
 All cruelty springs from weakness.
Seneca the Younger
 Peace is a journey of a thousand miles and it must be
taken one step at a time.
Lyndon B. Johnson
 Nothing can bring you peace but yourself.
Ralph Waldo Emerson
 Peace hath her victories, no less renown‘d than war.
John Milton
 Peace, like charity begins at home..
Franklin D. Roosevelt
 Superstition is the religion of feeble minds.
Edmund Burke
 Be silent, or speak something worth hearing.
Thomas Fuller
 Nothing so stirs a man‘s conscience or excites his
curiosity as a woman‘s silence.
Thomas Hardy
 You can never give complete authority and overall
power to anyone until trust can be proven.
Bill Cosby
 You never find yourself until you face the truth.
Pearl Bailey
 Truth, like surgery, may hurt, but it cures.
Han Suyin

Applications of a Dummy Load for Output Voltage Regulation of a Self-Excited Induction
Generator for Hydroelectric Power Generation
Shariq Raiz1
, Umar T. Shami2
, and Tahir Izhar3
1,2,and 3
Electrical Engineering Dept., University of Engineering and Technology, Lahore.
ABSTRACT
his research paper presents a technique to
regulate the output voltage of self-excited
induction generators. The self-excited induction
generators output terminals are normally
equipped with parallel connected excitation capacitors. A
mismatch occurs when the load on the SEIG changes and
thereby creating voltage deregulation. This research
paper presents the connection of a three-phase dummy
load for voltage regulation purposes. The dummy loads
are equipped with IGBT based switching for becoming
on-load or off-load. Simulation of SEIG with the dummy
load is presented.
Keywords- Self-excited induction generators,
Hydroelectric Power Generation, variable load.
I. INTRODUCTION
Although the self-excited induction generators (SEIG)
were invented many decades ago. However, in recent
times the use of SEIG systems for producing electric
energy from non-traditional sources, has gained
considerable strength [1]-[3]. Nevertheless, SEIG systems
have unstable frequency, output power, and output
voltage problems. On the centenary, synchronous
generators are mostly successful in producing electricity
in large bulk due to the volume and cost.
The scope of this paper is to show a method to regulate
SEIG output voltage. The technique presented is based on
the fact that SEIG output voltage remains stable as long as
the load remains same. A change in the load will shift the
operating properties of the SEIG and the voltage will
deregulate. If a dummy load is connected along with the
actual load, then by adjusting the dummy load counter to
the load changes, the voltage can be regulated [3].
In our work, a SEIG is coupled with a hydroelectric
turbine. Hydroelectric power is the source of generation of
electricity in this case. It is assumed that the hydroelectric
turbine provides constant amount of power. The primary
objective is to solve for SEIG output voltage regulation.
TABLE 4. Parameter Definitions
Parameter Definition
Rs Stator resistance
Ls=Lm + Llr Stator inductance
Rr Rotor resistance
Lr=Lm+Llr Rotor inductance
C Excitation Capacitance
ωr Rotor speed
Lm Magnetizing inductance
ids d-axis stator current
iqs q-axis stator current
idr d-axis rotor current
iqr q-axis rotor current
R Load resistance
( a)
(b)
Fig. 1 The SEIG machine stationary reference frame models (a)
d-axis model. (b) q-axis model.[1-4]
(a)
(b)
(c)
Fig.2 Shows the voltage generation process with respect to
time for (a) C=10μF (b) C=30μF, and (c) C=50μF.
II. THE TRADITIONAL SEIG MODEL
The traditional d-q model of a SEIG machine in the
stationary reference frame is shown in fig. 1 [4]-[6]. Such
a model will be used during the simulation stage of the
proposed system. Various parameters of the d-q model are
defined in Table-I. The external capacitance C connected
across the load is used to voltage generation and will be
dealt in a preceding section.
T

The d-q model of the SEIG can be expressed
mathematically by the following matrix [3],[4],[5],[6],
i.e.,
Fig. 3 SEIG output voltage as a function of rotor speed for
changing values of excitation capacitance C.
1
0 0
0
10
0 0
0
0
s s m
qs
ds
s s m
qr
m r m r r r r
dr
r m m r r s s
R sL sL
isC
i
R sL sL
sC i
sL L R sL L i
L sL L R sL
 
 
 
     
    
           
           
  
(1)
The expansion of (1) leads to an eighth order differential
equation, shown as follows, i.e.,
2 24 3 2 2
0As Bs Cs Ds E Gs            (2)
Where,
2 2
r s m rL C L CLA L  (3)
2 2
2r s r r s m rB R C R L L C L CRL   (4)
2 2 2 2
2 2
2 ( )r s r r r r s
m r
C R R L C R L L C
L C L
L 

   
 (5)
2 2 2
2 ( )r r sD RrLr R L R C  (6)
2 2 2
r rE R L  (7)
2
m rG L C R
(8)
III. SEIG VOLTAGE GENERATION PROCESS
The rotors of most SEIG are permanent magnetics
(residual flux) in addition to rotor windings. The residual
flux aids in inducing an EMF(electro-motive force) on the
stator windings. The induced EMF is feedback to the rotor
windings, thus creating a positive feedback and the stator
voltages tends to increase. The external capacitance C
connected across the load plays vital role during the build-
up process of the output voltage. However, when the
lagging VARs required by the SEIG machines is equal to
the VAR of the external capacitor C, the stator voltage
will be saturated. At this point the system has reached to
equilibrium. Such a voltage generation process is unique
to SEIG machines and it is the reason why SEIG
machines are used in remote small scale electrical
generation units.
Since the early invention of the SEIG machines, it is a
known fact that larger the value of the excitation
capacitance C, the larger the generation of SEIG output
voltage will be obtained at a lower rotor speed [3] and [7].
Similar results were obtained when the above mentioned
system was simulated in MATLAB computer simulation
software.
Fig. 4. SEIG output voltage for changing load and
changing values of input power.
Fig. 5. Connection scheme of the dummy load to the
SEIG system.
TABLE 2. Parameter Values
Parameter Values
Number of poles = 4
Rated voltage = 230V
Rated frequency = 50Hz
Stator resistance Rs = 0.44Ω
Rotor resistance Rr = 0.82
Stator Inductance LS = 73mH
Rotor inductance Lr = 73mH
Magnetizing inductance Lm = 80mH
Capacitance values selected for the simulations were as,
10μF, 30μF, and 50μF. Table-II presents the values of
parameters of the SEIG to be simulated.
In all simulation test, the initial speed of the SEIG was set
to zero and the machine was run with a constant power.
Fig. 1 displays the electrical voltage generation process
for C= 10 μF is shown in Fig.2(a) , for C=30μF is shown
in fig. 2(b) , and for C=50μF is shown in fig.2(c) .
In addition, fig. 3 shows the simulation results of the
SEIG output voltage as a function of rotor speed. Here
again the external excitation capacitance C was varied
from 10μF to 60μF, in equal steps.
Furthermore, to observe how SEIG output voltage
changes as the output load changes, three different loads
were applied to the machine after equal intervals. As
shown in fig. 4, for a varying output power, the loads
were applied in such a way that initially the machine was
energized (machine starts at time t = 0s) at no load
condition. After 2 seconds from start a load of 300W per
phase was applied, at time t = 3s a load of 500W was
added per phase, and finally at time t = 4s a load of

500W was added. It was observed that the SEIG output
voltage does not remain constant for varying load.
(a)
(b)
Fig. 6 (a) SEIG system configuration for constant output
voltage (b) Dummy load controller using IGBTs.
A careful inspection of fig. 1, 2, 3 shows an interesting
problem associated with SEIG when used as generators. It
is observed that the SEIG output voltage changes with
external capacitance C, rotor speed, and output load. The
above mentioned results indicate that the SEIG cannot be
used in the present form because for example if the
consumer loads changes, then the output voltage may also
change. Hence for SEIG output voltage regulation
additional circuits will be required.
IV. DEPLOYMENT OF A DUMMY LOAD FOR
VOLTAGE REGULATION
An inspection of fig. 4, shows that the SEIG output
voltage remains almost same for a fixed load. Therefore,
if a dummy load could be connect across the actual load.
This dummy may be brought into the circuit or be
removed from the circuit with help of power
semiconductor IGBT switches. The dummy load will
compensate the changes in the actual load in such a way
that as the actual load decreases the dummy load may be
increased and similarly as the actual increases the dummy
load value may be decreased. By this way the load as seen
by the SEIG machine would remain constant. Fig. 5
presents the circuit scheme to deploying the dummy load.
(a)
(b)
(c)
Fig. 7. Result of the SEIG system deploying IGBT based
dummy load controller (a) for increasing consumer loads
(b) for increasing and decreasing consumer load (c) for
asymmetric consumer loads.
Fig. 6(a) SEIG simulation system implemented in
MATLAB software with the dummy load, whereas
fig.6(b) shows the details of the IGBT based dummy load
controller. The constant voltage is achieved from the
information of the output voltage.
V. RESULTS
The SEIG output voltage variation using the actual load
along with the dummy load was studied in three different
cases. In the first case, the actual load was increased by
adding 50W per phase after equal time intervals of 0.5s.
The results were studied in terms of load consumed,
current consumed by the dummy load, power extracted
from the load, pulse width of the IGBT (i.e., the amount
of time the dummy load is put in the circuit), and the

SEIG output voltage. Fig. 7(a) shows the observation for
increasing loads.
In the second case, the initial load presented on the SEIG
system, equal loads on all phases, from time t=0s to 0.5s
was 150W, from time t=0.5s to 1s an additional load of
100W was added, and from time t=1s to 1.5s the
presented load was again 150W. Fig. 7(b) shows the
observations for increasing and decreasing loads.
In the third case, the load presented on the SEIG system
was 150W per phase. However, at time t=0.5s a load of
50W was added to phase A. At time t=1s a load of 100W
was added to phase B and at time t=1.5s a load of 125W
was added to load phase C. Fig. 7(c) shows the
observations for varying loads on different phases. In all
cases, the dummy load proves to aid to keep the SEIG
output voltage regulated.
VI. DISCUSSION
Careful observation of Fig. 6 shows that the proposed
dummy load scheme has effectively regulated SEIG
output voltage. The IGBT dummy load controller is
robust with simple operation. However, one drawback of
the dummy load is the constant loss of power dissipated
through it when it is in use. Extension of the work
includes regulation of the SEIG output frequency and
delivery of constant power. Future work may include
inductive resistive e.g., an induction motor as the load. In
such case the nature of dummy load may have to changed
i.e., the RLC circuit.
This system has shown the successful working of a simple
IGBT controlled resistive dummy load. However
improvements could be made to increase the response
time and settling times by the use of PID controller for
tracking faster load changes. Furthermore use of IGBTs
will add a number of higher order unwanted harmonics
which could be eliminated by LC or LCCL filters.
VII.CONCLUSIONS
This research paper has presented the simulations of
regulating the output voltage of a SEIG system using
three-phase dummy loads. At first the results of SEIG
system without a three-phase dummy load were presented
followed by the application of three-phase dummy load.
The results were encouraging. Despite the fact that three-
phase dummy load introduced heat losses, however, the
requirement of voltage regulation was achieved with less
number of circuit component. The overall system was
robust.
VIII. ACKNOWLEDGMENTS
The authors would like to acknowledge the electrical
engineering department, University of Engineering and
Technology, Lahore, for providing access to the
laboratory.
IX. REFERENCES
[1] R. C. Bansal, T. S. Bhatti, and D. P. Kothari, ―A
bibliographical survey on induction generators for
application of nonconventional energy systems,‖
IEEE Trans. Energy Convers., 18(3): 433-439, 2003.
[2] M. G. Simões and F. A. Farret, ―Alternative Energy
Systems: Design and Analysis with Induction
Generators, Taylor & Francis, December 2007.
[3] Shariq Riaz , ―Design and Implementation of Low
Cost and Minimum Maintenance Micro Hydel Power
Generation System‖ Master of Science Thesis,
Electrical Engg. Dept., U.E.T., Lahore, 2012.
[4] K. S. Sandhu, ―Steady State Modeling of Isolated
Induction Generators,‖ WSEAS Transactions on
Environment and Development, 4(1): 66-77, 2008.
[5] D. Seyoum, C. Grantham, and F. Rahman. "Analysis
of an isolated self-excited induction generator driven
by a variable speed prime mover," Proc. AUPEC, 1:
49-54, 2001.
[6] A. Kishore, R. C. Prasad, and B. M. Karan. "Matlab
simulink based DQ modeling and dynamic
characteristics of three phase self excited induction
generator." In Proceedings of the Progress in
Electromagnetics Research Symposium, Cambridge
(USA), 312-316, 2006.
[7] E. Levy and Y. W. Liao, ―An Experimental
Investigation of Self-excitation in Capacitor Excited
Induction Generators,‖ Electric Power System
Research, 53(1): 59-65, 2000.
****

Data Security using Combination of Steganography and Cryptography
Muhammad Omer Mushtaq, Yasir Saleem, Muhammad Fuzail,
Muhammad Khawar Bashir, Binish Raza
Department of Computer Science & Engineering University of Engineering & Technology, Lahore, Pakistan
Abstract
ith the passage of time data protection is the
most evolving topic of Information Security.
However steganogarphy is less used,
Cryptography is employed worldwide extensively in this
area. Combination of both is very effective which is
discussed in this paper. This paper proposes the technique
of securing data by first using cryptology and then
encodes the encrypted data using steganography. This
makes it almost impossible for any individual cryptanalyst
or a steganalyst to intrude the hidden message unless
existence of hidden communication as well as encryption
technique is known to the intruder. This scheme can be
used to transmit data securely and covertly over wired as
well as wireless media.
I. INTRODUCTION
This research paper proposes a combined technique of
cryptography and steganography. The data to be
transmitted is first encrypted using RC4 then the
encrypted data is read as bytes and then broken into bits.
The isolated bits are then placed at specific bit patterns of
the digital image. The resulting image colour is changed
by very small grayscale levels as compared to the original
image. This change is not perceivable for any third party.
Quality and dimension of carrier image used is directly
proportional to efficiency of the designed system.
Use of only Cryptography however makes data
meaningless but visible for cryptanalyst and is an
invitation for attack to any intruder [1]. Use of
steganography however makes data hidden but if the
existence is sensed by any means, any intelligent
steganalyst can find the secret data by some strong
statistical analysis [2].The proposed technique can be
cornerstone among future security trends in symmetric
session key distribution. However the carrier file used in
this scheme is the digital image but this technique can also
be applied to other digital media .Next section gives an
overview of both cryptography and steganography and
some technical background of researches already made in
this area. Third and fourth sections explain the proposed
system regarding cryptography and steganography
respectively. Fifth section describes the software
implementation of our scheme. And sixth section
describes the conclusion of our proposed system.
II. TECHNICAL BACKGROUND
The art of hiding information within digital data by a way
that any third party cannot feel the existence of hidden
communication is termed as Steganography[3]. The
information that is to be concealed and the data that is
used as carrier of that information can be of any digital
format [4]. Information is embedded or encoded in the
carrier digital file using a particular algorithm or
technique [5]. The carrier digital file is transferred to
second party and the hidden information is extracted using
exactly the same technique as was used at the sending
end, provided the encoded data is not transformed by any
means while it is being transferred from sender to
receiver. The encoding technique is designed in a way that
the carrier digital file after and before encoding remains
ostensibly same. This makes it different from
cryptography in which data is deformed but not invisible.
In most simple way Cryptography might be termed as
converting data into a form that is meaningless for any
third party[6][7]. Encryption and Decryption are two main
processes performed at sender and receiver end
respectively. Encryption is just like a lock that is closed
with the key and receiver needs the key to open that lock.
The locked information known as cipher text is
meaningless for third party.
Vikas Tyagi [8] proposed a technique of steganography in
combination with cryptography in which the secret data is
encrypted using symmetric key algorithm then the
encrypted data is hidden into an image using LSB pixel
processing. The combination of both these techniques
provides a secure transmission of secret data. However
this technique is combining both famous data security
techniques but can be criticised by a limitation of data to
be encoded because this technique is using only a single
bit as carrier of information that is if a colour image is
taken as carrier of information each pixel might carry only
three bits of information.
Jagvinder Kaur and Sanjeev Kumar [9] propose a
steganographic model in which secret message or data is
embedded into a cover-object that can be text, image, or
any multimedia digital file. The secret data is encrypted
with a setgo-Key that is only known by sender or receiver.
The message is embedded using the intensity of the pixel
values directly. Image or cover-object is divided into
blocks of bits and one message bit is embedded in every
block of original image bits. This technique however
makes minimum degradation of the original image but
also provide a very small limit of data to be embedded
since only one message bit is added to a block of image.
Samir Kumar and Indre Kanta [10] proposed a technique
for hiding data in an 8-bit colour image file. This uses a
lookup table or palette instead of 24-bit RGB image. In
palette based steganography least significant bits are used
to hide the data. A palette generation algorithm is used to
quantize the image in different blocks then the colours in
palette are sorted to minimize the difference between the
colours. It uses Euclidian distance to choose the RGB
values of 24-bit image compared to the RGB value of
every colour in the palette [11] . Information will be
hiding by changing the LSB of image with the bit values
in palette. This technique provide a secure and fast system
for internet and mobile communication due to light weight
of image that can store small amount of data. Small
amount of data again dictates the limitation of secret
information that can be transmitted. Also the absence of
W

cryptography makes the carrier image vulnerable for
attack.
Adnan Gutub [12] proposed a new merging technology of
utilizing LSB within image and random pixel
manipulation methods and stego-key. Pixel used for
hiding data is selecting random fashion depends on stego-
key .Two LSB of one colour channel used to indicate the
existence of data in the other two channels. Security is
improved because the selection of indicator channel is not
fixed. Indicator channel is selected in sequence. The test
of this technique shows attractive results in the storage
capacity of data-bits that to be hidden in relation to RGB
image. However the technique for hiding data is efficient
but not using encryption can be a threat in case some
statistical analysis is performed at the pixels‘ bits.
Tanvir and Adnan Abdul-Aziz [13] proposed a new
technology for image based steganography. A comparison
is represented between the previous technology (Pixel
Indication) and new proposed technique that is Intensity
Based Variable-bit by showing experiments. The variable
numbers of bits are stored in the channel of RGB image.
The number of data bit storage is decided on the bases of
actual colours of the image. The data bits are stored in one
of two channels of the image other than the indicator
channel depends on the colour values. The lower colour
value channel will store data in its LSB. The selection of
colour scheme is at runtime and depends on the cover
media. The technique might be efficient as the presence of
data in each pixel is not sure for the attacker but
processing each pixel in image can give required data as
there is no encryption on data and the data is hidden but
present in its original form.
Juan and Jeus [14] proposed a technique of steganography
in spatial domain. Technique uses the LSB steganography
by hiding data in only one of the three colours at each
pixel of cover image. To choose the colour for hiding
information Pair analysis is used then LSB Match method
is applied so that the final colour is as close to possible to
the original one in the scale of colours. The proposed
technique is however immune to visual, statistical and
histograms attacks but limitation of data to be hidden is
demerit of the technique and also data is not encrypted so
a good statistical analysis might easily give the secure
data to the intruder.
III. RC4 CIPHER
Both sender and receiver use the RC4 cipher which is fast
and easy to implement in software as well as in hardware.
RC4 cipher has variable key length. In our scheme we use
the minimum key length of 32 bytes or 256 bits.
First of all an array state S is declared of 256 bytes shown
in Figure 1[15]. S[i] =i ,where i={0,1,2,3… 254,255}
Figure 1: State Vector S
After that a temporary array vector T is declared whose
length is same as of S. T is initialized by replicating the K
vector containing the user defined key shown in Figure
2[15].
Figure 2: Initial State of T
Values of S are permuted by vector T. It is described by
Figure 3[15]in which each ithbyte of S is swapped with
jthbyte of S.
And j = (j + S[i] + T[i]) mod 256 [ j initially set to zero ]
Figure 3: Initial Permutation of S
After the permutation, a temporary index t of S is
generated by the ith and jth bytes of S which gives us the
Random Key Stream Byte k given by algorithm:
k = S[t]
Where j& t are
j = (j + S[i]) mod 256
t = (S[i] + S[j]) mod 256
With generation of every k, S vector is again permuted at
the end of each iteration as shown in Figure 4[15].
Figure 4: Stream Generation
Cipher byte is generated by the bitwise XOR operation
between random key that is generated by above process
and plaintext data. Figure 5 shows this procedure .In the
same way at decryption end plain text is obtained from
bitwise XOR of key (same key as was used at Encryption)
with cipher text.
Figure 5: Cipher Text Generation
IV. STEGANOGRAPHY
The system reads the cipher text as a stream of bytes and
for placement of different colour planes in the pixel, each
byte is broken into group of bits. For the proposed system

there are 6 possible combinations of bits‘ groups by
dividing a byte (8 bits).The designed system rely on these
6 combinations of bits‘ that have any value only as more
combinations make grayscale value somewhat
perceivable. Any combination of bits‘ groups constitutes a
byte which is mapped to a pixel at its different colour
planes (most probably red, green and blue).
Cipher Byte is broken into groups of bits in different
ways. In all ways essentially there are three groups simply
shown by Figure 6 where Cg1, Cg2& Cg3 are chosen from
set
C = {2, 3, 4} in a way that to complete a byte, that is
Cg1+ Cg2 + Cg3 = 8 . . . 1
Cg1 Cg2 Cg3
Figure6: Cipher Byte Division
Choice of these numbers is explained by the following
calculations. Let the chosen values for Cg1, Cg2& Cg3be
Cg1= 4
Cg2= 2
Cg3= 2
Then the change in grey levels of whole pixel due to
Cg1willbe Cg1´ = 24= 16
Similarly
Cg2´ = 22= 4
Cg3´ = 22= 4
So the total change Δc in grey levels of the pixel due to
these bits‘ change is given by
Δc= Cg1´ + Cg2´ + Cg3´
Δc = 24
Other possible combination for Figure 6 can be
Cg1= 3
Cg2 = 3
Cg3= 2
Δc for this choice is 20 which is even a better choice.
Value 4 cannot be chosen for any two of Cg1, Cg2&
Cg3because it will not satisfy the Equation 1. In a similar
fashion not all Cg1, Cg2& Cg3can be 3 or 2 at the same
time. Hence it forms six possible combinations that are
shown in Figure 7.
Figure 7: Possible Cipher Byte Division
Figure 8: Isolation of Cipher Byte
A simple bitwise AND operation is performed to break
the bits into groups ,for instance process of first possible
bits-groups having 3, 3 and 2 bits is shown in Figure 8.
First combination is result of bitwise AND operation of
cipher byte Cb with 11100000 and then shifting it 5 bits-
places towards right. The shifting is performed to move
the meaningful bits at LSB positions and place 0 at rest of
the bits which will help to map the value at desired place
in colour plane of pixel using bitwise OR which are
explained in next few lines. Group2 is result of bitwise
AND operation of Cb with 00011100 and require shift of
2 bits-places to move the meaningful bits at LSB
positions. Group3 is simply the result of bitwise AND of
Cb with 00000011 without any shift. Brief overview of
Steganographic process of above operation for 1st
combination of Figure 7 is shown in Figure 9.
Figure 9: First Cipher Byte Division
Figure 10 shows overview of Steganographic process for
second possible combination from Figure 7.
Figure 10: Second Cipher Byte Division

The whole process shown in Figure 8 gives us isolated
bits at LSB positions which are then mapped to respective
color-bits of pixel by performing bitwise AND operation
with color-bits of pixel .
Taking the above instance of groups in the RGB pixel, red
and green color bits are performed bitwise AND operation
with 11111000 (to place Cg1 and Cg2 respectively) and
blue color bits with 11111100. This operation makes the
last bits vacant so that the isolated bits of cipher text can
be placed here which is done by performing bitwise OR of
cipher with respective color bits. The whole process above
is explained in the Figure 11.







II. REFERENCES
[1]. Phad Vitthal S., Bhosale Rajkumar S., Panhalkar
Archana R. “A Novel Security Scheme for Secret
Data using Cryptography and Steganography‖ I.J.
Computer Network and Information Security, 2,
36-42, 2012.
[2]. Shivendra Katiyar, Kullai Reddy Meka, Ferdous A.
Barbhuiya, Sukumar Nandi, ―Online voting system
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Steganography‖, International conference on
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pp. 288-291, 2011.
[3]. Aniello Castiglione, Bonaventura D‘Alessio,
Alfredo De Santis, ―Steganography and secure
communication on online social networks and
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2011.
[4]. D. Artz, ―Digital Steganography: hiding data
within data‖, IEEE Internet Computing, Vol. 5,
Issue-3, pp. 75-80, 2001.
[5]. Piyush Marwaha, Paresh Marwaha, ―Visual
Cryptographic Steganography in Images‖, Second
International conference on Computing,
Communication and Networking, pp. 1-6, 2010.
[6]. S. Usha, ―A secure triple level encryption method
using cryptography and steganography‖,
International Conference on Computer and
Network Technology, Vol. 2, pp. 1017-1020, 2011.
[7]. K Suresh Babu, K B Raja, Kiran Kumar K,
Manjula Devi T H, Venugopal K R, L M Patnaik,
―Authentication in secret information in Image
Steganography‖, TENCON, pp. 1-6, 2008.
[8]. Mr . Vikas Tyagi, Mr. Atul kumar, Roshan Patel,
Sachin Tyagi, Saurabh Singh Gangwar, ― Image
Steganography using least significant bit with
cryptography ‖, Journal of Global Research in
Computer Science , Volume 3, No. 3, March 2012
[9]. Jagvinder Kaur, Sanjeev Kumar, ―Study and
Analysis of Various Image Steganography
Techniques‖, IJCST Vol. 2, Issue 3, September
2011
[10]. Prof. Samir Kumar Bandyopadhyay, Indra Kanta
Maitra, ―An Application of Palette Based
Steganography‖ , International Journal of
Computer Applications (0975 – 8887) Volume 6–
No.4, September 2010
[11]. Gao Hai-ying, Xu Yin, Li Xu, Liu Guo-qiang, ―A
steganographic algorithm for JPEG2000 image‖,
International conference on Computer Science and
Software Engineering, Vol. 5, pp. 1263-1266,
2008.
[12]. Adnan Gutub, Mahmoud Ankeer, Muhammad Abu-
Ghalioun, Abdulrahman Shaheen, Aleem Alvi,
―Pixel indicator high capacity technique for RGB
image based Steganography‖ WoSPA 2008 – 5th
IEEE International Workshop on Signal Processing
and its Applications, University of Sharjah,
Sharjah, U.A.E. 18 – 20 March 2008.
[13]. Mohammad Tanvir Parvez, Adnan Abdul-Aziz
Gutub, "RGB Intensity Based Variable-Bits Image
Steganography," apscc, pp.1322-1327, 2008 IEEE
Asia-Pacific Services Computing Conference, 2008
[14]. Juan José Roque and Jesús María Minguet, "SLSB:
Improving the Steganographic Algorithm LSB",
7th International Workshop on Security in
Information Systems, 57-66, (2009).
[15]. William Stallings, ―Cryptography and Network
Security‖, 5th Edition, Publisher: Prentice Hall,
2005.
****

Performance Analysis of Conventional and Fuzzy Logic Controlled Automatic Voltage
Regulator Systems in a Noisy Environment
Irfan Ahmed Halepoto, Imtiaz Hussain, Wanod Kumar, Bhawani Shankar Chowdhry
Department of Electronic Engineering, Mehran University of Engineering & Technology, Jamshoro, Pakistan.
Abstract:
he increasing demand for electric power is leading
to complex interconnected power systems. As a
result, generation units are being operated under
stressed conditions with smaller stability margins.
The power supplied by the generator involves active and
reactive components and good control of active and
reactive power is essential in order to maintain a
satisfactory steady state as these components can disturb
the parameters of the power system. To regulate the
reactive power and voltage magnitude of generation unit,
AVR (Automatic Voltage Regulation) system is used in the
forward path of the closed loop system of the generator.
The addition of a conventional Proportional Integral and
Derivative (PID) controller in the forward path of the AVR
system can improve the dynamic response significantly but
this may be at the cost of additional noise (introduced by
the derivative component) which may reduce the overall
effectiveness of the controller and this is a matter of
concern in practice.
This paper primarily focuses on the issue of noise
vulnerability of PID controlled AVR systems. An
alternative and more effective fuzzy logic controlled
approach is proposed to tackle these issues encountered
with conventional controllers. The proposed solution uses
a Fuzzy Inference System (FIS) to control the magnitude
and rate of change of error, while the two nonlinear fuzzy
membership functions are used to mitigate the noise
effects. Simulations models of the PID controlled AVR
system and proposed fuzzy logic controlled AVR systems
are developed and results are compared to demonstrate
the potential of the proposed design. Simulation results
confirm the superiority of the proposed fuzzy logic
controlled AVR system under noisy conditions.
Key Words: Automatic Voltage Regulation, Proportional
Integral and Derivative Controller, Fuzzy Logic,
Synchronous Generator
1. INTRODUCTION
The prime objective of power system control is to deliver
and generate power to an interconnected system as cost-
effectively and securely as possible while maintaining the
supply voltage and frequency within specified limits [1].
The power supplied by the generator involves active and
reactive components. Good control of active and reactive
power is necessary to keep the system in a satisfactory
steady-state condition as these components can disturb the
power system parameters [2]. The frequency of the system
is mainly affected by changes in the real power demand
whereas increase in the reactive power demand has a
significant effect on system voltage [3]. Real and reactive
powers are therefore controlled independently through
separate AVR and Load-Frequency Control (LFC) loops.
Primary control equipment are installed for each generator
in a generation unit to provide the required stability and
reliability in terms of the system frequency and voltage
stabilization [4]. The real power and frequency are
effectively controlled by LFC loop while the AVR system
loop regulates the reactive power and voltage magnitude.
When the generator is connected to the load, the real
component of the power stresses the rotor in mechanical
terms and opposes it rotation. This reduces the speed of the
rotor and thus decreases the frequency of the generated
voltage. Although reactive power lowers the frequency of
the generated voltage this effect is small compared to the
reduction of the e.m.f with increased reactive power. The
active component is in the quadrature with the direction of
the field but the reactive component directly opposes the
excitation field. Thus, as the reactive power increases, the
opposition to the excitation field increases which in turn
reduces the generated e.m.f. This effect must be
compensated so that the generator remains synchronized
with the system.
In literature different approaches are used to achieve the
regulation of reactive power and voltage magnitude of
generation unit either using power system stabilizing (PSS)
components [5], conventional PID controllers [6], fuzzy
logic controllers [5] and hybrid controllers [10].
Techniques such as genetic algorithms [7] and other
evolutionary algorithm [8] and particle swarm
optimization methods [9] have also been considered for
optimization and tuning of these controllers, but these
control system design approaches usually consider only
the ideal environmental conditions by neglecting the effect
of noise which introduces high frequency disturbances, the
effects of which are reflected in the overall system
behavior.
This paper investigates the effect of PID controlled and
fuzzy logic controlled AVR systems in terms of regulation
of the reactive power and generated voltage while taking
the noisy environment into account. Simulink models have
been developed for both controllers and the performance
characteristics are compared in terms of system output
response and system response error.
The organization of the paper is as follows. In Section 2,
the generator control loop configuration of the AVR is
discussed. A state space representation and simulation
model of AVR system using PID controller is detailed in
Section 3. In Section 4, the fuzzy logic controlled AVR
system is proposed. Conclusion and suggestions relating to
future work are given in Section 5.
2. GENERATOR CONTROL LOOP BASED AVR
SYSTEM
The reactive power demand and voltage magnitude of
generation unit reduce the terminal voltage of the
generator and control of this change in voltage is desired to
ensure power system stability. This task is accomplished
T

by the generator excitation system using an AVR control
loop through a closed loop system of the generator. The
control loop of the generator continuously monitors the
produced voltage level at the generator terminals and
accordingly regulates the excitation level of the rotor using
any appropriate type of controller (e.g. a microcontroller)
system and firing circuit (based on thyristors, for
example). The magnitude of the voltage is sensed and
measured by a potential transformer which steps down the
voltage and then measures its magnitude. This measured
voltage is then rectified through a three-phase rectifier and
then converted to the digital form to feed to the
microcontroller where it is compared with the reference
value set by the operator. The error signal, if exists, is then
amplified to increase the excitation field which in turn
increases the generated voltage until the error signal is
reduced.
The terminal voltage is constantly sensed by a voltage
level sensor, which is then rectified and regulated before
comparing with DC reference signal in the comparator.
Subsequently, if the comparison results in an error voltage
signal, this will then be amplified and forwarded to the
controller. In order to regulate the field windings of the
generator, the exciter system can be used along with the
output of the controller. For proper generator excitation,
the AVR loop is configured to achieve the required
reliability and the steadiness of the generator terminal
voltage [11]. The AVR control loop configuration and
sequence of events are illustrated in Fig.1.
The load voltage is first stepped down to a voltage suitable
for measurement and then measured through a measuring
device like voltmeter. The measured voltage is initially
processed through an analog to digital converter (ADC)
before being fed to the microcontroller for comparison.
After conversion, the controller compares the ADC values
with the terminal voltage set by operator. In case of any
difference in the measured and the reference quantity, an
error signal is generated from the controller‘s output. The
error signal generated is in digital form and needs to be
converted in its analog equivalent before feeding to the
amplifier.
Figure1: AVR System Generator Control Loop
Configuration and Event Flow Chart
Based on the generator control loop configuration of
Figure 1, the AVR system can be designed to regulate and
control the reactive power and voltage magnitude. The
generalized AVR system is comprised of four basic units;
i.e. Amplifier, Exciter, Generator and Sensor as shown in
Figure 2. The system operating conditions and targeted set
points are defined and are continuously monitored. Any
abnormality in the system resulting in an error is amplified
and forwarded to the controller. The controller can be of a
conventional type like PID or an intelligent controller such
as a fuzzy logic controller. The amplifier unit is
responsible to strengthen the signal level without
compromising on the shape of the signal [12]. The
excitation can be achieved through solid state rectifiers
(e.g. SCR or Thyristors). The rectifier‘s output is a
nonlinear function of the field voltage due to
magnetization created by overloaded saturation effects.
Figure 2: Generalized AVR System Model
For control system design, the saturation and nonlinearity
effects of the system are usually ignored in the initial
stages of the process and a linearized model is used. The
e.m.f produced by the synchronous generator is closely
related to the machine magnetization curve [13]. The
terminal voltage of generator depends on the generator
load. The voltage signal sensed by potential transformer is
finally rectified into DC form.
3. SYSTEM MODELING
3.1 The state space representation model
The relationship between state variables of the system is
typically non-linear; but for computational convenience a
linearized state space model is used in the initial stages of
design. The linearized mathematical model of system is
given in equation (1). The detailed derivations of the
model and system equations are given in [14, 15].
Where is the change from nominal values, is the
angular velocity of the rotor, is the magnetic field
constant, is the damping coefficient, is the generator
excitation voltage, is the field inductance, is the

field resistance, is the initial rotor speed and is the
mechanical torque.
3.2 PID CONTROLLED AVR SYSTEM MODEL
A controller is the most important part of any system
model, as it not only maintains the operating
characteristics of the system but also effectively regulates,
modifies and influences the process by remedying the
abnormalities within defined limits. The simplest and most
widely used conventional controller is the PID controller.
The generalized transfer function of a PID controller [16]
is given by
Where is the proportional gain factor, is the integral
gain factor, is the derivative gain factor, and is the
Laplace operator. The values of and can be
tuned through system optimization.
3.2.1 PID Simulation Model
As discussed earlier, an AVR system is used to regulate
the reactive power and voltage magnitude which results in
system stability in form of response errors. To eliminate
the response error, the PID controller is added in the
forward path of the AVR system to improve the dynamic
response and minimize the error. A Simulink model from
equation (1) is developed to demonstrate the potential of
the idea. Figure 3 shows the designed Simulink model of
PID controller to demonstrate the system response and
error of the AVR. The basic units of AVR system i.e.
amplifier, exciter and generator units are integrated in the
Synchronous Generator Model. A Hall Effect sensor is
used to measure the voltage and provides a feedback path
back to the controller. It offers the exceptional linearity
and accuracy, improved thermal drift and high tolerance to
the external interference [17]. Using the characteristics of
the synchronous generator, a set point is defined and the
PID controlled system output response and system error
are investigated by considering two scenarios. Initially it is
assumed that the effect of noise is negligible, while in the
second scenario, noise has been added.
Figure 3: Synchronous Generator Model with PID Compensation
Figure 4 shows the output response of the PID controlled
AVR system when noise effect is not considered. Although
the overshoots produced by the PID controller during
transients are very high but the response of the system
after the transients is acceptable.
Voltages
`Figure 4: Response of PID Controlled System without Noise
Figure 5 shows the error of the system without noise. It is
evident from the figure that once the transients are over;
the error converges to zero within acceptable time limits.
However, in these simulation results (Figure 4 and Figure
5), the noise added by the feedback sensor is not
considered. It is a well-known fact that the derivative
component of the PID controller is vulnerable to noise.
Therefore from practical aspects, the sensor noise is added
in simulation model and simulation results are shown in
Figure 6 and Figure 7 respectively.
Voltages
0 5 10 15 20
-1
-0.5
0
0.5
1
Time(sec)
Voltages
Error without noise
Figure 5: System Error without Sensor Noise
In Figure 6, the output of the PID controlled AVR system
does not settle due to the presence of noise. The high
frequency voltages fluctuations are induced in the output
of the synchronous generator which cannot be removed
completely using PID controller alone. Figure 7 shows the
overall behaviour of the system error.
Voltages
Figure 6: Output of PID Controlled AVR System with Sensor
Noise

Voltages
0 5 10 15 20
-1
-0.5
0
0.5
1
1.5
Time(sec)
Voltages
Error with noise
Figure 7: PID Controlled AVR System Error with Sensor Noise
During the steady state, the error is not able to converge to
zero but it is continuously swinging around zero. These
high frequency voltage fluctuations due to non-zero error
state are harmful for electronic devices and may reduce the
reliability of the system. It is therefore obligatory to have a
regulated system output under varying load conditions.
The limitations of PID controller are well proved in the
above simulation results, so the need of an alternative and
effective approach is evident.
4. FUZZY LOGIC CONTROLLED AVR SYSTEM
In this work, a fuzzy logic controller is designed to
compensate for the limitations of the PID controller when
it is operated in a noisy environment. The fuzzy logic
controller is well known for its simplicity and
effectiveness and this is why more research is being
carried out specifically in industry aspects of fuzzy logic
control [18, 19]. The designed Simulink model of fuzzy
controlled AVR system is shown in Figure 8. In this work,
for design of Fuzzy Inference System, we have used
Memdani model [20] which is more suitable for non-linear
application. The membership functions of Inputs and
Output are shown in figure 9, 10 and 11 respectively. The
inputs of the designed fuzzy controller are error and error
rate, and the output of the controller is calculated using the
centre of gravity method. This method is the most widely
used defuzzification method [21].
Figure 8: Simulation Model of Fuzzy Logic Controlled AVR
System
Figure 9: Membership Function of Error Input
Figure10: Input Membership Function of Error Rate
Figure 11: Output Membership Function
Figure 12 shows the surface plot of fuzzy logic rules with
respect to error and error rate. When error and error rate
are low, the output of the fuzzy logic controller is also low.
When either of inputs is high, the fuzzy logic controller
reacts accordingly to prevent the system error to exceed
the bounded limits.
Figure 12: Surface Plot of Fuzzy Logic Rules

Figure 13 and Figure 14 show the system response of the
fuzzy controlled AVR system and error without noise. The
only difference between the fuzzy logic controlled AVR
system and the PID controlled AVR system without noise
is transient behavior. The response of fuzzy logic
controlled AVR system varies smoothly until the steady
state is achieved. On the contrary, the transient behavior of
PID controlled AVR was observed as damped oscillations
until the steady state is accomplished. The smooth
variation in the output of the fuzzy logic controlled AVR
system produces a smooth decay of error, as shown in
Figure 14.
Voltages
0 5 10 15
0
0.5
1
1.5
Time(sec)
Voltages
Fuzzy Controlled AVR System Without Noise
Setpoint
System Output
Figure 13: Response of Fuzzy Logic Controlled AVR System
without Noise
Voltages
0 5 10 15 20
0.2
0.4
0.6
Time(sec)
Voltages
Error without Noise
Figure 14: Error Response of Fuzzy Logic Controlled AVR
System without Noise
When noise is added to fuzzy logic controller, the system
response with noise and the corresponding system error are
shown in Figure 15 and Figure16 respectively. It is evident
from both figures that the system response and error of the
fuzzy controlled AVR system stabilizes much earlier
compared to PID controlled AVR system, even in the
presence of noise.
Voltages
Figure 15: Response of Fuzzy Logic Controlled AVR System
with Noise
Voltages
0 5 10 15 20
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
Time(sec)
Voltages
Error with Noise
Figure 16: Error Response of Fuzzy Logic Controlled AVR
System with Noise
The overall system response and error of the fuzzy
controlled and PID controlled AVR systems are
summarized in Figure 17 and Figure 18.
Figure 17: System Response Comparison of Fuzzy Logic and
PID Controlled AVR System

Voltages
0 2 4 6 8 10
-1
-0.5
0
0.5
1
1.5
Time(sec)
Voltages
Error with PID
Error with Fuzzy
Figure 18: Error Response Comparison of Fuzzy Logic and PID
Controlled AVR System
The simulation results confirm the suitability of the fuzzy
logic approach to be used in a noisy environment. Even
with the added noise, the response of fuzzy controlled
AVR system is robust and quickly adjusts the system
response. Hence, the system error converges to zero within
acceptable time span. Thus, it is evident from the
simulation results that the fuzzy logic controlled AVR
system outperforms the PID controlled AVR system for
these simulated test conditions.
5. CONCLUSION
Automatic voltage regulators with PID controllers do not
perform well under varying load conditions. The noise
added by system components further degrades the
performance of PID controlled AVR systems. In order to
solve this problem low pass filters can be used to filter the
noise but that will require extra circuitry in the system
which in turn will increase the cost and complexity of the
system. Even after adding the extra circuits, the
performance of the system is not guaranteed. Therefore, in
this paper an alternative approach is proposed to solve this
issue without adding extra signal conditioning
components. The efficacy of the proposed solution is
evident form the simulation results presented in this paper.
Further work is planned to simulate the behaviour of fuzzy
logic controllers under varying load conditions.
ACKNOWLEDGEMENT
The authors acknowledge the support of Mehran
University of Engineering & Technology, Jamshoro,
Pakistan, in providing the necessary laboratory and
technical facilities to carry out this research work.
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I.A., ―Quantifying the effect of Look up Table Size
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[18] Hussain I, Patoli, A.A., Kazi, K., "Fuzzy Logic Based
Effective Anti-Lock Braking System Adaptive to
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[20] Mamdani, E.H., "Application of fuzzy logic to
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****
 God gave burdens, also shoulders.
Yiddish Proverb
 Going slowly does not stop one from arriving.
West African saying
 A man‘s deeds are his life.
West African saying
 Your food is close to your stomach, but you must put
it in your mouth first..
West African saying
 Don‘t call a man honest just because he never had the
chance to steal.
Yiddish saying
 A journey of thousand miles begins with a single step.
Chinese Proverb
 The thoughtless strong man is the chief among lazy
men.
West African Saying
 If it isn‘t perfect, make it better.
Japanese manufacturing slogan
 Modern is a tree with roots of contentment, and fruits
of tranquility and peace.
North African saying
 Nothing is achieved in a dream.
West African saying
 You cannot prevent the birds of sorrow from flying
over your head, but you can prevent them from
building nests in your hair.
Persian Proverb
 He who hates, hates himself.
South African saying
 The man who is not jealous in love does not love.
 The opinion of the intelligent is better than the
certainty of the ignorant.
 Not to know is bad; not to wish to know is worse.
West African saying
 It‘s nice to be important, but it‘s more important to be
nice.
West African saying

Hollow Core Fiber Design with Ultimate Low Confinement Loss and Dispersion
Mamoona Khalid and Irfan Arshad
University of Engineering and Technology, Taxila, Pakistan.
Abstract
ecure and uninterruptable data communication is
one of the most important requirements in
telecommunication sector. Research is being done in
the field of telecommunication in order to provide secure
data to customers by reducing dispersion and confinement
losses within an optical fiber. Photonic crystal fiber is a
new technology of optical fibers which has provided
secure and managed data transfer with low dispersion
properties and confinement loss. In this paper we studied
Hollow Core Photonic Crystal Fibers (HC-PCF) to reduce
the dispersion and losses through the fibers. We presented
different designs of HC-PCF and selected one design with
reduced dispersion and confinement loss. The main
purpose of this study was to develop a design that can be
utilized in Wavelength Division Multiplexing Systems
(WDM). In WDM systems we can only use a fiber that has
low material dispersion and low confinement loss. The
wavelength range for a WDM system is from 1300nm to
1550nm. So, we studied HC-PCF designs and calculated
the confinement loss and dispersion within this range.
Index Terms—Hollow Core Fibers, Photonic Crystal
Fibers, Confinement Loss, Dispersion, Wavelength
Division Multiplexing Systems.
I. INTRODUCTION
Photonic Crystal Fiber (PCF) is a two dimensional fiber
made up of a dielectric material such as silica. Latest
trends of PCF show that they successfully replaced the
conventional optical fiber in telecommunication sector.
Two types of PCF have been reported in literature, Solid
Core PCF (SC-PCF) and Hollow Core PCF (HC-PCF) [1].
Research is being done on both these fibers and it is
expected that both of these types of PCF should propagate
light with minimum losses and dispersion to fulfill the
requirements of the customers.
Like conventional optical fibers, PCF also consist of a core
that is surrounded by a cladding. The cladding of PCF is
much different than the cladding of optical fiber. It
consists of periodic air hole rings that sometimes make the
refractive index of core smaller than that of the cladding.
In conventional optical fibers the refractive index of core is
greater than the refractive index of cladding due to which
light is guided through the core because of Total Internal
Reflection (TIR) [2]. In PCF light is guided through the
core due to Total Internal Reflection (TIR) and also due to
Photonic Band Gap effect (PBG) that is generated by the
periodic air hole rings in the cladding. If the refractive
index of core of PCF is greater than that of cladding, light
guidance is due to TIR, and if the refractive index of core
is smaller than the combined effect of air hole rings of
cladding, light is guided due to PBG effect. In HC-PCF
light guidance is mainly due to PBG effect. The Fig. 1
shows the difference between SC-PCF and HC-PCF [2].
Fig.1: (a) Hollow Core PCF (b) Core of HC-PCF (c) Solid
Core PCF
An SC-PCF propagates light using the air holes of
cladding that runs down the entire fiber length [3]. These
fibers are made up of a material commonly known as silica
and consist of a core surrounded by a cladding made up of
periodic air hole rings [4]. In SC-PCF, core is simply a
region without an air hole. If we introduce an air hole in
the core region of PCF then it becomes another important
and useful form of PCF known as Hollow Core Photonic
Crystal Fiber (HC-PCF). Presence of air holes in such
fibers opens up a variety of potential applications ranging
from small mode area for highly non-linear fibers for non-
linear devices to large mode area fibers for high power
delivery [5]. When we arrange large air-holes in the form
of a periodic network, light propagation can be achieved
through PBG effect. Literature Review shows that a band
gap is only produced when the airholes are quite large.
When a defect is established in such a structure, as large
airhole in center of figure 1(a) and (b), a localization mode
excitation is established in Photonic Band Gap region, and
it is then possible for the PCF to direct light inside an air
core along the entire length of the fiber. This new
mechanism of light propagation within HC-PCF leads to a
large number of useful applications such as, these fibers
are used to deliver large amount of power, and they are
also used as sensing elements in gas sensors [6].
II. Theoretical Discussion
Propagation through a Photonic Crystal Fiber requires the
solution of Maxwell‘s equations. To solve the Maxwell‘s
equations we assume a lossless and source free medium for
convenience. The Maxwell‘s equations for such medium
are given by Eq. (1-4) [7]
(1)
(2)
, (3)
(4)
The normalized frequency V for a conventional step index
fiber is given by Eq. 5
S
(a) (b) (c)
(c)

(5)
Where is the core radius, is the wave number,
and are the refractive indices of the core and cladding
respectively [8]. The smaller is the V number, the fewer
guided modes are handled by the core. If for a given
wavelength V < 2.405, fiber will only support a single
mode for propagation of light and that fiber is simply a
single mode fiber. The normalized frequency for a PCF is
given by Eq. 6
(6)
Where 2Λ is the core diameter [8]. A PCF with d/Λ 0.4
do not support higher order modes because for them
for a given wavelength with d being
the hole size.
As in this paper we are concentrating more on the losses
and dispersion effects occurring within HC-PCF so we will
now describe the spectral density , as and
the transverse overlap of modes at glass surfaces determine
the strength of coupling and loss is calculated from power
coupled to the modes [9]. is given by Eq. 7
(7)
Where is glass transition temperature, is the
Boltzmann constant, is surface tension and ĸ is the
spectral frequency and is given by Eq. 8
(8)
where n and n0 are the mode index and the effective mode
index respectively. The normalized field intensity is given
by Eq. 9 [9]
(9)
Where E and H are the Electric and Magnetic fields. is
the unit vector along the direction of fiber. The air filling
fraction of air holes of HC-PCF is directly related to the
hole parameters and is given by Eq. 10 [8]
(10)
To obtain hexagonal holes we have to set = 0, and for
circular holes we have = 1, where d is the hole size, dc
is the curvature at corners and is the pitch (distance
between two adjacent holes) [9].
For simulation purpose, we used Perfectly Matched Layer
(PML) boundary conditions for which we selected an
anisotropic material whose permittivity and permeability
tensors are given by [9]
; (11)
with
(12)
sx and sy are the components of S and are given in the
following Table 1
TABLE I
PML PARAMETERS
PML Parameters PML Region
1
1
values of (i = 1,2) are given by the formula
(13)
Here d is the distance from start of PML and di is the PML
width in both horizontal and vertical directions, is the
attenuation [10].
Confinement loss occurring within HC-PCF is due
to finite number of air holes and is given by Eq. 14
Where
(15)
Dispersion is the combined effect of material dispersion
and waveguide dispersion and is given by Eq. 16 [8]
(16)
Dispersion is basically the second derivative of
propagation constant β i.e [8]
(17)
III. Simulation and Results
In this paper we proposed a design for a Hollow Core
Photonic Crystal Fiber through which light can be
propagated with minimum confinement loss and
dispersion. We designed this fiber in order to utilize it in
wavelength division multiplexing systems where it is
mandatory to minimize both the loss and dispersion for
secure and uninterruptable transmission of light from one
terminal to the other. In this paper we did the modal
analysis of our proposed HC-PCF designs, to calculate the
Electric Field intensity through the fundamental mode of
the fibers and then calculated the dispersion and
confinement loss through the proposed designs of HC-PCF
using the formulas given in theoretical discussion. In
WDM systems, wavelength range of operation is from
1300nm to 1550 nm [11]. So we analyzed our designs of
HC-PCF over this range and calculated the dispersion and
confinement loss for both the lower limit and upper limit

of the wavelength i.e at 1300nm and 1550nm. Using the
technique given earlier in this paper we designed three
different designs of HC-PCF and then compared them with
each other as well as compared them with the designs
available in literature and found a design with lowest
possible loss and dispersion. For this purpose we used five
layered model of HC-PCF which means that the cladding
of the fiber contained five rings of periodic air holes. The
following Table II shows the comparison between three
designs we made:
In this table pitch is the distance between the two
consecutive air holes. Radius R1, R2, R3, R4, R5 is the
radius of the air holes indexing from the inner ring. The
first two designs are made by making the radius of air
holes of all the rings equal and in the third design; radius
of air holes of all the rings is different. We were supposed
to find a design in which both dispersion and confinement
loss should be kept in mind. We cannot select a design
with low loss and high dispersion or vice versa. So, by
comparing the designs given in table, design 3 is providing
the best design with low loss and low dispersion. The
following figure 2 shows the Electric Field intensity
through HC-PCF designs.
Figure 10: Electric field intensities through the fundamental mode for designs of HC-PCF
The following Figure 3 shows the confinement
loss through the fiber designs presented above
Figure 11: Comparison of confinement losses for the three designs of HC-PCF
The dispersion obtained through the three given
designs is presented in the Figure 4
TABLE II
SIMULATION PARAMETERS
Design Pitch
(µm)
Radius
R1,R2,R3,R4,R
5
(µm)
Core
Dia
(µm)
Loss at
1300nm
(dB/cm)
Loss at
1550nm
(dB/cm)
Dispersion at
1300nm
(ps/nm/
km)
Dispersion at
1550nm
(ps/nm/km)
1 1.6 0.5 2.5 0 3x10-7
45 65
2 1.6 0.3 1.5 0 17 100 160
3 1.6 0.25,0.29,0.32,
0.33,0.69
1.5 0 4x10-9
4 38

Figure 12: Comparison of dispersion for the three designs of HC-PCF
IV. Conclusions
In this paper, we studied the transmission properties of
HC-PCF fiber so that it can be utilized in WDM systems.
We have focused much on the confinement loss and
dispersion properties occurring within the fiber. We first
analyzed the three different designs to find their
fundamental mode through which light passes more
efficiently, and then compared these designs with each
other to select the best design having lowest possible loss
and dispersion. By looking at Table 1, we found that the
Design 3 of HC-PCF is the best possible design having
lowest possible loss and dispersion. The fiber of design 3
has a confinement loss of dB/cm and
dispersion of -38ps/nm/km at 1550nm. These three
designs were made after having a thorough look at
literature; we found that these three designs were a better
option. Among these three designs, design 3 was chosen
to be the one with minimum possible confinement loss
and dispersion.
Reference
[1] P J Brown, Stephen H Foulger, ―Photonic Crystal-
Based Fibers‖ Project M02-CL06.Annual Report
2005.
[2] P. J. Roberts, F. Couny, H. Sabert, B. J. Mangan,
D. P. Williams, L. Farr, M. W. Mason and A.
Tomlinson, ―Ultimate low loss of hollow-core
photonic crystal fibres‖ OPTICS EXPRESS, vol
13. No.1, 2005.
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Birks, P. St.J. Russell, P. J. Roberts and D. C.
Allan, ―Single-mode photonic band gap guidance
of light in air,‖ Science 285, 1537-1539 (1999).
[4] Altaf Khetan, Ali Momenpour, T. Monfared, Vidhu
S. Tiwari , Hanan Anis, ―Hollow core photonic
crystal fiber as a robust Raman biosensor‖ Optical
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Treatment Applications XIII, Proc. of SPIE Vol.
8576, 85760F.
[5] S. O. Konorov, C. J. Addison, H. G. Schulze, R. F.
B. Turner, and M. W. Blades, "Hollow-core
photonic crystal fiber-optic probes for Raman
spectroscopy," Opt. Lett.31, 1911-1913 (2006).
[6] X. Yang, C. Shi, R. Newhouse, J. Z. Zhang, and
C. Gu, ―Hollow-Core Photonic Crystal Fibers for
Surface-Enhanced Raman Scattering Probes,‖
International Journal of Optics, vol. 2011, Article
ID 754610, (2011).
[7] M. R. Albandakji, ―Modeling and Analysis of
Photonic Crystal Waveguides‖, PhD Dissertation
submitted to the Faculty of the Virginia
Polytechnic Institute and State University (2006).
[8] Rodrigo Amezcua Correa, ―Development of
Hollow Core Photonic Band Gap Fibers Free of
Surface Modes‖ PhD Dissertation submitted to
Faculty of Engineering, Science and Mathematics,
Optoelectronics Research Center, University of
Southampton (2009).
[9] F. BENABID, ―Hollow-core photonic bandgap
ﬁbre: new light guidance for new science and
technology‖ Philosophical Transactions, The Royal
Society (2006).
[10] Sanjaykumar Gowre, SudiptaMahapatra, and P. K.
Sahu ―A Modified Structure for All-Glass Photonic
Bandgap Fibers:Dispersion Characteristics and
Confinement Loss Analysis‖ ISRN Optics, Volume
2013, Article ID 416537, (2013).
[11] Mamoona Khalid, I. Arshad, M. Zafrullah ― Design
and Simulation of Photonic Crystal- Fibers to
Evaluate Dispersion and Confinement Loss for
WDM Systems‖ accepted, The Nucleus 51, No.2,
2014.
***

Design and FPGA Implementation of Compositional Microprogram FIR Filter
Kamran Javed, Naveed Khan Baloch, Fawad Hussain, Dr. Muhammad Iram Baig
University of Engineering & Technology, Taxila, Pakistan
Abstract
IR Filters on Field Programmable Gate Array
(FPGA) are designed by different methods of
Digital Design. Microprogramming based FIR
filters are vastly used in Video and Image
Processing application. Purpose technique is
Compositional Microprogram Control Unit (CMCU) FIR
Filter. CMCU is both time and area optimized filter than
that of microprogram FIR Filter. Parallel architecture is
used in Data path of design. Verilog Hardware
Descriptive Language (HDL) is used to implement design.
Results are evaluated on ModelSim SE Plus 6.1f and
hardware optimization results are evaluated on Xilinx ISE
web pack 10.1. As an example of synthesis, Compositional
Microprogram Control Unit (CMCU) FIR Filter designed
in this paper is also tested for real time Audio Filtering.
Code is tested on FPGA XC3S700AN [14] using stereo
audio codec (AKM AK4551) [13] on 50MHz clock
frequency. Proposed filter is tested for third order but it
can be extended for higher order which can be used for
high speed applications like DSP applications e.g., Noise
Cancelation, Video and Image Processing.
Index Terms— FPGA, Compositional Microprogram,
Parallel Architecture, Audio Codec.
1. INTRODUCTION
Digital signal processing is very important process in
many image and video applications. Finite impulse
response (FIR) is a commonly used digital filter in many
digital signals processing (DSP) [5]. FIR Filters are
widely used because they have linear phase characteristics
and guaranteed stability. Digital filters are mainly used for
removing the undesirable parts of the input signal such as
random noise or components of a given frequency
content. FIR filters are commonly used in spectral
shaping, motion estimation, noise reduction, channel
equalization among many other applications. The simplest
realization of an FIR filter is derived from.
In direct form mentioned above, are the Outputs,
are Tap Coefficients, are the Inputs and
are the delayed samples by time unit ‗ ‘.
There are two type of implementation FIR Filters.
(i) Software
(ii) Hardware
In software implementation we used Matlab and Java to
implement FIR Filter. In hardware implementation we use
programmable Digital Signal Processors (DSPs) which
are program according to FIR filter instructions which are
write in programming language like C [15]. Another
hardware implementation of FIR filter is by configuring
hardware like Complex Programmable Logic Device
(CPLD) or Field Programmable Gate Array (FPGA).
In software implementation we use general
purpose computer for computing which is slow
as compare to hardware implementations where
we use dedicated hardware which provide fast
computation as compare to general purpose
computer [15]. Hardware implementation itself
has two type in processor based implementation
hardware is programed according to filter
requirements which Fetch, Decode and Executes
the instructions while configuration of FPGA for
FIR filter is more faster implementation even as
compare to processor based implementation. In
FPGAs actually we design hardware as compare
to processor based technique where we only
program pre design hardware. This paper
presents hardware implementation on FPGA.
The architecture of FIR Filter is Compositional
Microprogram.
Fig.1 FIR Filter
F

2. DESIGN ARCHITECTURE OF FIR FILTER
The architecture of proposed FIR Filter is divided into
two parts:
I. Control Logic (Control Unit)
II. Components that actually execute the Logic
(Datapath)
Control Unit is controlling part of FIR Filter it undergoes
different states, each state generates commands to
Datapath which are executed as per direction of Control
Unit in the Datapath of FIR Filter. Control Unit just think
what are the control sequences and don‘t know how the
design will operate on data, Datapath gets the signals from
Control Unit and don‘t think what next, and execute the
current control signals. So, the fig.2 clearly states that
Control Unit is what which generates control signals and
decides what to do, and Datapath is what which gets
control signals from the Control Unit and executes the
job.
Fig 2. FIR Filter Design Partitioning
2.1 CONTROL UNIT
Control Unit takes decisions and produces control signals
to Datapath. Control Unit doesn‘t have artificial
intelligence to command operations. It goes through
predefined sequence of operations. There are different
ways of designing a Control Unit like Microprogram
Control Unit and Hardwired Control Unit.
Flip-flops, decoders, gates and other digital circuits are
used to implement the control logic in the hardwired
architecture. One of benefits of hardwire organization is
that it can be advanced to generate a fast mode of
operation. On the other hand, Control memory is used to
save the control information in the microprogram
architecture [16]. The desired arrangement of micro-
operations is programed in the control memory.
Hardwired control is not beneficial since if there is a need
to modify the design then modifying wiring among the
various components is necessary [16]. Microprogram
control is preferable because design can be modified
easily by reprogramming the microprogram in the control
memory.
Microprogram Control Unit consists of Control Memory
which has microinstructions. Microinstructions in the
control memory are addressed with the help of address
register, which defines the address of corresponding
microinstruction and as a result, control signals are
produced. One of the most popular reasons to implement
Control Unit by microprogramming is that it translates the
hardware problems into programming problem, which
makes it easy to control by a wider range of designers.
There is another way of designing Microprogram Control
Unit i.e., Compositional Microprogram Control Unit
(CMCU). In CMCU, Mealy machine is implemented.
Program Counter is used to address microinstructions in
the Control Memory [1], [2]. The advantage of proposed
technique is that it permits to calculate the next address of
control memory in one clock cycle of Control Unit
operation. Because of which CMCU is efficient than
MCU [1], [2].
The proposed design of CMCU is shown in Fig 3 and
Algorithm State Machine of filter is shown in Fig 4.
Fig. 3. FIR Filter Compositional Microprogram
Control Unit
Fig. 4 Algorithm State Machine of Filter
The size of Control Memory is 8x8 having 8
microinstructions each of 8 bits. LSB 7 bit field of
microinstruction includes the control signals for the
Datapath where remaining single bit is used to increment
or load the Program Counter. The Program Counter is of 3
bits to address 8 different microinstructions in the control
memory. The Combinational Circuit is responsible for
branching of Control Unit to capture new upcoming data.
The transition table of CMCU is shown in Table 1. The
table shows the control signals are generated for Datapath
which execute the job depending upon the control signals.
According to Table 1, first microinstruction loads first tap
coefficient, second microinstruction loads second tap

coefficient, third microinstruction loads third tap
coefficient, fourth not only loads fourth tap coefficient but
also clears the data registers, 5th
microinstruction loads
input data, 6th
microinstruction moves the input data, 7th
microinstruction latches the output. The first 4 steps are
executed once at the start while step number 5, 6 and 7 are
repeated again and again for each data.
2.2 FIR FILTER DATAPATH
The Datapath architecture of third order FIR Filter
consists of the following sub modules: four 8-bit data
registers, one 2-to-4 decoder, four 8-bit coefficient
registers (ho, h1, h2, h3), four multipliers, three 16-bit
adders and one 16-bit register for latching the output. The
complete Datapath is obtained after coding each sub
module in Verilog. The complete Datapath of four tap FIR
filter with parallel architecture [3] is shown in Fig 5.
Fig.5 Datapath Architecture [3]

TABLE.1 CMCU Transition Table
3. FPGA IMPLEMENTATION
To implement the proposed architecture, the FPGA device used is Spartan-3AN (xc3s700AN-4fg484). Table 2 shows the
design summary of Resource Utilization of the device
Logic Utilization Used Available Utilization
Number of Slice Flip Flops 44 11,776 1%
Number of 4 input LUTs 219 11,776 1%
Logic Distribution
Number of occupied Slices 132 5,888 2%
Number of Slices containing only related logic 132 132 100%
Number of Slices containing unrelated logic 0 132 0%
Total Number of 4 input LUTs 219 11,776 1%
Number of bonded IOBs 35 372 9%
Number of BUFGMUXs 1 24 4%
Number of MULT18X18SIOs 4 20 20%
TABLE.2 Device Resource Utilization
4. RESULTS AND SIMULATIONS
The Compositional Microprogram FIR Filter code is
tested for three different input vectors as described in the
Table 3. The Tap Coefficients for a particular test are
fixed while the input data is changed continuously. The
output generated by the third order FIR Filter for each
input vector is shown in output vector. The result of all
three different tests is shown in Table 3.
Test
Case
Tap
Coefficients
(W)
Input
Data
(X)
Output Data
(Y)
1 {5,4,4,1} {3,9,7,7} {15,57,83,102}
2 {3,6,6,5} {2,10,3,3} {6,42,81,97}
3 {1,2,2,1} {1,2,3,3} {1,4,9,14}
TABLE. 3. CMCU Transition Table
5. CONCLUSION
In Micro-program Controller based Parallel Digital FIR
Filter, each memory location was of 12 bits in order to
save the control signals [3] while in proposed technique 8
bits are used in Compositional Micro-programmed
Controller based Parallel Digital FIR Filter. So, memory
width is reduced from 12 bits to 8 bits. Number of
memory locations is also reduced from 16 to 8. Memory
size is reduced from 16x12 (192 bits) [3] to 8x8 (64 bits).
It has not only increased the access time but also the
overall speed is increased. Moreover, branching
instruction for each pair of data is reduced. Now, each
pair of data require 12 clock cycles instead of 16 clock
cycles which were required by Micro-programmed
Controller based Parallel Digital FIR Filter. So, overall
speed is increased. Filter is tested on FPGA XC3S700AN
using stereo audio codec (AKM AK4551) [13] on 50MHz
clock frequency. As a future work, this FIR Filter can be
optimized by using Xilinx IP Core and implementing
Control Memory on dedicated FPGA BRAM.

REFERENCES
[12] Alexander Barkalov, Larysa Titarenko ―Logic
Synthesis for FSM-Based Control Units,‖ vol. 5 3,
Springer-Verlag, Berlin, 2009
Synthesis for Compositional Microprogram
Control Units,‖ vol. 5 3, Springer-Verlag, Berlin,
2008
[14] Mohammed S. BenSaleh, Syed Manzoor Qasim,
M. Bahaidarah, H. AlObaisi, T. AlSharif, M.
AlZahrani, and H. AlOnazi.‗"Field Programmable
Gate Array Realization of Microprogrammed
Controller based Parallel Digital FIR Filter
Architecture "‘ Proceedings of the World Congress
on Engineering and Computer Science 2012 Vol II
WCECS 2012, October 24-26, 2012, San
Francisco, USA
[15] Bruce W. Bomar, Senior Member, IEEE
‗"Implementation of Microprogrammed Control in
FPGAs."‘, IEEE Transactions On Industrial
Electronics, Vol 49, No. 2, April 2002
[16] Yajun Zhou, Pingzheng Shi. ‗Distributed
Arithmetic for FIR Filter implementation on
FPGA.‘, 978-1-61284-774-0/11 ©2011 IEEE
[17] Remigiusz Wiśniewski, Monika Wiśniewska,
Marek Węgrzyn, Norian Marranghello.‗Design of
Microprogrammed Controllers with Address
Converter implemented on Programmable Systems
with Embedded Memories‘, 978-1-4577-1958-5/11
©2011 IEEE
[18] Monika Wiśniewska, Remigiusz Wiśniewski,
Marek Węgrzyn, Norian Marranghello.‗Reduction
of the Memory Size in the Microprogrammed
Controllers‘, 978-1-4577-1958-5/11 ©2011 IEEE
[19] Syed Manzoor Qasim, Mohammed S.
BenSaleh,Mazen Bahaidarah, Hesham AlObaisi
And Tariq AlSharif, Mosab AlZahrani and Hani
AlOnazi."Design and FPGA Implementation of
Sequential Digital FIR Filter using
Microprogrammed Controller."‘, 978-1-4673-
2015-3/12 ©2012 IEEE
[20] Shoab Ahmed Khan.‗ Digital Design Of Signal
Processing Systems A Practical Approach‘, John
Wiley and Sons, United Kingdom, 2011.
[21] Dr. Shoab A. Khan And Hamid M. Kamboh.‗An
Algorithmic Transformation for FPGA
Implementation of High Throughput Filters‘, 978-
1-4577-0768-1/11 ©2011 IEEE
[22] Remigiusz Winiewski.‗Synthesis of Compositional
Microprogram Control Units for Programmable
Devices.‘, Ph.D. Thesis University of Zielona Góra
Zielona Góra, Poland, 2008
[23] Ms. Aye Thi Ri Wai and Ms. Phyu Phyu Tar
―Translating A Microprogram To Hardwire
Control‖ Proceedings of ECTI-CON 2008
[24] Dave Vandenbout. ―S tereo loopback circuit‖
available at:
http://www.xess.com/static/media/projects/loopbk.z
ip
[25] Xilinx Development Team. ―Spartan-3AN
Documentation.‖ available at:
http://www.xilinx.com/support/index.html/content/x
ilinx/en/supportNav/silicon_devices/fpga/spartan-
3an.html
[26] Pieter Abbeel Assistant Professor UC Berkeley
―Signals and Systems- Implementation of FIR
filters‖ available at:
http://ptolemy.eecs.berkeley.edu/eecs20/week12/im
plementation.html
[27] CADENTI ―Hardwired control‖ available at:
http://www.cadenti.com/hardwired.html
[28] Shih-Lien lu and Hubert Stier ― Design of
Pipelined FIR Filter with MSB-First Multiplier‖
Dept. of Electrical and Computer Engineering ,
Oregon State University ,Corvaliis, Or 97331 USA
[29] Joseph B. Evans.‗"Efficient FIR Filter
Architectures Suitable for FPGA Implementation,",
ISCAS ‘93 in Chicago,Illinois.
[30] Remigiusz Wi´Sniewski , Alexander Barkalov ,
Larisa Titarenko Wolfgang A. Halanl: ‗"Design Of
Microprogrammed Controllers To Be Implemented
In FPGAs."‘, Int. J. Appl. Math. Comput. Sci.,
2011, Vol. 21, No. 2, 401–412 DOI:
10.2478/v10006-011-0030-1
Synthesis for Compositional Microprogram
Control Units‖ Donetsk National Technical
University,Poland
****

Improved Dynamic Frame Size with Grouping Slotted Aloha (IDFSG)
Usman Hayat, Naveed Khan Baloch, Fawad Hussain, Malik Muhammad Asim
Department of Computer Engineering, University of Engineering and Technology Taxila, Pakistan
Abstract:
adio Frequency Identification (RFID) system is an
emerging technology in field of automatic
identification and object tracking. It’s a wireless
communication between sender tag and receiver via radio
frequency. One of the challenges it faces is tag collision at
reader. It’s an important factor that determines the
performance of RFID system. Different approaches and
algorithms have been developed to reduce collision and to
efficiently read the RFID tags. The basic concept is the best
utilization of time slots between reader and tag during data
transmission. DFSG algorithm improves EDFSA by
implementing dynamic group sizing technique. However it is
dependent upon initial frame-length. The proposed
algorithm removes initial frame-length dependency. The
proposed algorithm is compared with previous techniques.
Identification time, iteration taken to read group and system
efficiency comparison is included in this research work. The
proposed algorithm shows improved results for
Identification time, iteration taken to read group and system
efficiency is much closer to possible ideal values.
4. Keywords: RFID Algorithm, Passive UHF RFID,
RFID Anti -collision, EPC class 1 Gen 2, grouping
approach, maximum system efficiency
1. Introduction:
RFID system is a result of an effort to have a low cost radio
frequency system to communicate between two or more
equipment. It consists of Reader (which send query) and a
Tag (Accept the query and reply with its ID. In response of
the reader broadcast query message all tags within range
tries to reply and some replies arrive at the reader at same
time resulting a misconception at reader end i.e collision.
Aloha protocol [1] (better known as pure Aloha) was the
first successful algorithm to cater this problem. However
pure Aloha had very less successful transmission rate of
18.4%.
1.1 Related work
Slotted Aloha [2, 3] was improved version of Pure Aloha. A
communicator can send only at the timeslot beginning and
not during the transmission of data. Slotted Aloha was
further enhanced by N. Abramson [3] deciding frame size
dynamically on the bases of tag estimation. This greatly
improved Aloha and become bases of other anti-collision
algorithms such as, An Enhanced Dynamic Framed Slotted
ALOHA Algorithm (EDFSA) by S. Lee et al [4], Dynamic
Grouping Frame-slotted Aloha (DGFS) by Mian Hammad
Nazir at al [5] and Dynamic Frame Sizing with Grouping
Slotted Aloha (DFSG) by Sobia Arshad et al [6].It was quite
noticeable fact in RFID system that higher the numbers of
tags available within the reader range greater the number of
collision exists. The main requirement of any anti-collision
algorithm is to efficiently read all the tags in minimum
possible time.
In following sections frame-length and time slot concept is
discussed. A comparison of proposed technique with
previously developed techniques is described.
2. Material and Methods
RFID anti-collision algorithms can be categorized into two
groups: Tree-based and Aloha based algorithms. A tree-
based algorithm organizes tags identities in a binary search
tree. Tree-based algorithms are considered accurate and
have low computational cost but they are limited to few
applications because of identification delay. Tree-based
algorithms are examined by Hush et al [7] and by Myung et
al [8]. Aloha based algorithms are less accurate and have
low performance however they are more attractive because
of less identification delay. EPC class 1 Generation
2protocolis based upon Dynamic Frame Size Slotted Aloha.
It restricts the frame-length to 2k
{where k =0 - 15}[9] where
frame-length is time slices to read a tag and each time slice
is known as slot . The identification delay increases and the
throughput suffers badly when the number of available tags
are much larger than the number of available slots in frame
or vice versa. Commercial readers can be categorized as
fixed frame-length non-customizable, fixed frame-length
user-customizable and, variable frame-length readers [10].
Fixed frame-length readers have fixed frame size so same
number of slots are available in each identification cycle [5].
Those readers which can change (increase or decrease)
number of slots per frame without human interaction is
known as variable frame-length readers [5]. In readers with
fixed frame-length, non-customizable [11-15] frame length
is pre-set by manufacturer. In Readers with fixed frame-
length, user-customizable [10][15,16] frame length value
{k= 0 -15} can be manually set by user . In most of the
variable frame-length readers users can configure frame-
length only for the first time[10][15,16].Frame Slotted
Aloha, Binary Frame size Aloha, Dynamic Frame size
Aloha[1,2], Enhanced Dynamic Framed Slotted ALOHA[4],
Dynamic Grouping Frame-Slotted Aloha[5] and Dynamic
Frame Sizing with Grouping Slotted Aloha[6] are some of
the examples.
2.1FSA and EPCGLOBAL CLASS-1 GEN-2
STANDARD
EPC Global Gen 2 or Class 1 Generation 2 defines the
physical and logical requirements of RFID systems [17]. It
operates between 860MHz ~ 960 MHz frequency. RFID
systems comprised of electronic chips known as tags and
reader. EPC global provides standards for RFID. It is
mainly based on DFSA [18]. The EPC global Gen2 defines
protocol to interaction between reader and tag using three
procedures [18] as shown in figure 1.
R

Figure 1: Read Procedure between RFID Reader and Tag
[18]
During Select procedure reader selects the frame length for
inventory. The frame has number of slots. The frame-length
is defined by DFSA algorithm and its value is between k=0-
15. During Inventory process reader identifies all the tags
available in his range by sending a query command. All the
available tags will reply with their own 16 bit random
number. During access procedure reader will read tags and
for remaining tags reader will start again from Select
procedure. The complete inventory procedure is shown in
figure (2).
Figure 2: Generation 2 for Single tag reading
2.2 Mathematical analysis of DFSA
The maximum throughput of DFSA algorithm is
approximately 37%. If t is the total number of tags
available in reader‘s range and S is total number of slots
available in frame-length then the maximum efficiency
(Emax) can be defined using following equation [6].
Emax = (1)
t 1 2 4 8
Emax 1 0.5 0.42 0.393
t 16 32 64 128
Emax 0.38 0.374 0.371 0.369
t 256 512 1024 2048
Emax 0.368 0.368 0.368 0.371
Table1. Maximum RFID Efficiency using DFSA
Table1 shows the efficiency DFSA for different frame-
lengths using equation (1)
2.3 Improvement of DFSA in DFSG
Dynamic frame sizing with grouping Slotted Aloha [6]
(DFGS) adjusts frame-length dynamically along with tag
grouping. DFGS shows efficiency around 0.368. DFGS is a
grouping technique, we examine group tagging technique in
next section.
2.4 Group tagging technique with variable frame sizing
Frame-length is limited to maximum size of 215
.When
reading very large or infinite number of tags, tag grouping is
necessary because of the limitation of frame-length. Static
and dynamic grouping are two main methods of tag
grouping. Division of large number of tags into equal
number of groups is known as Static grouping [4].
Enhanced Dynamic Frame Slotted Aloha (EDFSA) [4] is an
example of Static grouping. The number of groups is
determined by dividing total number of unread tags by
maximum frame-length. EDFSA performance depends upon
the initial frame-length selected since it does not adjust
frame-length and frame size determines the number of
groups. In dynamic grouping frame-length is variable and
tags read in particular frame are categorized as one group.
Select and Inventory steps shown in figure (1) are repeated
for the remaining tags [19].
3. Result and Discussion
3.1 FSG algorithm and its limitation
DFSG improved DFSA performance by dividing tags into
groups but with limitations. The number of iteration DFSG
takes to read a group depends upon initial frame size. While
the frame-length is adjusted before tag reading, it gets reset
to initial frame-length after every group reading which may
or may not be the best choice for next group. Frame-length
cannot be reduced than the initial frame size during group
reading.
3.2 Proposed algorithm
We proposed an algorithm which is independent of initial
frame size. The pseudo code is shown in figure (3).
Figure 3: Pseudo code for proposed Algorithm
3.3 Proposed algorithm Comparison
MATLAB is used for simulation of proposed algorithm.
Comparison of BFSA, DFSG and Proposed algorithms is
described in detail.
For the number of Tags less than 256 we use same scheme
as of DFSG i.e. frame length is selected from following
table.
N= number_of_Tags
Total_slots = 0 , Frame_size=0 ,
Tag_succ =0
While N > 256
Frame size = 2 ^ ceil (log2(N));
Tag_succ = ceil (N * (1 – 1/N)N-1
) ;
N=N – Tag_succ ;
Total_slots= Total_slots+ Frame_size
End

n Q Frame-length
2-5 2 4
6-11 3 8
12-22 4 16
23-44 5 32
45-88 6 64
89-176 7 128
177-255 8 256
Table 2. Frame size selection for Tags <256
3.4 Identification time
Identification time is associated with number of iterations
and total slots taken to read all tags. Comparison result from
MATLAB of proposed scheme with DFSG and BFSA is
shown in Figure (4)
Figure4: Comparison of BFSA, DFSG and Proposed
Scheme with respect to Number of iteration
Figure 4 shows that proposed algorithm takes less number
of iterations for reading tags as compared to both BFSA and
DFSG. When tags are less than 256 number of iteration are
same for both DFSG and proposed scheme but for larger
number of tags proposed scheme take less number of
iteration.
Figure 5: Number of slot comparison of BFSA, DFSG and
Proposed Scheme
Figure 5 shows that proposed scheme takes less number of
total slots than BFSA. We observe that number of slots for
both proposed scheme and DFSG are very close. Proposed
scheme take slightly less number of slots than DFSG.
3.5 Iteration and Efficiency of Proposed Scheme
From the above proposed scheme we found that it uses less
number of iteration to read all the tags. The system
efficiency is given by following equation.
(2)
Comparison of iteration and efficiency between BFSA,
DFSG and proposed scheme is shown in Table 3.which
shows that results obtained from proposed scheme are better
than previous techniques. All results were obtained using
MATLAB.
Table 3. Comparison of BFSA, DFSG and Proposed
Scheme
4 Conclusion
DFSG [6] is based upon EDFSA [4] and it improves system
efficiency to a great deal as compared to BFSA and EDFSA.
Improved Dynamic Frame size with tag grouping algorithm
that we have just presented above further extends the
performance of DFSG by reducing the number of iteration.
Also it removes the dependency of algorithm on initial
frame-length. The comparison of iteration, system
efficiency and identification time between BFSA, DFSG
and proposed algorithm is shown in above figure (4), figure
(5) and table (3). Result obtained for proposed algorithm is
much closer to possible optimal values.
References:
[1] Alohanet,
http://en.wikipedia.org/wiki/ALOHAnet#The_ALOH
A_protocol
[2] Multiple Access protocols in Computer Networks,
Aloha vs Slotted aloha documentation available at:
http://enggpedia.com/computer-engineering-
encyclopedia/dictionary/computer-networks/1615-
multiple-access-protocols-pure-aloha-vs-slotted-
aloha-a-throughput

[3] N. Abramson (1970). "The ALOHA System -
Another Alternative for Computer
Communications"(PDF). Proc. 1970 Fall Joint
Computer Conference. A
[4] S. Lee, S. Joo, C. Lee, ―An Enhanced Dynamic
Framed Slotted ALOHA Algorithm for RFID Tag
Identification,‖ in the Proc. of International
Conference on Mobile and Ubiquitous Systems:
Networking and Services (MOBIQUITOUS), pp.
166-174, 2005.
[5] Mian Hammad Nazir , Nathirulla Sheriff ―Dynamic
Grouping Frame-slotted Aloha‖ , International
Journal of Computer Applications (0975 – 8887)
Volume 37– No.4, January 2012
[6] Sobia Arshad , Syed Muhammad Anwar, Mian
Hammad Nazir, Shumaila Khan, ―Dynamic Frame
Sizing with Grouping Slotted Aloha for UHF RFID
Networks‖ , International Journal of Computer
Applications (0975 – 8887) Volume 61-No.18,
January 2013
[7] Hush, D.R, Wood, C., ―Analysis of Tree Algorithms
for RFID Arbitration‖. In Proc. of International
Symposium on Information Theory, pp. 107-114,
Cambridge, Massachusetts, USA, 1998.
[8] Myung, J., Lee, W., ―Adaptive Splitting Protocols for
RFID Tag Collision Arbitration‖, MobiHoc‘06,
Florence, Italy, pp. 203-213, 2006.
[9] Class 1 Generation 2 UHF Air Interface Protocol
Standard Version 1.0.9: ―Gen 2‖. Documentation
available online at: http://epcglobalinc.org/standards/
[10] Samsys, RFID Reader. Documentation available on-
line at: http://www.samsys.com
[11] Caen, RFID Reader. Documentation available on-line
at: http://www.caen.it/rfid/
[12] ThingMagic Mercury4, RFID Reader.
Documentation available at: http://thingmagic.com/
[13] Symbol, RFID Reader. Online documentation at:
http://tecno-symbol.com
[14] Awid, RFID Reader. Documentation available on-
line at: http://awid.com/
[15] Intermec, RFID Reader. Documentation available on-
line at: http://www.intermec.com
[16] Development kit Alien 8800. Documentation
available on-line at: http://alientechnologies.com/
[17] http://www.skyrfid.com/RIFD_Gen_2_What_is_it.
php
[18] A Novel Q-algorithm for EPCglobal Class-1
[19] X Huang, ―An Improved ALOHA Algorithm for
RFID Tag Identification‖, Knowledge-Based
Intelligent Information and Engineering Systems
[Book] Berlin Heidelberg, Springer-Verlag, vol.
4253, pp. 1157-1162, 2006.
[20] Abraham, C., Ahuja, V., Ghosh A.K., Pakanati, P.,
―Inventory Management using Passive RFID Tags: A
survey‖, Department of Computer Science, The
University of Texas at Dallas, Richardson, Texas,
USA, pp. 1-16, 2002.
[21] Shih, D-H., Sun, P-L, Yen, D.C., Huang, S-M,
―Taxonomy and survey of RFID anti-collision
protocols‖. Computer and Communications, vol. 29,
pp. 2150-2166, 2006.
****

Fixed order robust Controller Design by using H∞ Loop Shaping and
Immune Algorithm for Ball and Hoop System
Faizullah Mahar
Department of Electrical Engineering, Balochistan
University of Engineering and Technology, Khuzdar, Pakistan
Abstract
his work presents an innovative design practice for
determining the fixed order robust proportional-
integral-derivative (PID) controller for ball and
hoop system using the immune algorithm (IA). The paper
demonstrates how to make use of the IA to search the
optimal PID-controller gains. This approach has much
better characteristics, including easy to implement, sure
convergence attribute and fine computational efficacy. The
optimum PID-controller tuning yields high-class solution.
To support the predicted performance of the proposed IA
based scheme a performance criterion i.e. cost function is
also defined, and the preferred practice was more proficient
and robust in getting better step response of ball and hoop
system.
The simulation results demonstrate that IA- based PID
controller be able to compensate the effect and improve the
performance of control system. Additionally, the proposed
design practice overcomes the weakness of conventional
practices and improvement has been accomplished in terms
of time domain performance.
Keywords
PID controller; optimization; immune algorithm and cost
function.
1. Introduction
In recent times, industrial process control techniques have
made great progress. Various control techniques have been
developed such as adaptive control, neural control, and
fuzzy control [1-2]. Amongst them, the top recognized is the
proportional-integral-derivative (PID) controller, which has
been widely used in the process industry for the reason that
it holds simple structure and robustness in performance in
wide range of operating conditions [3].
Regrettably, it became relatively hard to tune PID controller
gains since several industrial plants are often hampered with
problems like high order and time delay [4]. Several
techniques have been proposed for the tuning of PID
controller gains. The first method used the classical tuning
rule proposed by Ziegler and Nichols. Mostly, which is safe
to find out optimal or near optimal PID gains with Ziegler-
Nichols for several industrial plants [5].
To design a controller means select the proper gains. The
major point to note is that if calculated values of gains are
too large, the response will fluctuate with high frequencies.
On the other hand, having too small gains would mean
longer settling time. Consequently, finding the best possible
values gain is a significant concern in a controller design
[6]. In general, the controller design practice is iterative
among controller design and cost function (CF)1
appraisal
[7].
The design of controller to stabilize complex plant and to
achieve specific performance is became an open problem.
The researchers proposed approaches to make simpler the
controller design practices. While alternative is to minimize
the closed loop CF. But, there are certain difficulties
essential to the fixed order robust controller design, such as
to compute the best optimal value of controller gains and
minimization of (CF) [8].
The fixed order robust controllers can be achieved by using
H∞ loop shaping procedure (LSP). The drawback of this
design practice is the order of controller cannot be fixed a
priori. The typical requirements are: little settling time, little
overshoot and minimal value of CF [9].
Recent studies have proposed an IA to resolve optimization
problems in the field of control systems and computer
sciences [10]. The use of IA in optimization problems have
been engorged owing its significance, capability in terms of
implementation and robustness to perturbation.
An IA based PID controller was designed to improve the
time domain performance of ball and hoop system. The IA
will be used to determine the optimal controller gains [kp,
ki, kd], and minimize the CF so that the controlled system
could obtain good performance and robustness.
1.1 Original Plant
The original plant is given in Eq.1 has been used in [6, 7].
Ball and Hoop system, fourth order with the transfer
function as given in Eq.1
1
( )
4 3 2( 6 11 6 )
G s
S S S S

  
(1)
Fig.1 shows the pole zero plot of plant Eq.1. The four real
poles are S=0, S=-1, S=-2 and S=-3, system is stable.
FIG. 1 SHOWS THE POLE ZERO PLOT OF NOMINAL PLANT
1 measure of performance
T

Perturbed plant
The perturbation to the original system transfer function has
been measured in percentage. The plant poles are perturbed
by 5% of the original value. Generally, perturbation in small
percentage will not shift the poles in right hand side. If that
is the case the plant is first needed to be stabilized by an
additional local loop and then the proposed algorithm can be
applied.
The plant parameters have been perturbed by 5% of the
original value. The resultants transfer function is given in
Eq. (2)
4 3 2
1
( )
( 6.3 12.127 6.9457 )
G s
S S S S

  
(2)
Fig.2 shows the pole zero plot of plant Eq. (2). The four
perturbed poles are S=0, S=-1.0500, S=-2.100 and S=-
3.1500 while system remains stable.
FIG. 2 SHOWS THE POLE ZERO PLOT OF PERTURBED PLANT
The paper is arranged as follows: Desired performance
specifications are given in Section 2, A brief overview of
H∞ control design is presented in section 3, H∞ loop
shaping procedure is discussed in Section 4, Section 5 gives
brief overview of immune algorithm, the deign aspects of
IA based procedure is presented in Section 6, Section 7
presents experimental results and the conclusions are
summarized in Section 8.
2. Desired Performance Specification
The main purpose of control system design is to provide
good time domain performance of the controlled system.
The best possible controller has to be designed such that the
desired time domain performance specifications are meeting
up. The desired specifications are given in Table.1
TABLE 1 DESIRED PERFORMANCE SPECIFICATION
H∞- norm ≤ 2
Settling time ≤ 2 sec.
Rise time ≤ 1 sec
Stability margin ≤ 1
Steady state error 1
3. The H∞ Control Design
Consider a system P(s) of Fg.3, with inputs w and outputs z
measurement y control u and controller K(s). If P(s) is used
to devise a design problem, then it will also incorporate
weighs [9].
yu
zw
P(s)
K(S)
FIG.3 GENERAL H ∞ CONFIGURATION [8]
For minimizing the H ∞-norm of the transfer function from
w to z, P(s) may be partitioned as given in Eq. [3]:
( ) ( )11 12( )
( ) ( )21 22
P s P s
P s
P s P s

 
 
 
(3)
The closed loop transfer function from w to z can be
obtained directly as given in Eq. [4]:
( , )Z F P K wl (4)
Where,
1
11 12 22 21( , ) ( )lF P K P P K I P K P

   is called the
lower fractional transformation of P and K . Therefore, the
optimal H control problem is to minimize the H∞ norm of
( , ),lF P K i.e, ( , )lF P K 
4. The H∞ Loop Shaping Procedure
H∞ loop shaping procedure (LSP) is an efficient method
used for robust controllers design and has been efficiently
used in a variety of applications. Two main phases are
implicated in LSP [12].
In first phase the singular values of original plant are shaped
by choosing proper weights W1 and W2. The original plant
G0 and weights are multiplied to form a shaped plant Gs as
shown in Fig. [4]. The weighs can be chosen as:
1 w
s
W K
s





(5)

Kp
Ki/S
Kd-S
Plant
+
+
xuxd
-
+
Where , ,wK   are positive integers,  is selected as
smallest number (<< 1).
W1 G W2K∞
Gs
_
FIG. 4 BLOCK DIAGRAM OF SHAPED PLANT
In second phase the controller K is synthesized and
stability margin is computed. The final controller is
constructed by multiplying K with weights W1 and W2 as
given in Eq. (6) and depicted in Fig. 5.
( )
1 2
K s W K W
final
  (6)
K∞ W2 G0W1
K(s)
_
FIG.5 BLOCK DIAGRAM OF FINAL CONTROLLER
This step by step method has its groundwork in [10, 12].
After achieving the desired loop shape, H -norm is
minimized to find the overall stabilizing controller K(s) final
4.1 PID Controller Background
The structure of PID controllers is very simple it works in a
closed-loop system as given in Fig.6; the controller operates
on the error signal that is the difference between the desired
output and the actual output, and generates the actuating
signal (u) that drives the plant. The output of a PID
controller, equal to the control input to the plant, in the time-
domain is as given in Eq. (7)
( ) ( ) ( )p i d
de
u t K e t K e t dt K
dt
   (7)
The transfer function of a PID controller is found by taking
the Laplace transform of Eq. (9).
2K s K s Kd p i
s
KiK K sp d
s
 
   (8)
FIG. 6 STRUCTURE OF A SISO-PID CONTROLLER
4.2 H∞ Robust Stabilization
The normalized co-prime factor of the shaped plant
is 1 2OG W G Ws  1
NM 
 , then a perturbed plant GΔ is
written as:
1
( )( )N MG N M 
      (9)
Where, M and N are stable unknown transfer functions
representing the uncertainty in the original plant Go.
Satisfying M N 
   ε, here  is uncertainty boundary
called stability margin [13].
∆N ∆M
N M-1
- K∞
+
+
+ _
u y
ø
FIG.7 CO-PRIME FACTOR ROBUST STABILIZATION
Configuration shown in Fig. 7, a controller K stabilizes
the original closed loop system and minimizes γ is given in
Eq. (10)
inf
1 1
( )s
k
I
stab I G K M
K
  

 
 
  
 
(10)
Where,  is the H -norm from  to v and 1
( )I G Ks

  is
the sensitivity function, the lowest achievable value of γ and
correspondent maximum stability margin is computed by
Eq. (11)
1
1 ( )maxmax XZ 

   (11)
Where  max denotes maximum Eigen value, Z and X are the
solution to the Riccati equation [10-11]:
1 1( ) ( )
1 1 0
T T TA BS D C Z A BS D C
T TZC R CZ BS B
   
   
(12)
1 1
( ) ( )
1 1
0
T T T
A BS D C X A BS D C
T T
XBS B X C R C
 
  
 
  
(13)
Where, A, B, C, and D are state-space matrices of G,
TS I D D  and TS I D D  .
5. Overview of Immune Algorithm
An IA is a search method, starts with randomly initialization
of antibodies. Then the fitness of each individual antibody is
calculated. The transmission of one population to next takes
place by means of immune aspects such as selection,
crossover and mutation. The process chooses the fittest
individual antibody from the population to continue in the
next generation [2]. Moreover, an affinity is the fit of an
antibody to the antigen. The role of antibody is to eliminate
the antigen [9].
5.1 Modeling of gain matrix
The specified controller gain matrix consists of n elements:

, ,1 2k k kn    
The aim of IA is to implement heuristic search for best
grouping by the these n elements that identify the antigen
form CF Fig. 8, immune aspects includes, selection, cross
over, colonial affinity and mutation are engaged to
implement in the algorithm [13]
Cost Function
k2
kn
k1
Antibodies
Antigen
FIG.8 COST FUNCTION
6. Design Aspects of IA-PID Controller
By assuming that ( )K  is specific controller. The structure
of controller has been specified previously starting the
optimization procedure. The  controller structure has been
taken as vector is given by  = [kp, ki, kd]. A set of
controller parameters  has been appraised to minimize the
CF, by using Eq. (7) a controller ( )K  can be written as
given in Eq. (15)
1 2( )K W K W   (15)
Again by assuming that W1 and W2 are invertible, hence,
1 1
2 1( )K W K W 
 (16)
W2 has been selected as an identity matrix; mean that sensor
noise is insignificant? By substituting Eq. (15) in Eq. (9),
the H∞-norms of the transfer functions matrix from
disturbances to states, which has to be, minimized that is CF
can be written as:
1
( ( )( )
11
( )1
I
T I G K I Gzw s sW
KW



 
 

 
 
 
(17)
5.2 Proposed approach using IA
The main steps for implementing the IA to design of robust
controller are:
Step-1 calculate gamma using Eq. (11), returned variable γ
is the inverse of the magnitude of uncertainty so the γ ≤ 4 is
requisite. If γ is > 4, it means weights are unsuitable with
robust stability; the weights are to be adjusted.
Step-2 Generate initial population of antibodies as sets of
parameters
Step-3 calculate CF of each antibody using Eq. (17) by
considering  as each string of antibodies as a vector of
controller gains.
Step-4 the colonial affinity of each antibody can be
calculated by using Eq. (17), best antibody in the present
problem is chosen as an antigen, which has minimum CF.
( )
( )
f antigen
Affinity
f antiboby
 (18)
Flowchart for the above steps is depicted in Fig. 9.
Is γ satisfied?
Select weighting functions
and evaluate γ
Generate initial antibodies
Start
Evaluate Cost Function
Meeting termination
criteria?
Best antibodies
Yes
No
Yes
No
1
2
3
Implement immune aspect4
Check constraints
Discard solutions
that do not meet
constraints and
generate newNo
Yes
FIG. 9 FLOW CHART OF PROPOSED SCHEME
7. Simulation Results
The proposed controller and their performance evaluation
criteria in time domain were implemented by MATLAB.
The fixed order controller design by using IA has been set in
MATLAB environment to predict performance of the
proposed approach. All the simulations are performed by
using MATLAB codes.
Model parameters of the nominal plant are shown in the
Eq. (1) as transfer function. First, we design a controller by
using LSP the weights are chosen as:
1
0.30 1.0
0.001
W
S



(19)
Where W2is the identity matrix, with these weighting
functions the shaped plant is computed as?
4 3 2
0.30 1
( )
11.6 S 6.0 S 0.06 SS
S
G ss


  
(20)
The stabilizing controller K is obtained by using
MATLAB code is as:
015 4 015 3 016 22.66 5.32 8.88 0.3 1
( )
5 4 3 26.01 11.06 6.1 0.06
e S e S e S S
K s
S S S S S
     

   

(21)
By using the LSP the final controller is obtained as:
016 5 015 4 3 27.99 4.26 0.09 0.6 1
( )
10 9 8 7 6 5 4 3 212 58.2 145.2 195.9 135.9 38.6 0.7 0.3 6 1
e S e S S S S
K s
f
S S S S S S S S S S
     

         
(22)
The controller achieved by LSP given in Eq. (22) has very
complex structure and is of 10th order controller; it appears
that it would be not easy to implement that controller for
practical applications.
Hence, an advantage of fixed order controller design can be
gained from recommended method. An IA based PID
controller has been considered fixed order robust controller;
kp, ki and kd are parameters of the controller that would be
evaluated using IA. The exact controller structure is stated
in Eq. (23)
( )
KiK K K sp d
s
    (23)
The Mat lab based simulations has been carried out with
representation of antibodies. The size of initial population
was set as 100 antibodies. Colonial affinity was computed
and single bit mutation was recycled, the IA parameters are
shown in Table 2, on 52nd
iteration of IA the optimum
values for PID gains has been accomplished.
TABLE 2 SPECIFIED PARAMETERS FOR THE IA
Parameters Immune Algorithm
Initial Population of antibodies 100
Selection Type tournament
Crossover one point
Crossover Probability 0.80
Mutation Type single bit mutation
As for as convergence algorithm is concerned the IA
converged after 52nd
iteration, and provided minimal value
of CF of 1.416 Fig.10 shows the plot of convergence of CF
versus iterations of IA. This fulfils the stability margin of
0.872. The calculated optimal gains of IA-based controller
are presented in Eq. (24)
0.847*( ) 0.301 0.42K S
S
    (24)
FIG. 10 CONVERGENCE OF CF VERSES ITERATIONS OF IA
The closed loop step response of the control system with
IA-based controller is presented in Fig.11which presents 1.5
sec rise time, 2% overshoot, about 2 sec. settling time and
zero steady state error.
FIG. 11 CLOSED LOOP RESPONSE WITH IA CONTROLLER
7.1 Robustness Analysis
In order to validate the robustness performance of IA PID
controller as given in Eq. (24) were implemented to
perturbed plant Eq. (2). The closed loop step response of
perturbed plant is presented in Fig.12 which presents rise
time 1.5 sec., 2.2% overshoot, settling time is about 2 sec.
and zero steady state error, which validates that the
proposed scheme have reasonably good robustness
performance.
FIG. 12 ROBUSTNESS CHECK OF IA-PID CONTROLLER
8. Conclusions
In this manuscript an IA based innovative methodology has
been presented. The IA has been suggested for optimization
of PID controller parameter and minimization of cost
function. Primary investigation demonstrates that the
suggested approach can supply an optimal solution for fixed
order robust PID controller.
Moreover, conventional approach used for this application
experiences large settling time, large overshoot and
oscillations. Henceforth, when an IA is applied to control
system problems, their typical characteristics demonstrates
quicker and smoother response.

REFERENCES
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Journal new horizons volume 81-82

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Journal new horizons volume 81-82