This document describes a design that interfaces an LCD display to an FPGA board. This allows the data displayed on the LCD to be flexible and configurable through the FPGA, rather than being static. The design implements a multi UART serial communication block with configurable baud rates to interface between the FPGA and LCD. The UART and LCD driver are developed in Verilog and can be integrated into the FPGA. As a proof of concept, the design displays "HELLO WORLD" on the LCD. The RTL code is synthesized and implemented on a Xilinx Spartan FPGA board with the LCD.