SlideShare a Scribd company logo
CS5460/6460: Operating Systems
Lecture 16: Midterm recap, sample
questions
Anton Burtsev
February, 2014
Describe the x86 address translation pipeline
(draw figure), explain stages.
lecture16-recap-questions-and-answers.pdf
lecture16-recap-questions-and-answers.pdf
lecture16-recap-questions-and-answers.pdf
lecture16-recap-questions-and-answers.pdf
lecture16-recap-questions-and-answers.pdf
lecture16-recap-questions-and-answers.pdf
lecture16-recap-questions-and-answers.pdf
lecture16-recap-questions-and-answers.pdf
What is the linear address? What address is in
the registers, e.g., in %eax?
Logical and linear addresses
● Segment selector (16 bit) + offset (32 bit)
What segments do the following instructions
use? push, jump, mov
Describe the linear to physical address
translation with the paging mechanism (use
provided diagram, mark and explain the steps).
Page translation
Page translation
Page directory entry (PDE)
● 20 bit address of the page table
● Pages 4KB each, we need 1M to cover 4GB
● R/W – writes allowed?
● To a 4MB region controlled by this entry
● U/S – user/supervisor
● If 0 – user-mode access is not allowed
● A – accessed
Page translation
Page table entry (PTE)
● 20 bit address of the 4KB page
● Pages 4KB each, we need 1M to cover 4GB
● R/W – writes allowed?
● To a 4KB page
● U/S – user/supervisor
● If 0 user-mode access is not allowed
● A – accessed
● D – dirty – software has written to this page
Page translation
Describe the steps and data structures involved
into a user to kernel transition (draw diagrams)
Interrupt path
What segment is specified in the interrupt
descriptor? Why?
Interrupt descriptor
● Interrupt gate disables
interrupts
● Clears the IF flag in
EFLAGS register
● Trap gate doesn't
● IF flag is unchanged
Which stack is used for execution of an
interrupt handler? How does hardware find it?
Why does xv6 uses 4MB pages for the first
page table during boot?
First page table
Describe organization of the memory allocator
in xv6?
Physical page allocator
Describe how a per-CPU variables can be
stored?
lecture16-recap-questions-and-answers.pdf
swtch in xv6 doesn’t explicitly save and restore
all fields of struct context. Why is it okay that
swtch doesn’t contain any code that saves
%eip?
Stack inside swtch()
Describe how does RCU work?
Read copy update
● Goal: remove “cat” from the
list
● There might be some readers
of “cat”
● Idea: control the pointer
dereference
● Make it atomic
Read copy update (2)
● Remove “cat”
● Update the “boa” pointer
● All subsequent reader will get
“gnu” as boa->next
Read copy update (2)
● Wait for all readers to finish
● synchronize_rcu()
Read copy update (3)
● Readers finished
● Safe to deallocate “cat”
Read copy update (4)
● New state of the list
Under what conditions RCU is a good idea?
In the following piece of code explain the use of
memory barriers?
Reference counting is a potential scalability
bottleneck, what can be done to improve it?
Reference counting is a potential scalability
bottleneck, what can be done to improve it?
● Sloppy counters
Why O(1) is really O(1)?
Why O(1) is really O(1)?
● Hint: analyze all operations and explain why
they are constant.
Alyssa runs xv6 on a machine with 8 processors and 8
processes. Each process calls sbrk (3451) continuously,
growing and shrinking its address space. Alyssa
measures the number of sbrks per second and notices
that 8 processes achieve the same total throughput as 1
process, even though each process runs on a different
processor. She profiles the xv6 kernel while running her
processes and notices that most execution time is spent
in kalloc (2838) and kfree (2815), though little is spent in
memset. Why is the throughput of 8 processes the same
as that of 1 process?
kalloc(void)
{
struct run *r;
if(kmem.use_lock)
acquire(&kmem.lock);
r = kmem.freelist;
if(r)
kmem.freelist = r− >next;
if(kmem.use_lock)
release(&kmem.lock);
return (char*)r;
}
kfree(char *v) {
struct run *r;
memset(v, 1, PGSIZE);
if(kmem.use_lock)
acquire(&kmem.lock);
r = (struct run*)v;
r− >next = kmem.freelist;
kmem.freelist = r;
if(kmem.use_lock)
release(&kmem.lock);
}
What can be done to improve performance?
Suppose you wanted to change the system call
interface in xv6 so that, instead of returning the
system call result in EAX, the kernel pushed the
result on to the user space stack. Fill in the
code below to implement this. For the purposes
of this question, you can assume that the user
stack pointer points to valid memory.
3374 void
3375 syscall(void)
3376 {
3377 int num;
3378
3379 num = proc− >tf− >eax;
3380 if(num > 0 && num < NELEM(syscalls) && syscalls[num]) {
3381 proc− >tf− >eax = syscalls[num]();
3382 } else {
3383 cprintf("%d %s: unknown sys call %dn",
3384 proc− >pid, proc− >name, num);
3385 proc− >tf− >eax = − 1;
3386 }
3387 }
3374 void
3375 syscall(void)
3376 {
3377 int num;
3378
3379 num = proc− >tf− >eax;
3380 if(num > 0 && num < NELEM(syscalls) && syscalls[num]) {
3381 // proc− >tf− >eax = syscalls[num]();
proc->tf->esp -= 4;
*(int*)ptoc->tf->esp = syscalls[num]();
3382 } else {
3383 cprintf("%d %s: unknown sys call %dn",
3384 proc− >pid, proc− >name, num);
3385 // proc− >tf− >eax = − 1;
proc->tf->esp -= 4;
*(int*)ptoc->tf->esp = -1;
3386 }
3387 }
1474 acquire(struct spinlock *lk)
1475 {
1476 pushcli();
1477 if(holding(lk))
1478 panic("acquire");
...
1483 while(xchg(&lk− >locked, 1) != 0)
1484 ;
...
1489 }
Why does acquire disable
interrupts?
1474 acquire(struct spinlock *lk)
1475 {
1476 pushcli();
1477 if(holding(lk))
1478 panic("acquire");
...
1483 while(xchg(&lk− >locked, 1) != 0)
1484 ;
...
1489 }
What would go wrong if you
replaced pushcli() with just cli(),
and popcli() with just sti()?
Explain why it would be awkward for xv6 to give
a process different data and stack segments
(i.e. have DS and SS refer to descriptors with
different BASE fields).
Thank you!

More Related Content

Similar to lecture16-recap-questions-and-answers.pdf (20)

PDF
Highridge ISA
Alec Selfridge
 
PPT
Design and implementation of five stage pipelined RISC-V processor using Ver...
RITHISHKUMAR17
 
PDF
Assembly_80x86- Assembly languages programming and 80x861.pdf
ahmedmohammed246810a
 
PPTX
Introduction to Processor Design and ARM Processor
Darling Jemima
 
PDF
nasm_final
Muhammed Yazar Y
 
PPTX
Berkeley Packet Filters
Kernel TLV
 
PDF
Streaming huge databases using logical decoding
Alexander Shulgin
 
PDF
Cao 2012
Raja Basharat
 
PPTX
Demystify eBPF JIT Compiler
Netronome
 
PPTX
Part III: Assembly Language
Ahmed M. Abed
 
PDF
Unit II Arm 7 Introduction
Dr. Pankaj Zope
 
PDF
(Open) MPI, Parallel Computing, Life, the Universe, and Everything
Jeff Squyres
 
PDF
(8) cpp stack automatic_memory_and_static_memory
Nico Ludwig
 
PDF
Revelation pyconuk2016
Sarah Mount
 
PPTX
CSe_Cumilla Bangladesh_Country CSE CSE213_5.ppt
roy5th6th
 
DOC
POLITEKNIK MALAYSIA
Aiman Hud
 
PDF
Pragmatic Optimization in Modern Programming - Demystifying the Compiler
Marina Kolpakova
 
PPT
Addressing modes (detailed data path)
Mahesh Kumar Attri
 
PPT
Assembly language programming_fundamentals 8086
Shehrevar Davierwala
 
Highridge ISA
Alec Selfridge
 
Design and implementation of five stage pipelined RISC-V processor using Ver...
RITHISHKUMAR17
 
Assembly_80x86- Assembly languages programming and 80x861.pdf
ahmedmohammed246810a
 
Introduction to Processor Design and ARM Processor
Darling Jemima
 
nasm_final
Muhammed Yazar Y
 
Berkeley Packet Filters
Kernel TLV
 
Streaming huge databases using logical decoding
Alexander Shulgin
 
Cao 2012
Raja Basharat
 
Demystify eBPF JIT Compiler
Netronome
 
Part III: Assembly Language
Ahmed M. Abed
 
Unit II Arm 7 Introduction
Dr. Pankaj Zope
 
(Open) MPI, Parallel Computing, Life, the Universe, and Everything
Jeff Squyres
 
(8) cpp stack automatic_memory_and_static_memory
Nico Ludwig
 
Revelation pyconuk2016
Sarah Mount
 
CSe_Cumilla Bangladesh_Country CSE CSE213_5.ppt
roy5th6th
 
POLITEKNIK MALAYSIA
Aiman Hud
 
Pragmatic Optimization in Modern Programming - Demystifying the Compiler
Marina Kolpakova
 
Addressing modes (detailed data path)
Mahesh Kumar Attri
 
Assembly language programming_fundamentals 8086
Shehrevar Davierwala
 

Recently uploaded (20)

PPTX
Tally software_Introduction_Presentation
AditiBansal54083
 
PPTX
Milwaukee Marketo User Group - Summer Road Trip: Mapping and Personalizing Yo...
bbedford2
 
PDF
Build It, Buy It, or Already Got It? Make Smarter Martech Decisions
bbedford2
 
PDF
Open Chain Q2 Steering Committee Meeting - 2025-06-25
Shane Coughlan
 
PDF
iTop VPN With Crack Lifetime Activation Key-CODE
utfefguu
 
PPTX
Homogeneity of Variance Test Options IBM SPSS Statistics Version 31.pptx
Version 1 Analytics
 
PPTX
AEM User Group: India Chapter Kickoff Meeting
jennaf3
 
PPTX
OpenChain @ OSS NA - In From the Cold: Open Source as Part of Mainstream Soft...
Shane Coughlan
 
PPTX
Why Businesses Are Switching to Open Source Alternatives to Crystal Reports.pptx
Varsha Nayak
 
PDF
TheFutureIsDynamic-BoxLang witch Luis Majano.pdf
Ortus Solutions, Corp
 
PDF
HiHelloHR – Simplify HR Operations for Modern Workplaces
HiHelloHR
 
PDF
Alexander Marshalov - How to use AI Assistants with your Monitoring system Q2...
VictoriaMetrics
 
PDF
Automate Cybersecurity Tasks with Python
VICTOR MAESTRE RAMIREZ
 
PDF
Download Canva Pro 2025 PC Crack Full Latest Version
bashirkhan333g
 
PDF
vMix Pro 28.0.0.42 Download vMix Registration key Bundle
kulindacore
 
PPTX
Tally_Basic_Operations_Presentation.pptx
AditiBansal54083
 
PDF
Why Businesses Are Switching to Open Source Alternatives to Crystal Reports.pdf
Varsha Nayak
 
PDF
MiniTool Partition Wizard 12.8 Crack License Key LATEST
hashhshs786
 
PPTX
Help for Correlations in IBM SPSS Statistics.pptx
Version 1 Analytics
 
PDF
유니티에서 Burst Compiler+ThreadedJobs+SIMD 적용사례
Seongdae Kim
 
Tally software_Introduction_Presentation
AditiBansal54083
 
Milwaukee Marketo User Group - Summer Road Trip: Mapping and Personalizing Yo...
bbedford2
 
Build It, Buy It, or Already Got It? Make Smarter Martech Decisions
bbedford2
 
Open Chain Q2 Steering Committee Meeting - 2025-06-25
Shane Coughlan
 
iTop VPN With Crack Lifetime Activation Key-CODE
utfefguu
 
Homogeneity of Variance Test Options IBM SPSS Statistics Version 31.pptx
Version 1 Analytics
 
AEM User Group: India Chapter Kickoff Meeting
jennaf3
 
OpenChain @ OSS NA - In From the Cold: Open Source as Part of Mainstream Soft...
Shane Coughlan
 
Why Businesses Are Switching to Open Source Alternatives to Crystal Reports.pptx
Varsha Nayak
 
TheFutureIsDynamic-BoxLang witch Luis Majano.pdf
Ortus Solutions, Corp
 
HiHelloHR – Simplify HR Operations for Modern Workplaces
HiHelloHR
 
Alexander Marshalov - How to use AI Assistants with your Monitoring system Q2...
VictoriaMetrics
 
Automate Cybersecurity Tasks with Python
VICTOR MAESTRE RAMIREZ
 
Download Canva Pro 2025 PC Crack Full Latest Version
bashirkhan333g
 
vMix Pro 28.0.0.42 Download vMix Registration key Bundle
kulindacore
 
Tally_Basic_Operations_Presentation.pptx
AditiBansal54083
 
Why Businesses Are Switching to Open Source Alternatives to Crystal Reports.pdf
Varsha Nayak
 
MiniTool Partition Wizard 12.8 Crack License Key LATEST
hashhshs786
 
Help for Correlations in IBM SPSS Statistics.pptx
Version 1 Analytics
 
유니티에서 Burst Compiler+ThreadedJobs+SIMD 적용사례
Seongdae Kim
 

lecture16-recap-questions-and-answers.pdf

  • 1. CS5460/6460: Operating Systems Lecture 16: Midterm recap, sample questions Anton Burtsev February, 2014
  • 2. Describe the x86 address translation pipeline (draw figure), explain stages.
  • 11. What is the linear address? What address is in the registers, e.g., in %eax?
  • 12. Logical and linear addresses ● Segment selector (16 bit) + offset (32 bit)
  • 13. What segments do the following instructions use? push, jump, mov
  • 14. Describe the linear to physical address translation with the paging mechanism (use provided diagram, mark and explain the steps).
  • 17. Page directory entry (PDE) ● 20 bit address of the page table ● Pages 4KB each, we need 1M to cover 4GB ● R/W – writes allowed? ● To a 4MB region controlled by this entry ● U/S – user/supervisor ● If 0 – user-mode access is not allowed ● A – accessed
  • 19. Page table entry (PTE) ● 20 bit address of the 4KB page ● Pages 4KB each, we need 1M to cover 4GB ● R/W – writes allowed? ● To a 4KB page ● U/S – user/supervisor ● If 0 user-mode access is not allowed ● A – accessed ● D – dirty – software has written to this page
  • 21. Describe the steps and data structures involved into a user to kernel transition (draw diagrams)
  • 23. What segment is specified in the interrupt descriptor? Why?
  • 25. ● Interrupt gate disables interrupts ● Clears the IF flag in EFLAGS register ● Trap gate doesn't ● IF flag is unchanged
  • 26. Which stack is used for execution of an interrupt handler? How does hardware find it?
  • 27. Why does xv6 uses 4MB pages for the first page table during boot?
  • 29. Describe organization of the memory allocator in xv6?
  • 31. Describe how a per-CPU variables can be stored?
  • 33. swtch in xv6 doesn’t explicitly save and restore all fields of struct context. Why is it okay that swtch doesn’t contain any code that saves %eip?
  • 35. Describe how does RCU work?
  • 36. Read copy update ● Goal: remove “cat” from the list ● There might be some readers of “cat” ● Idea: control the pointer dereference ● Make it atomic
  • 37. Read copy update (2) ● Remove “cat” ● Update the “boa” pointer ● All subsequent reader will get “gnu” as boa->next
  • 38. Read copy update (2) ● Wait for all readers to finish ● synchronize_rcu()
  • 39. Read copy update (3) ● Readers finished ● Safe to deallocate “cat”
  • 40. Read copy update (4) ● New state of the list
  • 41. Under what conditions RCU is a good idea?
  • 42. In the following piece of code explain the use of memory barriers?
  • 43. Reference counting is a potential scalability bottleneck, what can be done to improve it?
  • 44. Reference counting is a potential scalability bottleneck, what can be done to improve it? ● Sloppy counters
  • 45. Why O(1) is really O(1)?
  • 46. Why O(1) is really O(1)? ● Hint: analyze all operations and explain why they are constant.
  • 47. Alyssa runs xv6 on a machine with 8 processors and 8 processes. Each process calls sbrk (3451) continuously, growing and shrinking its address space. Alyssa measures the number of sbrks per second and notices that 8 processes achieve the same total throughput as 1 process, even though each process runs on a different processor. She profiles the xv6 kernel while running her processes and notices that most execution time is spent in kalloc (2838) and kfree (2815), though little is spent in memset. Why is the throughput of 8 processes the same as that of 1 process?
  • 48. kalloc(void) { struct run *r; if(kmem.use_lock) acquire(&kmem.lock); r = kmem.freelist; if(r) kmem.freelist = r− >next; if(kmem.use_lock) release(&kmem.lock); return (char*)r; } kfree(char *v) { struct run *r; memset(v, 1, PGSIZE); if(kmem.use_lock) acquire(&kmem.lock); r = (struct run*)v; r− >next = kmem.freelist; kmem.freelist = r; if(kmem.use_lock) release(&kmem.lock); }
  • 49. What can be done to improve performance?
  • 50. Suppose you wanted to change the system call interface in xv6 so that, instead of returning the system call result in EAX, the kernel pushed the result on to the user space stack. Fill in the code below to implement this. For the purposes of this question, you can assume that the user stack pointer points to valid memory.
  • 51. 3374 void 3375 syscall(void) 3376 { 3377 int num; 3378 3379 num = proc− >tf− >eax; 3380 if(num > 0 && num < NELEM(syscalls) && syscalls[num]) { 3381 proc− >tf− >eax = syscalls[num](); 3382 } else { 3383 cprintf("%d %s: unknown sys call %dn", 3384 proc− >pid, proc− >name, num); 3385 proc− >tf− >eax = − 1; 3386 } 3387 }
  • 52. 3374 void 3375 syscall(void) 3376 { 3377 int num; 3378 3379 num = proc− >tf− >eax; 3380 if(num > 0 && num < NELEM(syscalls) && syscalls[num]) { 3381 // proc− >tf− >eax = syscalls[num](); proc->tf->esp -= 4; *(int*)ptoc->tf->esp = syscalls[num](); 3382 } else { 3383 cprintf("%d %s: unknown sys call %dn", 3384 proc− >pid, proc− >name, num); 3385 // proc− >tf− >eax = − 1; proc->tf->esp -= 4; *(int*)ptoc->tf->esp = -1; 3386 } 3387 }
  • 53. 1474 acquire(struct spinlock *lk) 1475 { 1476 pushcli(); 1477 if(holding(lk)) 1478 panic("acquire"); ... 1483 while(xchg(&lk− >locked, 1) != 0) 1484 ; ... 1489 } Why does acquire disable interrupts?
  • 54. 1474 acquire(struct spinlock *lk) 1475 { 1476 pushcli(); 1477 if(holding(lk)) 1478 panic("acquire"); ... 1483 while(xchg(&lk− >locked, 1) != 0) 1484 ; ... 1489 } What would go wrong if you replaced pushcli() with just cli(), and popcli() with just sti()?
  • 55. Explain why it would be awkward for xv6 to give a process different data and stack segments (i.e. have DS and SS refer to descriptors with different BASE fields).