Использование открытых кодов для расширения возможностей платформы MIPSfpga
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Антон Павлов, ФГУ ФНЦ НИИСИ РАН
Использование открытых кодов для расширения возможностей платформы MIPSfpga
- 1. XII ìåæäóíàðîäíàÿ êîíôåðåíöèÿ CEE-SECR / ÐÀÇÐÀÁÎÒÊÀ ÏÎ 2829 îêòÿáðÿ, Ìîñêâà Èñïîëüçîâàíèå îòêðûòûõ êîäîâ äëÿ ðàñøèðåíèÿ âîçìîæíîñòåé ïëàòôîðìû MIPSfpga À.Í.Ïàâëîâ ÔÃÓ ÔÍÖ ÍÈÈÑÈ ÐÀÍ 1/19
- 2. Îá àâòîðå Ïàâëîâ À. Í. [email protected] ñîòðóäíèê ñåêòîðà Ïðîãðàììèðîâàíèÿ ÍÈÈÑÈ ÐÀÍ, ó÷àñòâóþ â âåðèôèêàöèè ïðè ïîìîùè ÑÏÎ ðàçðàáàòûâàåìûõ â ÍÈÈÑÈ ìèêðîïðîöåññîðîâ ñ MIPS-ïîäîáíîé ñèñòåìîé êîìàíä (AKA àðõèòåêòóðà ÊÎÌÄÈÂ). Antony Pavlov [email protected] ó÷àñòíèê íåñêîëüêèõ ïðîåêòîâ ÑÏÎ: linux; barebox (U-Boot v2); qemu; openocd. ñì. òàêæå https://www.openhub.net/accounts/antonynpavlov 2/19
- 3. MIPSfpga (ñ ìàÿ 2015 ãîäà) íåîáôóñöèðîâàííûå èñõîäíûå òåêñòû íà Verilog êîììåð÷åñêîãî ïðîöåññîðíîãî ÿäðà MIPS microAptiv UP ïðåäîñòàâëåíû äëÿ ðåàëèçàöèè â ÏËÈÑ â ó÷åáíûõ/íàó÷íûõ öåëÿõ; ïîòðåáèòåëè ïðåïîäàâàòåëè è ñòóäåíòû óíèâåðñèòåòîâ; ìåòîäè÷åñêèå ìàòåðèàëû ïî ïðîâåäåíèþ ëàáîðàòîðíûõ ðàáîò ïðèëàãàþòñÿ (èññëåäîâàíèå ïðîöåññîðà; bare-metal ïðîãðàììèðîâàíèå ïðîñòåéøåé ïåðèôåðèè). 3/19
- 4. opencores.org  ðàìêàõ ñîîáùåñòâà opencores.org íàêîïëåíî áîëüøîå ÷èñëî opensource IP-áëîêîâ. 4/19
- 5. myMIPSfpga (îêòÿáðü-íîÿáðü 2015 ãîäà) myMIPSfpga ìîÿ ïîïûòêà èíòåãðèðîâàòü ÿäðî myMIPSfpga ñ open source IP-áëîêàìè ñ opencores.org. 2mm Èñõîäíûå òåêñòû: https://github.com/MIPSfpga/myMIPSfpga 5/19
- 7. myMIPSfpga: âïå÷àòëåíèÿ MIPSfpga çàìå÷àòåëüíûé îáðàçîâàòåëüíûé ïðîäóêò! Ê ïðîåêòó åñòü èíòåðåñ! Îïûò ïîêàçàë, ÷òî ìîæíî çàíèìàòüñÿ MIPSfpga ¾â äîìàøíèõ óñëîâèÿõ¿ áåç ÷ðåçìåðíûõ óñèëèé (ñì. myMIPSfpga). Íî åñòü è òðóäíîñòè... 7/19
- 8. myMIPSfpga: âïå÷àòëåíèÿ Îãðàíè÷åíèÿ: òîëüêî äëÿ ïðåïîäàâàòåëåé, ðàáîòàþùèõ ñî ñòóäåíòàìè; NDA; äëÿ áûñòðîãî ñòàðòà íóæíû ìàëîäîñòóïíûå ïëàòû è ÏÎ; åñòü ñèëüíàÿ çàâèñèìîñòü îò ÑÀÏÐ è èíñòðóìåíòàëüíîãî ÏÎ; íå ïðåäóñìîòðåíî ïîäêëþ÷åíèÿ open source IP-áëîêîâ. 7/19
- 9. myMIPSfpga: âïå÷àòëåíèÿ Äëÿ ñíÿòèÿ îãðàíè÷åíèé íåîáõîäèìî èñïîëüçîâàòü open source êîìïîíåíòû! 7/19
- 10. MIPSfpga SoC (ñ äåêàáðÿ 2015 ãîäà) ÑíÊ íà áàçå AXI è IP-áëîêîâ Xilinx INTC; DDR2; UART; Ethernet; I2C; GPIO. ëàáû: bare-metal ÏÎ è Linux (!); ïîääåðæêà MIPSfpga SoC äîáàâëåíà â mainline linux! 8/19
- 11. MIPSfpga SoC Ëåãåíäà: ñèíèì ïðîöåññîðíîå ÿäðî MIPSfpga; êðàñíûì IP-áëîêè Xilinx.9/19
- 12. MIPSfpga SoC Ïðè ñáîðêå ÑíÊ èñïîëüçóþòñÿ ÑÀÏÐ Xilinx. 9/19
- 13. êîìïîíåíòû MIPSfpga íå â ñâîáîäíîì äîñòóïå ïðîöåññîðíîå ÿäðî MIPSfpga íå â ñâîáîäíîì äîñòóïå; çàòðóäíèòåëüíî âíîñèòü èçìåíåíèÿ â ÿäðî; MIPSfpga SoC: IP-áëîêè Xilinx íå â ñâîáîäíîì äîñòóïå; ïðèâÿçêà ê ÑÀÏÐ è ÏËÈÑ Xilinx. 10/19
- 14. Ïëàòû äîðîãè è ìàëîäîñòóïíû ïëàòû èç MIPSfpga Getting Started Guide (Version 1.3, April 5, 2016) Terasic DE2-115 Digilent Nexys4 DDR $595 $320 (Academic $309) (Academic $159) 11/19
- 15. marsohod.org îòå÷åñòâåííûé ïðîèçâîäèòåëü (Òàãàíðîã); ïëàòû Ìàðñîõîä (1500 4200 10500 ðóá.) íà áàçå ÏËÈÑ Altera; ðóêîâîäñòâà ïî ÑÀÏÐ Altera; ðóêîâîäñòâî ïî Verilog; áëîã ñ ãîòîâûìè ïðîåêòàìè; ðóññêîÿçû÷íîå ñîîáùåñòâî. 12/19
- 16. ïëàòà Ìàðñîõîä3 ÏËÈÑ MAX10 10M50 50K LE 1600 Kbits 10500 ðóá. Äëÿ MIPSfpga Getting Started äîñòàòî÷íî 24K LE. 13/19
- 17. Open source: èíñòðóìåíòàëüíîå ÏÎ Debian mips-linux-gnu- toolchain (âìåñòî Codescape MIPS SDK); qemu; Icarus Verilog, gtkwave (âìåñòî* ModelSim); 14/19
- 18. Open source: àïïàðàòóðà ïðîöåññîðíîå ÿäðî mips32r1 âìåñòî MIPSfpga; øèíà Wishbone è IP-áëîêè ñ opencores âìåñòî AXI è IP-áëîêîâ Xilinx; ãåíåðàòîð êîììóòàòîðà Wishbone èç fusesoc; äîñòóïíûå ïëàòû ñ ÏËÈÑ. 15/19
- 19. ïðîöåññîðíîå ÿäðî 'mips32r1' Ðåàëèçàöèÿ ïðîöåññîðà ñ àðõèòåêòóðîé MIPS32 Release 1. Ñîçäàíî Grant Ayers â ðàìêàõ ïðîåêòà eXtensible Utah Multicore (XUM) óíèâåðñèòåòà øòàòà Þòà â 2010-2012 ãîäàõ. Ïåðåíåñåíî ñ OpenCores íà github: https://github.com/grantae/mips32r1_core 16/19
- 20. ïðîöåññîðíîå ÿäðî 'mips32r1' single-issue in-order 5-stage pipeline; íåò MMU; íåò êýø-ïàìÿòè; íåò àðèôìåòè÷åñêîãî ñîïðîöåññîðà. Ìèíèìàëèñòè÷íîå ÿäðî MIPS32r1, âëåçàåò â 10K LE Altera. Óâû, áåç ïîääåðæêè Wishbone èç êîðîáêè... 16/19
- 21. fusesoc fusesoc ïðåäîñòàâëÿåò âîçìîæíîñòü ¾ñîáðàòü¿ ÑíÊ Openrisc ïî ñöåíàðèþ. 17/19
- 22. Äåìîíñòðàöèîííûé ïðîåêò Äåìîíñòðàöèîííûé ïðîåêò, ñîâìåñòèìûé ñ myMIPSfpga: Äåìîíñòðàöèîííûé ïðîåêò ïîäòâåðæäàåò ðåàëèçóåìîñòü ïðåäëîæåííîãî ïîäõîäà. Èñõîäíûå òåêñòû: https://github.com/open-design/mips32r1_soc_nano 18/19
- 23. F I N 19/19
- 24. BACKUP it may be convenient to have some backup/appendix slides ready as a support for answers to potential questions.
- 25. Ññûëêè ìîè ïðîåêòû https://github.com/open-design/mips32r1_soc_nano https://github.com/MIPSfpga/myMIPSfpga https://github.com/open-design/quartus-linux-install ïðîöåññîðíîå ÿäðî mips32r1 https://github.com/grantae/mips32r1_core êîíñòðóêòîð ÑíÊ fusesoc https://github.com/olofk/fusesoc https://github.com/openrisc/orpsoc-cores êîëëåêöèÿ IP-áëîêîâ opencores.org ( 660 ÌÁ!) https://github.com/fabriziotappero/ip-cores
- 26. DIGILENT: Your order has NOT been processed. ¾At this time, we are unable to ship orders to Russia from our US website due to shipping restrictions beyond our control.¿
- 27. terraelectronica.ru From: Åëåíà Äèáðîâà [email protected] Subject: RE: ñðîê ïîñòàâêè DL-NEXYS4, Digilent Date: Tue, 16 Jun 2015 09:31:12 +0300 Äîáðûé äåíü! Ê ñîæàëåíèþ, äàííóþ ïîçèöèþ ïîñòàâèòü íå ñìîæåì.
- 28. ×òî òàêîå MIPSfpga MIPSfpga Getting Started MIPSfpga Fundamentals MIPSfpga SoC The Connected Microcontroller Lab
- 29. ×òî òàêîå MIPSfpga MIPSfpga Getting Started RTL êîäû ÿäðà MIPSfpga; äîêóìåíòàöèÿ íà ïðîöåññîðíîå ÿäðî; ïðèìåðû Codescape MIPS SDK; ñàìûå ïðîñòûå ïðèìåðû; ïðè¼ìû ðàáîòû. MIPSfpga Fundamentals áîëåå ñëîæíûå ðàáîòû â äóõå Getting Started: ïîäêëþ÷åíèå íåñëîæíûõ ïåðèôåðèéíûõ êîíòðîëëåðîâ (7SEG display, timer, buzzer, SPI LCD); ëàáû: bare-metal ÏÎ.
- 30. MIPSfpga Getting Started Ëåãåíäà: ñèíèì ïðîöåññîðíîå ÿäðî MIPSfpga; æ¼ëòûì áëîêè MIPSfpga Getting Started.
- 31. MIPSfpga Getting Started Øèíà AHB-Lite ïîçâîëÿåò èñïîëüçîâàòü ñàìûå ïðîñòûå ñðåäñòâà äëÿ ïîäñîåäèíåíèÿ ïåðèôåðèè ê ÿäðó.
- 32. MIPSfpga Getting Started Íàñòðîéêè ñîåäèíåíèÿ IP-áëîêîâ ïðîâîäÿòñÿ âðó÷íóþ â êîäå Verilog.
- 34. Äàëüíåéøèå ðàáîòû èíòåãðàöèÿ Wishbone êîíòðîëëåðà â mips32r1; âåðèôèêàöèÿ mips32r1 ïðè ïîìîùè òåñòîâ ÍÈÈÑÈ ÐÀÍ; ðåàëèçàöèÿ áîëåå ñëîæíîé ÑíÊ, ñîïîñòîâèìîé ñ MIPSfpga SoC; ïîääåðæêà ñâîáîäíî ðàñïðîñòðàíÿåìîé ÑÀÏÐ äëÿ ÏËÈÑ Lattice icestorm (http://www.cliord.at/icestorm/); ïîääåðæêà ÏËÈÑ Xilinx (e.g. fusesoc has Vivado backend).