Pcie drivers basics
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The document provides an overview of the Peripheral Component Interconnect (PCI) system architecture. PCI is an Intel-backed initiative introduced in 1992 to improve capabilities for adding and removing peripheral devices. It defines a standard configuration space for automatic detection of devices and simplifies driver development. PCI uses bus, device and function numbers to address devices and supports bridges and switches to connect multiple devices. The Linux kernel extracts device information from PCI configuration spaces and represents it in linked data structures for drivers.
Pcie drivers basics
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- 3. Some background on PCI • ISA: Industry Standard Architecture (1981) • PCI: Peripheral Component Interconnect • An Intel-backed industry initiative (1992-9) • Main goals: – Adds more capabilities to host system (SATA, USB) – Improve data-xfers to/from peripheral devices – Eliminate (or reduce) platform dependencies – Simplify adding/removing peripheral devices – Lower total consumption of electrical power 3
- 4. Features for driver-writers • Support for “auto-detection” of devices • Device configuration is “programmable” • Introduces “PCI Configuration Space” • A nonvolatile data-structure of device info • A standard “header” layout: 64 longwords • Linux provides some interface functions: #include <linux/pci.h> 4
- 6. PCI Topology • Root Complex – Host Contrller • End point – PCI device • CPU-addr – CPU physical address • Pci-addr – PCI bus address • Switches - Allow more devices to be connected • Bridges - PCI/PCIe to Root complex. Special purpose peripheral, to joining 2 buses. Plugging more than one bus on a single system is accomplished. 6
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- 12. 12 PCI Address Space • PCI identified by a Bus no, Device no and a Function no. • PCI Domain : Can host upto 256 buses, each bush 32 devices, each device, multifunction boards ( audio device with CD rom drive accompany) of max 8 funcions. • Peripheral devices have their own memory space • PCI :PCI I/O, PCI Memory (device driver) PCI Configuration Space ( initialization)
- 13. The ‘lspci’ command • Linux scans PCI Configuration Space • It builds a list of ‘pci_dev_struct’ objects • It exports partial info using a ‘/proc’ file • You can view this info using a command: $ /sbin/lspci • Or you can directly view the /proc/pci file: $ cat /proc/pci 13
- 14. • $ lspci | cut -d: -f1-3 • 0000:00:00.0 Host bridge • 0000:00:00.1 RAM memory • 0000:00:00.2 RAM memory • 0000:00:02.0 USB Controller • 0000:00:04.0 Multimedia audio controller • 0000:00:06.0 Bridge • 0000:00:07.0 ISA bridge • 0000:00:09.0 USB Controller • 0000:00:09.1 USB Controller • 0000:00:0c.0 CardBus bridge • 0000:00:0f.0 IDE interface • 0000:00:10.0 Ethernet controller • 0000:00:12.0 Network controller • Taking the VGA video controller as an example, 0x00a0 means 0000:00:14.0 when split into domain (16 bits), bus (8 bits), device (5 bits) and function (3 bits). 14
- 15. 15 PCI Configuration Header • Allow system to identify and control the device • Every PCI slot has it’s PCI Configuration Header in an offset that is related to it’s slot on the board • The PCI configuration space consists of 256 bytes for each device function (PCI Express devices, which have 4 KB of configuration space for each function), and the layout of the configuration registers is standardized.
- 17. 17 PCI Configuration Header • Vender Identification • Device Identification • Status • Command • Class Code – SCSI : 0x0100 • Base Address Register • Interrupt Pin (PCI device interrupt pin) • Interrupt Line (route interrupt to proper handler)
- 18. 18 PCI I/O and PCI Memory Address • PCI configuration code turns on using Command field • Linux drivers read/write PCI I/O and PCI memory addresses 1 00 0 Base Address Registers 0 –Memory request 1 – I/o request 00 – 32bit address decoding 10 – 64bit address decoding 1 – Pre-fatchable 0 – non-prefetchable
- 19. 19 PCI-ISA Bridges • The PCI specification copes with this by reserving the lower regions of the PCI I/O and PCI Memory address spaces for use by the ISA peripherals in the system and using a single PCI-ISA bridge to translate any PCI memory accesses to those regions into ISA accesses
- 20. 20 PCI-PCI Bridges • PCI-PCI bridges only pass a subset of PCI I/O and PCI memory read and write requests downstream • Linux device drivers only access PCI I/O and PCI Memory space via these windows
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- 22. 22 Type 1 PCI Configuration Cycles • The primary bus interface being the one nearest the CPU • Secondary bus interface being the one furthest away • Subordinate bus number is the highest numbered PCI bus downstream of the PCI- PCI bridge
- 23. 23 Type 1 PCI Configuration Cycles • Ignore it if the bus number specified is not in between the bridge's secondary bus number and subordinate bus number (inclusive), • Convert it to a Type 0 configuration command if the bus number specified matches the secondary bus number of the bridge,
- 24. 24 Type 1 PCI Configuration Cycles • Pass it onto the secondary bus interface unchanged if the bus number specified is greater than the secondary bus number and less than or equal to the subordinate bus number.
- 25. 25 Linux PCI Initialization • PCI device driver – This pseudo-device driver builds a linked list of data structures describing the topology of the system • PCI BIOS • PCI Fixup – system specific fixed up code
- 26. pci_dev_struct • Linux extracts info from PCI Config. Space • Stores the info in linked-lists of structures • Examples: – Name of the device’s manufacturer – Name and release version of the product – Hardware resources provided by the product – System resources allocated to the product (Linux provides “search-and-extract” routines) 26
- 27. 27 The Linux Kernel PCI Data Structures
- 28. 28 The PCI Device Driver • A function of the operating system called at system initialization time • Scan all of the PCI buses in the system looking for all PCI devices in the system (including PCI-PCI bridge devices) • Configuring PCI-PCI Bridges - Assigning PCI Bus Number
- 29. 29 Assigning PCI Bus Number (1)
- 30. 30 Assigning PCI Bus Number (2)
- 31. 31 Assigning PCI Bus Number (3)
- 32. 32 Assigning PCI Bus Number (4)
- 33. 33 PCI Fixup • For non-Intel based system – allocates it space in PCI I/O and/or PCI Memory – moves on the global PCI I/O and Memory bases by the appropriate amounts, – enables the device's use of PCI I/O and PCI Memory,
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