Processor organization & register organization
- 1. Processor Organization & Register Organization
- 2. Requirements placed on the processor Fetch instruction: The processor reads an instruction from memory (register ,cache, main memory). Interpret instruction: The instruction is decoded to determine what action is required. Fetch data: The execution of an instruction may require reading data from memory or an I/O module. Process data: The execution of an instruction may require performing some arithmetic or logical operation on data. Write data: The results of an execution may require writing data to memory on I/O module.
- 3. Simplified view of processor
- 4. Components Of Processor The major components of the processor are an arithmetic and logic unit (ALU) and a control unit (CU). The ALU does the actual computation or processing of data. The control unit controls the movement of data and instructions into and out of the processor and controls the operation of the ALU. Register consists of a set of storage locations.
- 5. Internal Structure Of CPU
- 6. Explanation The data transfer and logic control paths are indicated, including an element labeled internal processor bus. This element is needed to transfer data between the various registers and the ALU because the ALU in fact operates only on data in the internal processor memory.
- 8. The register in the processor perform two roles: 1. User-visible register: Enable the machine- or assembly language programmer to minimize main memory references by optimizing use of registers. 2. Control and status registers:Used by the control unit to control the operation of the processor and by privileged, operating system programs to control the execution of programs.
- 9. User-visible Registers CATEGORIES:- General Purpose Data Address Condition Codes
- 10. General Purpose General Purpose Registers can be assigned to a variety of functions by the programmer Mostly these registers contain the operand for any opcode. In some cases these are used for addressing purpose.
- 11. Data Registers Data Register to hold data and cannot be employed in the calculation of an operand address Eg. Accumulator.
- 12. Address Registers Address Register they may be devoted to a particular addressing mode Segment pointers :a segment register holds the address of the base of the segment Index registers :are used for indexed addressing and may be autoindexed. Stack Pointer: If there is user-visible stack addressing, then typically there is a dedicated register that points to the top of the stack.
- 13. Condition Codes Condition codes are bits set by the processor hardware as the result of operations. Condition codes are bits set by the processor hardware as the result of operation.
- 14. CONTROL AND STATUS REGISTERS Four Essential Registers: Program counter (PC): Contains the address of an instruction to be fetched. Instruction register (IR): Contains the instruction most recently fetched. Memory address register (MAR): Contains the address of a location in memory. Memory buffer register (MBR): Contains a word of data to be written to memory or the word most recently read.
- 15. Program Status Word Program status word (PSW) contain status information. The PSWtypically contains condition codes plus other status information. Sign: Contains the sign bit of the result of the last arithmetic operation. Zero: Set when the result is 0. Carry: Set if an operation resulted in a carry (addition) into or borrow (subtraction)out of a high-order bit. Used for multiword arithmetic operations. Equal: Set if a logical compare result is equality. Overflow: Used to indicate arithmetic overflow. Interrupt Enable/Disable: Used to enable or disable interrupts. Supervisor: Indicates whether the processor is executing in supervisor or user mode. Certain privileged instructions can be executed only in supervisor mode, and certain areas of memory can be accessed only in supervisor mode